oweals/u-boot.git
4 years agommc: am654_sdhci: Get Xin clock by name
Faiz Abbas [Thu, 16 Jan 2020 14:12:18 +0000 (19:42 +0530)]
mmc: am654_sdhci: Get Xin clock by name

Get clk_xin by name instead of by index to avoid having to put clocks in
the same order in all devices.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agodma: ti: k3-udma: Fix build warnings when building for 32 bit platforms
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:39 +0000 (10:25 +0530)]
dma: ti: k3-udma: Fix build warnings when building for 32 bit platforms

Cast pointers properly so as to avoid warnings when driver is built for
32 bit platforms

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agodma: ti: k3-udma: Fix ring push operation for 32 bit cores
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:38 +0000 (10:25 +0530)]
dma: ti: k3-udma: Fix ring push operation for 32 bit cores

UDMA always expects 64 bit address pointer of the transfer descriptor in
the Ring. But on 32 bit cores like R5, pointer is always 32 bit in size.
Therefore copy over 32 bit pointer value to 64 bit variable before
pushing it over to the ring, so that upper 32 bits are 0s.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agodma: ti: k3-udma: Switch to exposed ring mode
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:37 +0000 (10:25 +0530)]
dma: ti: k3-udma: Switch to exposed ring mode

Exposed ring mode works well with 32 bit and 64 bit cores without need
for Proxies for 32 bit cores. Therefore switch to exposed ring mode.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agodma: ti: k3-udma: Fix debug prints during enabling MEM_TO_DEV transfers
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:36 +0000 (10:25 +0530)]
dma: ti: k3-udma: Fix debug prints during enabling MEM_TO_DEV transfers

Fix up the debug prints that were dumping state of TCHAN RT registers to
use tchan for MEM_TO_DEV transfers.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agodma: ti: k3-udma: Remove coherency check for cache ops
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:35 +0000 (10:25 +0530)]
dma: ti: k3-udma: Remove coherency check for cache ops

Remove redundant coherency checks before calling cache ops in UDMA
driver. This is now handled in arch specific cache operation
implementation based on Kconfig option

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agosoc: ti: k3-navss-ringacc: Get SYSFW reference from DT phandle
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:34 +0000 (10:25 +0530)]
soc: ti: k3-navss-ringacc: Get SYSFW reference from DT phandle

Instead of looking getting reference to SYSFW device using name which
is not guaranteed to be constant, use phandle supplied in the DT node to
get reference to SYSFW

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agosoc: ti: k3-navss-ringacc: Flush/invalidate caches on ring push/pop
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:33 +0000 (10:25 +0530)]
soc: ti: k3-navss-ringacc: Flush/invalidate caches on ring push/pop

Flush caches when pushing an element to ring and invalidate caches when
popping an element from ring in Exposed Ring mode. Otherwise DMA
transfers don't work properly in R5 SPL (with caches enabled) where the
core is not in coherency domain.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agodma: ti: k3-udma: Query DMA channels allocated from Resource Manager
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:32 +0000 (10:25 +0530)]
dma: ti: k3-udma: Query DMA channels allocated from Resource Manager

On K3 SoCs, DMA channels are shared across multiple entities, therefore
U-Boot DMA driver needs to query resource range from centralised
resource management controller i.e SystemFirmware and use DMA channels
allocated for A72 host. Add support for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agolib: Import few bitmap functions from Linux
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:31 +0000 (10:25 +0530)]
lib: Import few bitmap functions from Linux

Import few basic bitmap functions (bitmap_{weight,fill,set,clear,or}())
and their dependencies from Linux. These are required for upcoming DMA
resource allocation support for TI's K3 SoCs.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoboard: ti: am43xx: remove net platform code
Grygorii Strashko [Fri, 22 Nov 2019 17:26:31 +0000 (19:26 +0200)]
board: ti: am43xx: remove net platform code

The TI AM43xx platform has DM_ETH and OF_CONTROL enabled,
so remove networking platform code.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoboard: ti: dra7-evm: remove net platform code
Grygorii Strashko [Fri, 22 Nov 2019 17:26:17 +0000 (19:26 +0200)]
board: ti: dra7-evm: remove net platform code

The DRA7 has DM_ETH and OF_CONTROL enabled, so remove networking platform
code.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoARM: dts: da850-lcdk: Update DTS files for SPL device tree support
Adam Ford [Wed, 13 Nov 2019 15:46:32 +0000 (09:46 -0600)]
ARM: dts: da850-lcdk: Update DTS files for SPL device tree support

Currently, the da850-lcdk uses SPL_OF_PLATDATA and manually loads
the necessary source code instead of using the auto-generated,
because the drivers don't properly autogenerate the code.

This patch simply enables the various device tree options to
mimic the da850-evm which doesn't need or use OF_PLATDATA for
device tree support.  It does not disable OF_PLATDATA.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agothermal: ti-bandgap: Fix adc value datatype
Faiz Abbas [Mon, 11 Nov 2019 09:45:30 +0000 (15:15 +0530)]
thermal: ti-bandgap: Fix adc value datatype

The CORE_TEMP_SENSOR_MPU register gives a raw adc value which needs to
be indexed into a lookup table to get the actual temperature. Fix the
naming and datatype of the adc value variable.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoconfigs: j721e_evm_a72_defconfig: Enable USB related configs
Vignesh Raghavendra [Mon, 18 Nov 2019 13:46:36 +0000 (19:16 +0530)]
configs: j721e_evm_a72_defconfig: Enable USB related configs

Enable USB host and device related configs.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoarm: dts: k3-j721e: Add DT nodes for USB
Vignesh Raghavendra [Mon, 18 Nov 2019 13:46:35 +0000 (19:16 +0530)]
arm: dts: k3-j721e: Add DT nodes for USB

J721e has two instances of Cadence USB3 controller. Add DT nodes for the
same. USB0 is configured to device mode and USB1 is configured to host
mode. For now only high speed mode is supported.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoenvironment: ti: Add DFU environment variables k3_dfu.h
Vignesh Raghavendra [Mon, 18 Nov 2019 13:46:34 +0000 (19:16 +0530)]
environment: ti: Add DFU environment variables k3_dfu.h

Setup env variables for updating firmwares on eMMC/OSPI/MMC via DFU

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoMerge branch '2020-01-17-improve-aes-support'
Tom Rini [Fri, 17 Jan 2020 18:23:32 +0000 (13:23 -0500)]
Merge branch '2020-01-17-improve-aes-support'

- Add support and tests for AES192 and AES256

4 years agou-boot: fit: add support to decrypt fit with aes
Philippe Reynes [Wed, 18 Dec 2019 17:25:42 +0000 (18:25 +0100)]
u-boot: fit: add support to decrypt fit with aes

This commit add to u-boot the support to decrypt
fit image encrypted with aes. The FIT image contains
the key name and the IV name. Then u-boot look for
the key and IV in his device tree and decrypt images
before moving to the next stage.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
4 years agomkimage: fit: add support to encrypt image with aes
Philippe Reynes [Wed, 18 Dec 2019 17:25:41 +0000 (18:25 +0100)]
mkimage: fit: add support to encrypt image with aes

This commit add the support of encrypting image with aes
in mkimage. To enable the ciphering, a node cipher with
a reference to a key and IV (Initialization Vector) must
be added to the its file. Then mkimage add the encrypted
image to the FIT and add the key and IV to the u-boot
device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
4 years agoaes: add test unit for aes196 and aes256
Philippe Reynes [Mon, 6 Jan 2020 14:22:37 +0000 (15:22 +0100)]
aes: add test unit for aes196 and aes256

This commit add test unit for aes196 and aes256.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoaes: add test unit for aes128
Philippe Reynes [Mon, 6 Jan 2020 14:22:36 +0000 (15:22 +0100)]
aes: add test unit for aes128

This commit add test unit for aes128.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoaes: add support of aes192 and aes256
Philippe Reynes [Mon, 6 Jan 2020 14:22:35 +0000 (15:22 +0100)]
aes: add support of aes192 and aes256

Until now, we only support aes128. This commit add the support
of aes192 and aes256.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoaes: add a define for the size of a block
Philippe Reynes [Mon, 6 Jan 2020 14:22:34 +0000 (15:22 +0100)]
aes: add a define for the size of a block

In the code, we use the size of the key for the
size of the block. It's true when the key is 128 bits,
but it become false for key of 192 bits and 256 bits.
So to prepare the support of aes192  and 256,
we introduce a constant for the iaes block size.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoMerge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Thu, 16 Jan 2020 18:20:51 +0000 (13:20 -0500)]
Merge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc

- Cleanup of fsl_esdhc driver together with arch/defconfig change
- Add quirk for APP_CMD retry

4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Thu, 16 Jan 2020 17:52:07 +0000 (12:52 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell

- Clearfog: Fix SD booting (Baruch)
- Misc updates to MMC handling in SPL to support booting from
  main data partition (vs hardware boot partition) on MVEBU (Baruch)

4 years agoMerge tag 'xilinx-for-v2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot...
Tom Rini [Thu, 16 Jan 2020 14:45:40 +0000 (09:45 -0500)]
Merge tag 'xilinx-for-v2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2020.04

ARM64:
- Add INIT_SPL_RELATIVE dependency

SPL:
- FIT image fix
- Enable customization of bl2_plat_get_bl31_params()

Pytest:
- Add test for octal/hex conversions

Microblaze:
- Fix manual relocation for one SPI instance

Nand:
- Convert zynq/zynqmp drivers to DM

Xilinx:
- Enable boot script location via Kconfig
- Support OF_SEPARATE in board FDT selection
- Remove low level uart setup it is done later by code
- Add support for DEVICE_TREE variable passing for SPL

Zynq:
- Enable jtag boot mode via distro boot
- Removing unused baseaddresses from hardware.h
- DT fixups

ZynqMP:
- Fix emmc boot sequence
- Simplify spl logic around bss and board_init_r()
- Support psu_post_config_data() calling
- Tune mini-nand DTS
- Fix psu wiring for a2197 boards
- Add runtime MMC device boot order filling in spl
- Clear ATF handoff handling with custom bl2_plat_get_bl31_params()
- Add support u-boot.its generation
- Use single image configuration for all platforms
- Enable PANIC_HANG via Kconfig
- DT fixups
- Firmware fixes
- Add support for zcu208 and zcu1285

Versal:
- Fix emmc boot sequence
- Enable board_late_init() by default

4 years agoMerge branch '2020-01-15-master-imports'
Tom Rini [Thu, 16 Jan 2020 14:40:09 +0000 (09:40 -0500)]
Merge branch '2020-01-15-master-imports'

- MediaTek improvements
- Some generic clk improvements
- A few assorted bugfixes

4 years agoconfigs: mediatek: fix mt7623n bpir2 defconfig
Sam Shih [Fri, 10 Jan 2020 08:30:35 +0000 (16:30 +0800)]
configs: mediatek: fix mt7623n bpir2 defconfig

This patch add CONFIG_TARGET_MT7623 into mt7623n_bpir2_defconfig
to fix the mt7623 compile error after building others mediatek target
platform

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agoarm: dts: mediatek: move u-boot properties to -u-boot.dtsi file
Sam Shih [Fri, 10 Jan 2020 08:30:34 +0000 (16:30 +0800)]
arm: dts: mediatek: move u-boot properties to -u-boot.dtsi file

This patch move u-boot properties to -u-boot.dtsi file.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agoAdd support for MT7622 reference board
Sam Shih [Fri, 10 Jan 2020 08:30:33 +0000 (16:30 +0800)]
Add support for MT7622 reference board

This adds a general board file based on MT7622 SoCs from MediaTek.
This commit is adding the basic boot support for the MT7622 rfb.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
4 years agommc: add mmc and sd support for MT7622
Sam Shih [Fri, 10 Jan 2020 08:30:32 +0000 (16:30 +0800)]
mmc: add mmc and sd support for MT7622

This patch add mmc and sd support for Mediatek MT7622 SoCs

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agopower: domain: add power domain support for MT7622
Sam Shih [Fri, 10 Jan 2020 08:30:31 +0000 (16:30 +0800)]
power: domain: add power domain support for MT7622

This patch add power domain support for Mediatek MT7622 SoCs

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
4 years agoclk: mediatek: fix clock-rate overflow problem
Sam Shih [Fri, 10 Jan 2020 08:30:30 +0000 (16:30 +0800)]
clk: mediatek: fix clock-rate overflow problem

This patch fix clock-rate overflow problem in mediatek
clock driver common part.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agoclk: mediatek: add driver for MT7622
Sam Shih [Fri, 10 Jan 2020 08:30:29 +0000 (16:30 +0800)]
clk: mediatek: add driver for MT7622

This patch add clock driver for MediaTek MT7622 SoC.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
4 years agopinctrl: mediatek: add support for different pinctrl
Sam Shih [Fri, 10 Jan 2020 08:30:28 +0000 (16:30 +0800)]
pinctrl: mediatek: add support for different pinctrl

Due to the pinctrl hardware of MT7622 is difference from others
SoC which using the common part of mediatek pinctrl.
So we need to modify the common part of mediatek pinctrl.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agopinctrl: mediatek: add driver for MT7622
Sam Shih [Fri, 10 Jan 2020 08:30:27 +0000 (16:30 +0800)]
pinctrl: mediatek: add driver for MT7622

This patch add Pinctrl driver for MediaTek MT7622 SoC.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agoARM: MediaTek: Add support for MediaTek MT7622 SoC
Sam Shih [Fri, 10 Jan 2020 08:30:26 +0000 (16:30 +0800)]
ARM: MediaTek: Add support for MediaTek MT7622 SoC

Add support for MediaTek MT7622 SoC. This include the file
that will initialize the SoC after boot and its device tree.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agophy: phy-mtk-tphy: make ref clock optional
Chunfeng Yun [Thu, 9 Jan 2020 03:35:10 +0000 (11:35 +0800)]
phy: phy-mtk-tphy: make ref clock optional

If make the ref clock optional, no need refer to fixed-clock when
the ref clock is always on or comes from oscillator directly.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agophy: phy-mtk-tphy: remove the check of -ENOSYS
Chunfeng Yun [Thu, 9 Jan 2020 03:35:09 +0000 (11:35 +0800)]
phy: phy-mtk-tphy: remove the check of -ENOSYS

No need check -ENOSYS anymore after add dummy_enable() for
fixed-clock.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agoclk: fixed_rate: add dummy enable() function
Chunfeng Yun [Thu, 9 Jan 2020 03:35:08 +0000 (11:35 +0800)]
clk: fixed_rate: add dummy enable() function

This is used to avoid clk_enable() return -ENOSYS.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agoclk: add APIs to get (optional) clock by name without a device
Chunfeng Yun [Thu, 9 Jan 2020 03:35:07 +0000 (11:35 +0800)]
clk: add APIs to get (optional) clock by name without a device

Sometimes we may need get (optional) clock without a device,
that means use ofnode.
e.g. when the phy node has subnode, and there is no device created
for subnode, in this case, we need these new APIs to get subnode's
clock.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agoclk: check valid clock by clk_valid()
Chunfeng Yun [Thu, 9 Jan 2020 03:35:06 +0000 (11:35 +0800)]
clk: check valid clock by clk_valid()

Add valid check for clk->dev, it's useful when get optional
clock even when the clk point is valid, but its dev will be
NULL.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agoclk: fix error check for devm_clk_get_optional()
Chunfeng Yun [Thu, 9 Jan 2020 03:35:05 +0000 (11:35 +0800)]
clk: fix error check for devm_clk_get_optional()

If skip all return error number, it may skip some real error cases,
so only skip the error when the clock is not provided in DTS

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agoclk: mediatek: mt7629: add support for ssusbsys
Chunfeng Yun [Thu, 9 Jan 2020 03:35:04 +0000 (11:35 +0800)]
clk: mediatek: mt7629: add support for ssusbsys

The SSUSB IP's clocks come from ssusbsys module on mt7629,
so add its driver

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
4 years agoARM: MediaTek: add basic support for MT8512 boards
mingming lee [Tue, 31 Dec 2019 03:29:26 +0000 (11:29 +0800)]
ARM: MediaTek: add basic support for MT8512 boards

This adds a general board file based on MT8512 SoCs from MediaTek.

Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.

This commit is adding the basic boot support for the MT8512 eMMC board.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
4 years agommc: mtk-sd: fix hang when data read quickly
mingming lee [Tue, 31 Dec 2019 03:29:25 +0000 (11:29 +0800)]
mmc: mtk-sd: fix hang when data read quickly

For CMD21 tuning data, the 128/64 bytes data may coming in very
short time, before msdc_start_data(), the read data has already
come, in this case, clear MSDC_INT will cause the interrupt disappear
and lead to the thread hang.

the solution is just clear all interrupts before command was sent.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
4 years agommc: mtk-sd: add support for MediaTek MT8512/MT8110 SoCs
mingming lee [Tue, 31 Dec 2019 03:29:24 +0000 (11:29 +0800)]
mmc: mtk-sd: add support for MediaTek MT8512/MT8110 SoCs

This patch adds mmc support for MediaTek MT8512/MT8110 SoCs.
MT8512/MT8110 SoCs puts the tune register at top layer, so
need add new code to support it.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
4 years agopinctrl: mediatek: add driver for MT8512
mingming lee [Tue, 31 Dec 2019 03:29:23 +0000 (11:29 +0800)]
pinctrl: mediatek: add driver for MT8512

Add Pinctrl driver for MediaTek MT8512 SoC.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
4 years agoclk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll
mingming lee [Tue, 31 Dec 2019 03:29:22 +0000 (11:29 +0800)]
clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll

Add configurable pcw_chg_reg/ibits/fmin to mtk_pll to support mt8512

4 years agoclk: mediatek: add set_clr_upd mux type flow
mingming lee [Tue, 31 Dec 2019 03:29:21 +0000 (11:29 +0800)]
clk: mediatek: add set_clr_upd mux type flow

Add new set_clr_upd mux type and related operation to
mtk common clock driver to support mt8512

4 years agoclk: mediatek: add driver support for MT8512
mingming lee [Tue, 31 Dec 2019 03:29:20 +0000 (11:29 +0800)]
clk: mediatek: add driver support for MT8512

Add clock driver for MediaTek MT8512 SoC, include topckgen,
apmixedsys and infracfg support.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
4 years agoARM: MediaTek: Add support for MediaTek MT8512 SoC
mingming lee [Tue, 31 Dec 2019 03:29:19 +0000 (11:29 +0800)]
ARM: MediaTek: Add support for MediaTek MT8512 SoC

Add support for MediaTek MT8512 SoC. This include the file
that will initialize the SoC after boot and its device tree.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
4 years agoMAINTAINERS: Fix mail
Sam Protsenko [Tue, 14 Jan 2020 17:54:12 +0000 (19:54 +0200)]
MAINTAINERS: Fix mail

Sam doesn't work for Linaro anymore, so Linaro mail is not valid. Change
it to his home mail instead.

Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
4 years agocmd/blk_common: clarify no partition error message
Alexandre Besnard [Fri, 20 Dec 2019 14:25:22 +0000 (15:25 +0100)]
cmd/blk_common: clarify no partition error message

When no partition table is found, users should be warned so.
Warning that no device is available in this case could be misleading,
especially as it is the same error when no device is selected.

Signed-off-by: Alexandre Besnard <alexandre.besnard@softathome.com>
4 years agoarm: mvebu: clearfog: update eMMC documentation
Baruch Siach [Wed, 15 Jan 2020 07:08:10 +0000 (09:08 +0200)]
arm: mvebu: clearfog: update eMMC documentation

SPL now automatically selects the correct U-Boot image offset for both
eMMC and SD card. No need to tweak
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR anymore.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
4 years agoarm: mvebu: clearfog: set uboot image SD card offset
Baruch Siach [Wed, 15 Jan 2020 07:08:09 +0000 (09:08 +0200)]
arm: mvebu: clearfog: set uboot image SD card offset

Armada 38x ROM skips the first SD card offset when loading SPL. This
affects the location of the main U-Boot image. SPL MMC code now supports
U-Boot image offset based on run-time detection of the boot partition.
Use this feature to make the same generated image support both SD card
and eMMC boot partition.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
4 years agospl: mmc: support uboot image offset on main partition
Baruch Siach [Wed, 15 Jan 2020 07:08:08 +0000 (09:08 +0200)]
spl: mmc: support uboot image offset on main partition

On Armada 38x platforms the ROM code loads SPL from offset 0 of eMMC
hardware boot partitions. When there are no boot partitions (i.e. SD
card) the ROM skips the first sector that usually contains the (logical)
partition table. Since the generated .kwb image contains the main U-Boot
image in a fixed location (0x140 sectors by default), we end up with the
main U-Boot image in offset of 1 sector. The current workaround is to
manually set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x141 to
compensate for that.

This patch uses the run-time detected boot partition to determine the
right offset of the main U-Boot partition. The generated .kwb image is
now compatible with both eMMC boot partition, and SD card main data
partition.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
4 years agoconfigs: clearfog: enable SPL_DM_GPIO to fix boot from SD
Baruch Siach [Sun, 8 Dec 2019 07:41:41 +0000 (09:41 +0200)]
configs: clearfog: enable SPL_DM_GPIO to fix boot from SD

SPL needs DM GPIO to read the SD card-detect signal. This complements
the fix in commit 70bae02f71d4 ("arm: mvebu: clearfog: fix boot from SD
card").

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
4 years agommc: config help typo fix
Joel Johnson [Sat, 11 Jan 2020 16:08:15 +0000 (09:08 -0700)]
mmc: config help typo fix

Fix typo in description of MMC_QUIRKS config option.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
4 years agommc: add additional quirk for APP_CMD retry
Joel Johnson [Sat, 11 Jan 2020 16:08:14 +0000 (09:08 -0700)]
mmc: add additional quirk for APP_CMD retry

It was observed (on ClearFog Base) that sending MMC APP_CMD returned
an error on the first attempt. The issue appears to be timing related
since even inserting a puts() short debug entry before the execution
added sufficient delay to receive success on first attempt.

Follow the existing quirks pattern to retry if initial issuance
failed so as to not introduce any delay unless needed.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
4 years agoDrop CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK usage
Yangbo Lu [Thu, 19 Dec 2019 10:59:30 +0000 (18:59 +0800)]
Drop CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK usage

The eSDHC reference clocks should be provided by speed.c in arch/.
And we do not need CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK option to
select which clock to use. Because we can make the driver to select
the periperhal clock which is better (provides higher frequency)
automatically if its value is provided by speed.c.

This patch is to drop this option and make driver to select clock
automatically. Also fix peripheral clock calculation issue in
fsl_lsch2_speed.c/fsl_lsch3_speed.c.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
4 years agoconfigs: ls1028a: use default SDHC clock divider value
Yangbo Lu [Thu, 16 Jan 2020 05:19:44 +0000 (13:19 +0800)]
configs: ls1028a: use default SDHC clock divider value

The SDHC clock divider value for LS1028A should be default 2,
not 1.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
4 years agoAdd global variable sdhc_per_clk for arm/powerpc
Yangbo Lu [Thu, 19 Dec 2019 10:59:28 +0000 (18:59 +0800)]
Add global variable sdhc_per_clk for arm/powerpc

The QorIQ eSDHC controller supports two reference clocks. They are
platform clock and periperhal clock. The global variable sdhc_clk
has already been used for platform clock.
This patch is to add another global variable sdhc_per_clk for
periperhal clock, which provides higher frequency and is required
to be used for SD UHS and eMMC HS200/HS400 speed modes.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
4 years agopowerpc/mpc85xx: drop eSDHC periperhal clock code
Yangbo Lu [Thu, 19 Dec 2019 10:59:27 +0000 (18:59 +0800)]
powerpc/mpc85xx: drop eSDHC periperhal clock code

The below patch added eSDHC periperhal clock code initially.
2d9ca2c mmc: fsl_esdhc: Add peripheral clock support

The purpose was to fix up device tree properties "peripheral-frequency"
so that linux could get the periperhal clock by it.
However the implementation on both u-boot and linux was only
for a Freescale SDK release. The linux part implementation had never
been upstreamed. These code should not have been exist on u-boot
mainline.

Let's remove the powerpc part changes but keep the changes in
fsl_esdhc driver. The changes in fsl_esdhc driver could be utilized
to support SD UHS and eMMC HS200/HS400 speed modes for current
Layerscape ARM platforms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
4 years agommc: fsl_esdhc: drop useless fdt fixup
Yangbo Lu [Thu, 19 Dec 2019 10:59:26 +0000 (18:59 +0800)]
mmc: fsl_esdhc: drop useless fdt fixup

The fdt fixup for properties "peripheral-frequency" and "adapter-type"
was once for a Freescale SDK release. The properties haven't been existed
in linux mainline. Drop these useless code.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
4 years agommc: fsl_esdhc_imx: drop QorIQ eSDHC specific peripheral clock code
Yangbo Lu [Thu, 19 Dec 2019 10:59:25 +0000 (18:59 +0800)]
mmc: fsl_esdhc_imx: drop QorIQ eSDHC specific peripheral clock code

Drop QorIQ eSDHC specific peripheral clock code.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
4 years agotest/py: use valid device tree in test_fit.py
Heinrich Schuchardt [Wed, 18 Dec 2019 10:05:59 +0000 (11:05 +0100)]
test/py: use valid device tree in test_fit.py

The device tree compiler expects that a node with a unit-address has a reg
property.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoAdd dependencies for MALLOC_F and OF_LIBFDT
Sean Anderson [Wed, 18 Dec 2019 02:40:09 +0000 (21:40 -0500)]
Add dependencies for MALLOC_F and OF_LIBFDT

Some features implicitly depended on MALLOC_F and OF_LIBFDT and would
fail at link-time if these features were not enabled.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
4 years agoInclude missing headers for asm-generic/sections.h
Sean Anderson [Wed, 18 Dec 2019 02:22:42 +0000 (21:22 -0500)]
Include missing headers for asm-generic/sections.h

asm-generic/sections.h references ulong but does not include
linux/types.h

Signed-off-by: Sean Anderson <seanga2@gmail.com>
4 years agodma: Add stub of dma_memcpy and dma_get_device
Vignesh Raghavendra [Fri, 15 Nov 2019 11:30:42 +0000 (17:00 +0530)]
dma: Add stub of dma_memcpy and dma_get_device

Add stub for dma_memcpy() and dma_get_device when CONFIG_DMA is
disabled. This avoids ifdefs in driver code using DMA APIs

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoKconfig: Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA
Vignesh Raghavendra [Fri, 15 Nov 2019 11:30:41 +0000 (17:00 +0530)]
Kconfig: Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA

Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA. This allows to use
macros such as CONFIG_IS_ENABLED() that allow conditional compilation of
code for SPL and U-Boot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoMerge tag 'efi-2020-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Wed, 15 Jan 2020 17:29:23 +0000 (12:29 -0500)]
Merge tag 'efi-2020-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-04-rc1-2

Bug fixes for the UEFI sub-system are provided:

* imply VIDEO_ANSI for correct cursor positioning and colors
* fix issues in the UEFI block device driver
* add missing documentation

4 years agoMerge tag 'u-boot-imx-20200115' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Wed, 15 Jan 2020 14:22:15 +0000 (09:22 -0500)]
Merge tag 'u-boot-imx-20200115' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

-----------------------------------
- imx8:
add capricorn giedi deneb boards
- imx6:
fixed fow wandboard
- imx7: DM_ETHER for pico-imx7d
- fsl_esdhc_imx: add broken-cd property
- New SOC: IMXRT10xx

Travis:
https://travis-ci.org/sbabic/u-boot-imx/builds/637126531

4 years agoMerge branch 'master' of git://git.denx.de/u-boot-tegra
Tom Rini [Wed, 15 Jan 2020 02:48:32 +0000 (21:48 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra

- Important bugfix for some Tegra platforms

4 years agoefi_loader: imply VIDEO_ANSI
Heinrich Schuchardt [Tue, 14 Jan 2020 23:49:35 +0000 (00:49 +0100)]
efi_loader: imply VIDEO_ANSI

UEFI programs like GRUB make change terminal colors which requires support
for ANSI escape sequences.

Let CONFIG_EFI_LOADER=y imply CONFIG_VIDEO_ANSI.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_driver: debug output efi_uc_start, efi_uc_stop
Heinrich Schuchardt [Fri, 10 Jan 2020 11:33:16 +0000 (12:33 +0100)]
efi_driver: debug output efi_uc_start, efi_uc_stop

Use the correct printf codes for the debug output in efi_uc_start() and
efi_uc_stop().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_driver: fix efi_uc_stop()
Heinrich Schuchardt [Thu, 9 Jan 2020 22:26:43 +0000 (23:26 +0100)]
efi_driver: fix efi_uc_stop()

Use the correct protocol in efi_uc_stop() when detaching the driver from
the controller.

Change the block IO unit test for the block device driver to throw an error
instead of a todo if teardown fails.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_selftest: enable CONFIG_CMD_POWEROFF
Heinrich Schuchardt [Sat, 11 Jan 2020 09:59:08 +0000 (10:59 +0100)]
efi_selftest: enable CONFIG_CMD_POWEROFF

For automating testing we should be able to power off the test system.
The implementation of EFI_RESET_SHUTDOWN requires the do_poweroff()
function which is only available if CONFIG_CMD_POWEROFF=y.

Enable CONFIG_CMD_POWEROFF if PSCI reset is available.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: describe returning of control
Heinrich Schuchardt [Fri, 10 Jan 2020 21:06:54 +0000 (22:06 +0100)]
efi_loader: describe returning of control

Provide a sober description of how control can be returned by a UEFI
binary.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: document functions in efi_rng.c
Heinrich Schuchardt [Thu, 9 Jan 2020 19:49:44 +0000 (20:49 +0100)]
efi_loader: document functions in efi_rng.c

Add the missing Sphinx documentation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoimx: imxrt1050-evk: Add support for the NXP i.MXRT1050-EVK
Giulio Benetti [Fri, 10 Jan 2020 14:51:48 +0000 (15:51 +0100)]
imx: imxrt1050-evk: Add support for the NXP i.MXRT1050-EVK

This commit adds board support for i.MXRT1050-EVK from NXP. This board
is an evaluation kit provided by NXP for i.MXRT105x processor family.

More information about this board can be found here:
https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK

The initial supported/tested devices include:
- Debug serial
- SD

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agoimx: Add basic support for the NXP IMXRT10xx SoC family
Giulio Benetti [Fri, 10 Jan 2020 14:51:47 +0000 (15:51 +0100)]
imx: Add basic support for the NXP IMXRT10xx SoC family

Add i.IMXRT family basic support.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agommc: fsl_esdhc: add compatible for fsl, imxrt-usdhc
Giulio Benetti [Fri, 10 Jan 2020 14:51:46 +0000 (15:51 +0100)]
mmc: fsl_esdhc: add compatible for fsl, imxrt-usdhc

Add compatible "fsl,imxrt-usdhc" to make mmc working on i.MXRT platforms
with CONFIG_DM_MMC=y.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agommc: fsl_esdhc: make if(CONFIG_IS_ENABLED(CLK)) an #if statement
Giulio Benetti [Fri, 10 Jan 2020 14:51:45 +0000 (15:51 +0100)]
mmc: fsl_esdhc: make if(CONFIG_IS_ENABLED(CLK)) an #if statement

Not all architectures(i.e. i.MXRT) support mxc_get_clock() and use DM_CLK
instead. So building could result in failure due to missing
mxc_get_clock().

Make if(CONFIG_IS_ENABLED(CLK)) an #if statement.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agoram: add SDRAM driver for i.MXRT SoCs
Giulio Benetti [Fri, 10 Jan 2020 14:51:44 +0000 (15:51 +0100)]
ram: add SDRAM driver for i.MXRT SoCs

Add SDRAM driver for i.MXRT SoCs.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agoserial_lpuart: add support for i.MXRT
Giulio Benetti [Fri, 10 Jan 2020 14:51:43 +0000 (15:51 +0100)]
serial_lpuart: add support for i.MXRT

Add i.MXRT compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.

Also according to RM, the Receive RX FIFO Enable (RXFE) field in LPUART
FIFO register is bit 3, so this definition should change to 0x08 as done
for i.MX8. It needs also to set baudrate the same way as i.MX8 does.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agoserial_lpuart: add clock enable if CONFIG_CLK is defined
Giulio Benetti [Fri, 10 Jan 2020 14:47:05 +0000 (15:47 +0100)]
serial_lpuart: add clock enable if CONFIG_CLK is defined

This driver assumes that lpuart clock is already enabled before probing
but using DM only lpuart won't be automatically enabled so add
clk_enable() when probing if CONFIG_CLK is defined. If clock is not
found, because DM is not used, let's emit a warning and proceed, because
serial clock could also be already enabled by non DM code. If clock is
found but cna't be enabled then return with error.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agoARM: dts: imxrt1050: add dtsi file
Giulio Benetti [Fri, 10 Jan 2020 14:47:04 +0000 (15:47 +0100)]
ARM: dts: imxrt1050: add dtsi file

Add dtsi file for i.MXRT1050.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agogpio: mxc_gpio: add support for i.MXRT1050
Giulio Benetti [Fri, 10 Jan 2020 14:47:03 +0000 (15:47 +0100)]
gpio: mxc_gpio: add support for i.MXRT1050

Add i.MXRT1050 support, there are 5 GPIO banks.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agopinctrl: add i.MXRT driver
Giulio Benetti [Fri, 10 Jan 2020 14:47:02 +0000 (15:47 +0100)]
pinctrl: add i.MXRT driver

Add i.MXRT pinctrl driver.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agoclk: imx: add i.IMXRT1050 clk driver
Giulio Benetti [Fri, 10 Jan 2020 14:47:01 +0000 (15:47 +0100)]
clk: imx: add i.IMXRT1050 clk driver

Add i.MXRT1050 clk driver support.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agoclk: imx: pfd: add set_rate()
Giulio Benetti [Fri, 10 Jan 2020 14:47:00 +0000 (15:47 +0100)]
clk: imx: pfd: add set_rate()

Implement set_rate() for pfd.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
4 years agoclk: imx: pllv3: add support for PLLV3_AV type
Giulio Benetti [Fri, 10 Jan 2020 14:46:59 +0000 (15:46 +0100)]
clk: imx: pllv3: add support for PLLV3_AV type

Add support for PLLV3 AV type.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agoclk: imx: pllv3: add PLLV3_SYS support
Giulio Benetti [Fri, 10 Jan 2020 14:46:58 +0000 (15:46 +0100)]
clk: imx: pllv3: add PLLV3_SYS support

Add PLLV3_SYS support by adding set/get_rate() for PLLV3_SYS but keeping
generic enable()/disable(). Add a different driver because ops are
different respect to GENERIC/USB.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
4 years agoclk: imx: pllv3: add set_rate() support
Giulio Benetti [Fri, 10 Jan 2020 14:46:57 +0000 (15:46 +0100)]
clk: imx: pllv3: add set_rate() support

Add generic set_rate() support.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
4 years agoclk: imx: pllv3: add disable() support
Giulio Benetti [Fri, 10 Jan 2020 14:46:56 +0000 (15:46 +0100)]
clk: imx: pllv3: add disable() support

Add disable() support.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
4 years agoclk: imx: pllv3: add enable() support
Giulio Benetti [Fri, 10 Jan 2020 14:46:55 +0000 (15:46 +0100)]
clk: imx: pllv3: add enable() support

Before set_rate() pllv3 needs enable() to power the pll up.
Add enable() taking into account different power_bit and
different powerup_set, because some pll needs its power_bit to be
set or reset to be powered on.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agoclk: imx: pllv3: set div_mask differently if PLLV3 is GENERIC or USB
Giulio Benetti [Fri, 10 Jan 2020 14:46:54 +0000 (15:46 +0100)]
clk: imx: pllv3: set div_mask differently if PLLV3 is GENERIC or USB

div_mask is different for GENERIC and USB pll, so set it according.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
4 years agoclk: imx: pllv3: register PLLV3 GENERIC and USB as 2 different clocks
Giulio Benetti [Fri, 10 Jan 2020 14:46:53 +0000 (15:46 +0100)]
clk: imx: pllv3: register PLLV3 GENERIC and USB as 2 different clocks

Better to register the 2 clock as 2 different drivers because they work
slightly differently depending on power_bit and powerup_set bits coming
on next patches.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>