powerpc/mpc85xx: drop eSDHC periperhal clock code
authorYangbo Lu <yangbo.lu@nxp.com>
Thu, 19 Dec 2019 10:59:27 +0000 (18:59 +0800)
committerPeng Fan <peng.fan@nxp.com>
Thu, 16 Jan 2020 05:16:25 +0000 (13:16 +0800)
The below patch added eSDHC periperhal clock code initially.
2d9ca2c mmc: fsl_esdhc: Add peripheral clock support

The purpose was to fix up device tree properties "peripheral-frequency"
so that linux could get the periperhal clock by it.
However the implementation on both u-boot and linux was only
for a Freescale SDK release. The linux part implementation had never
been upstreamed. These code should not have been exist on u-boot
mainline.

Let's remove the powerpc part changes but keep the changes in
fsl_esdhc driver. The changes in fsl_esdhc driver could be utilized
to support SD UHS and eMMC HS200/HS400 speed modes for current
Layerscape ARM platforms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
arch/powerpc/cpu/mpc85xx/speed.c
arch/powerpc/include/asm/config_mpc85xx.h
include/configs/T1040QDS.h
include/configs/T208xQDS.h
include/e500.h
scripts/config_whitelist.txt

index 15b05fcc513f2af26d25f520d6140b38a4912b07..0c5252edc272029bffaa4cfd08012a75c63fae94 100644 (file)
@@ -69,8 +69,7 @@ void get_sys_info(sys_info_t *sys_info)
                [14] = 4,       /* CC4 PPL / 4 */
        };
        uint i, freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS];
-#if !defined(CONFIG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV) || \
-       defined(CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK)
+#if !defined(CONFIG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV)
        uint rcw_tmp;
 #endif
        uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS];
@@ -450,48 +449,6 @@ void get_sys_info(sys_info_t *sys_info)
 #endif
 #endif
 
-#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
-#if defined(CONFIG_ARCH_T2080)
-#define ESDHC_CLK_SEL  0x00000007
-#define ESDHC_CLK_SHIFT        0
-#define ESDHC_CLK_RCWSR        15
-#else  /* Support T1040 T1024 by now */
-#define ESDHC_CLK_SEL  0xe0000000
-#define ESDHC_CLK_SHIFT        29
-#define ESDHC_CLK_RCWSR        7
-#endif
-       rcw_tmp = in_be32(&gur->rcwsr[ESDHC_CLK_RCWSR]);
-       switch ((rcw_tmp & ESDHC_CLK_SEL) >> ESDHC_CLK_SHIFT) {
-       case 1:
-               sys_info->freq_sdhc = freq_c_pll[CONFIG_SYS_SDHC_CLK];
-               break;
-       case 2:
-               sys_info->freq_sdhc = freq_c_pll[CONFIG_SYS_SDHC_CLK] / 2;
-               break;
-       case 3:
-               sys_info->freq_sdhc = freq_c_pll[CONFIG_SYS_SDHC_CLK] / 3;
-               break;
-#if defined(CONFIG_SYS_SDHC_CLK_2_PLL)
-       case 4:
-               sys_info->freq_sdhc = freq_c_pll[CONFIG_SYS_SDHC_CLK] / 4;
-               break;
-#if defined(CONFIG_ARCH_T2080)
-       case 5:
-               sys_info->freq_sdhc = freq_c_pll[1 - CONFIG_SYS_SDHC_CLK];
-               break;
-#endif
-       case 6:
-               sys_info->freq_sdhc = freq_c_pll[1 - CONFIG_SYS_SDHC_CLK] / 2;
-               break;
-       case 7:
-               sys_info->freq_sdhc = freq_c_pll[1 - CONFIG_SYS_SDHC_CLK] / 3;
-               break;
-#endif
-       default:
-               sys_info->freq_sdhc = 0;
-               printf("Error: Unknown SDHC peripheral clock select!\n");
-       }
-#endif
 #else /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
 
        for_each_cpu(i, cpu, cpu_numcores(), cpu_mask()) {
@@ -673,15 +630,11 @@ int get_clocks (void)
        gd->arch.i2c2_clk = gd->arch.i2c1_clk;
 
 #if defined(CONFIG_FSL_ESDHC)
-#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
-       gd->arch.sdhc_clk = sys_info.freq_sdhc / 2;
-#else
 #if defined(CONFIG_ARCH_MPC8569) || defined(CONFIG_ARCH_P1010)
        gd->arch.sdhc_clk = gd->bus_clk;
 #else
        gd->arch.sdhc_clk = gd->bus_clk / 2;
 #endif
-#endif
 #endif /* defined(CONFIG_FSL_ESDHC) */
 
 #if defined(CONFIG_CPM2)
index 946e74a93bb302af27a0e19e83d417efaef38bfc..4ca1e2b325f1e105e18264aa69ca9ca60ebbfd19 100644 (file)
 #define CONFIG_SYS_FMAN_V3
 #define CONFIG_FM_PLAT_CLK_DIV 1
 #define CONFIG_SYS_FM1_CLK             CONFIG_FM_PLAT_CLK_DIV
-#define CONFIG_SYS_SDHC_CLK            0/* Select SDHC CLK begining from PLL1
-                                           per rcw field value */
-#define CONFIG_SYS_SDHC_CLK_2_PLL      /* Select SDHC CLK from 2 PLLs */
 #define CONFIG_SYS_FM_MURAM_SIZE       0x30000
 #define CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
 #define CONFIG_SYS_FSL_TBCLK_DIV       16
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        2
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  8
 #define CONFIG_SYS_FM1_CLK             0
-#define CONFIG_SYS_SDHC_CLK            0/* Select SDHC CLK begining from PLL1
-                                           per rcw field value */
 #define CONFIG_QBMAN_CLK_DIV           1
 #define CONFIG_SYS_FM_MURAM_SIZE       0x30000
 #define CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
 #define CONFIG_PME_PLAT_CLK_DIV                1
 #define CONFIG_SYS_PME_CLK             CONFIG_PME_PLAT_CLK_DIV
 #define CONFIG_SYS_FM1_CLK             0
-#define CONFIG_SYS_SDHC_CLK            1/* Select SDHC CLK begining from PLL2
-                                           per rcw field value */
-#define CONFIG_SYS_SDHC_CLK_2_PLL      /* Select SDHC CLK from 2 PLLs */
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  8
 #define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_FM_MURAM_SIZE       0x28000
index b8456984e26e9309ee5b4ea184c5e11189a4d3cf..aa2a8b00de90f55b77a43b23158e65e9cc16c838 100644 (file)
@@ -481,7 +481,6 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 #ifdef CONFIG_MMC
-#define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_FSL_ESDHC_ADAPTER_IDENT
 #endif
index 2078b9d36952c267d06c34b558e7365b476e391a..be5a658d7ee5f8d4f0fe9aa074d4e7e76520c386 100644 (file)
@@ -630,7 +630,6 @@ unsigned long get_board_ddr_clk(void);
  * SDHC
  */
 #ifdef CONFIG_MMC
-#define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
index 1acf7784dfc9ea04be7a5f803dbd39778a2c9ea5..255f46bf1e54c0ac98c46e35e20997819eb184a9 100644 (file)
@@ -18,7 +18,6 @@ typedef struct
        unsigned long freq_ddrbus;
        unsigned long freq_localbus;
        unsigned long freq_qe;
-       unsigned long freq_sdhc;
 #ifdef CONFIG_SYS_DPAA_FMAN
        unsigned long freq_fman[CONFIG_SYS_NUM_FMAN];
 #endif
index cd154738a422c7e7cb3a02766b901562e4a2f77e..95c0ccc9d3ff8cce1cd3920c3706ba1a28bfb4fa 100644 (file)
@@ -3777,8 +3777,6 @@ CONFIG_SYS_SCRATCH_VA
 CONFIG_SYS_SCSI_MAX_DEVICE
 CONFIG_SYS_SCSI_MAX_LUN
 CONFIG_SYS_SCSI_MAX_SCSI_ID
-CONFIG_SYS_SDHC_CLK
-CONFIG_SYS_SDHC_CLK_2_PLL
 CONFIG_SYS_SDIO0
 CONFIG_SYS_SDIO0_MAX_CLK
 CONFIG_SYS_SDIO1