Faiz Abbas [Tue, 19 Nov 2019 08:36:41 +0000 (14:06 +0530)]
configs: am65x_evm: Add Support for ADMA
Add Support for ADMA in a53 and r5 defconfigs.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Adam Ford [Sun, 12 Jan 2020 12:52:10 +0000 (06:52 -0600)]
ARM: dts: omap3/omap35 Torpedo and SOM-LV: Unify and shrink SPL dtb
None of these boards boot, but the solution appears to be the same.
All the boards have SPL that is too large. With a few defconfig
options removed, these corresponding options can be removed from
their respective SPL dtb files.
This patch unifies the DM37/OMAP35 boards' -u-boot.dtsi files
to remove gpio's, i2c, bandgap, thermal zones, unneeded uarts, and
unneeded MMC nodes.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Adam Ford [Sun, 12 Jan 2020 12:52:09 +0000 (06:52 -0600)]
configs: omap3/35_logic and omap3/35_logic_somlv: Reduce SPL size
Currently the DM37 and OMAP35 boards do not boot due to SPL
bring too large.
SPL doesn't need GPIO, I2C nor MMC sector access since it uses
a FAT file system.
This patch unifies all these boards to remove these unused features
from their defconfigs
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Fri, 10 Jan 2020 19:35:23 +0000 (14:35 -0500)]
configs: Add configs for J721e High Security EVM
Add new defconfig files for the J721e High Security EVM.
These defconfigs are the same as for the non-secure part, except for:
CONFIG_TI_SECURE_DEVICE option set to 'y'
CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y'
CONFIG_SPL_FIT_IMAGE_POST_PROCESS option set to 'y'
CONFIG_BOOTCOMMAND uses FIT images for booting
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Fri, 10 Jan 2020 19:35:22 +0000 (14:35 -0500)]
arm: K3: Increase default SYSFW image size allocation
The memory allocated to store the FIT image containing SYSFW and board
configuration data is statically defined to the largest size expected.
This was 276000 bytes but now needs to be grown to 277000 to make room
for the slightly larger SYSFW image used on J721e High-Security devices.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Fri, 10 Jan 2020 19:35:21 +0000 (14:35 -0500)]
arm: K3: Disable ROM configured firewalls
ROM configures certain firewalls based on its usage, which includes
the one in front of boot peripherals. In specific case of boot
peripherals, ROM does not open up the full address space corresponding
to the peripherals. Like in OSPI, ROM only configures the firewall region
for 32 bit address space and mark 64bit address space flash regions
as in-accessible.
When security-cfg is initialized by sysfw, all the non-configured
firewalls are kept in bypass state using a global setting. Since ROM
configured firewalls for certain peripherals, these will not be touched.
So when bootloader touches any of the address space that ROM marked as
in-accessible, system raises a firewall exception causing boot hang.
It would have been ideal if sysfw cleans up the ROM configured boot
peripheral firewalls. Given the memory overhead to store this
information provided by ROM and the boot time increase in re configuring
the firewalls, it is concluded to clean this up in bootloaders.
So disable all the firewalls that ROM doesn't open up the full address
space.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Venkateswara Rao Mandela <venkat.mandela@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Fri, 10 Jan 2020 19:35:20 +0000 (14:35 -0500)]
arm: K3: Fix header comment match AM6 specific file function
This file used to be the common location for K3 init when AM6 was the
only device, but common code was moved to common.c and this file became
AM6 specific, correct this header text.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Fri, 10 Jan 2020 19:35:19 +0000 (14:35 -0500)]
configs: ti: Factor out call to 'args_mmc' into MMC common environment
Both 'loadfit' and 'mmcloados' start with a call to 'args_mmc' so this
can be factored out to before eithers only call site. This also allows us
to remove that call from 'loadfit', which should not have been calling it
anyway as that command should not be MMC specific. Without the call to
'args_mmc' the command 'loadfit' becomes just a call to 'run_fit' so
remove the indirection and call 'run_fit' directly, this removes the need
for 'loadfit' command (which was misnamed anyway). Drop it.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Fri, 10 Jan 2020 19:35:18 +0000 (14:35 -0500)]
configs: j721e_evm.h: Sync J721e environment configuration with AM65x
Some of the environment configuration in AM65x is not available in
J721e due to additions on one but not the other. These two platforms
are similar enough these common definitions should be factored out
to a common area, prepare for this by synchronizing them.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 10 Jan 2020 13:11:30 +0000 (15:11 +0200)]
arm: am57xx: env: Fix DFU variables
Commit
8502fe84a4fc ("configs: am57xx_evm: define
CONFIG_SPL_LOAD_FIT_ADDRESS for SPL-DFU") implements incorrect ifdef
logic, which leads to DFU variables absence in non-SPL environment. Fix
that in order to bring back DFU variables, by reflecting the logic in
include/configs/dra7xx_evm.h.
Fixes:
8502fe84a4fc ("configs: am57xx_evm: define CONFIG_SPL_LOAD_F...")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 10 Jan 2020 09:31:57 +0000 (15:01 +0530)]
arm: dts: k3-am654-r5-base-board: Fix power-domains for wkup_vtm0
wkup_vtm populates only 1 power-domain cell in it's node. But the
power-domain cell are defined as 2. Due to this the following warning
comes during build:
arch/arm/dts/k3-am654-r5-base-board.dtb: Warning (power_domains_property):
/interconnect@100000/interconnect@
28380000/interconnect@
42040000/
wkup_vtm@
42050000:power-domains: property size (8) too small for cell size 2
Fix this by updating the power-domain cells.
Fixes:
cfa6bd549c ("arm: dts: k3-am654-r5-base-board: Add VTM node")
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Keerthy [Fri, 10 Jan 2020 09:22:05 +0000 (14:52 +0530)]
power: regulator: tps62360_regulator: Convert ofdata_to_platdata to the missing probe
commit
29f7d05a347a ("dm: core: Move ofdata_to_platdata() call earlier")
introduces changes in the order of device_probe execution.
ofdata_to_platdata now comes before the probe function which resulted in
a deadlock and caused boot hang on AM6 devices.
Deadlock sequence: tps62360_regulator_ofdata_to_platdata --> i2c_get_chip
--> device_probe(tps62360) --> tps62360_regulator_ofdata_to_platdata
Hence convert ofdata_to_platdata to the missing probe function to fix the
hang.
Fixes:
22e8f18980d6 ("power: regulator: tps6236x: add support for tps6236x regulators")
Signed-off-by: Keerthy <j-keerthy@ti.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Tue, 7 Jan 2020 23:22:29 +0000 (18:22 -0500)]
arm: mach-k3: security: Clean image out of cache before authentication
On K3 systems U-Boot runs on both an R5 and a large ARM cores (usually
A53 or A72). The large ARMs are coherent with the DMA controllers and
the SYSFW that perform authentication. And previously the R5 core did
not enable caches. Now that R5 does enable caching we need to be sure
to clean out any of the image that may still only be in cache before we
read it using external DMA for authentication.
Although not expected to happen, it may be possible that the data was
read back into cache after the flush but before the external operation,
in this case we must invalidate our stale local cached version.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Tue, 7 Jan 2020 23:12:40 +0000 (18:12 -0500)]
arm: mach-k3: Warn when node to disable is not found
Not finding a node that we try to disable does not always need to be
fatal to boot but should at least print out a warning. Return error
from fdt_disable_node as it did fail to disable the node, but only
warn in the case of disabling the TRNG as this will not prevent boot.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Tue, 7 Jan 2020 21:27:52 +0000 (16:27 -0500)]
defconfigs: am43xx_hs_evm: Sync HS and non-HS defconfigs
Sync new additions to non-HS defconfig with HS defconfig.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Tue, 7 Jan 2020 21:24:14 +0000 (16:24 -0500)]
defconfigs: am335x_hs_evm: Sync HS and non-HS defconfigs
Sync new additions to non-HS defconfig with HS defconfig.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Tue, 7 Jan 2020 07:45:57 +0000 (13:15 +0530)]
configs: j721e_evm_a72_defconfig: Enable I2C and EEPROM support
Enable I2C and EEPROM related configs for A72 SPL/U-Boot.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Tue, 7 Jan 2020 07:45:56 +0000 (13:15 +0530)]
arm64: dts: k3-j721e-common-proc-board: Fully enable wkup_i2c0 use
Make the wkup_i2c0 module usable across all stages of U-Boot by adding
the needed definitions including the associated pinmux definitions.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Tue, 7 Jan 2020 07:45:55 +0000 (13:15 +0530)]
board: ti: j721e: Print board name and version during boot
Print the board name and ver along with the DT Model.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Tue, 7 Jan 2020 07:45:54 +0000 (13:15 +0530)]
board: ti: j721e: Use EEPROM-based board detection
The TI J721E EVM system on module (SOM), the common processor board, and
the associated daughtercards have on-board I2C-based EEPROMs containing
board config data. Use the board detection infrastructure to do the
following:
1) Parse the J721E SOM EEPROM and populate items like board name, board
HW and SW revision as well as board serial number into the TI common
EEPROM data structure residing in SRAM scratch space
2) Check for presence of daughter card(s) by probing associated I2C
addresses used for on-board EEPROMs containing daughter card-specific
data. If such a card is found, parse the EEPROM data such as for
additional Ethernet MAC addresses and populate those into U-Boot
accordingly
3) Dynamically apply daughter card DTB overlays to the U-Boot (proper)
DTB during SPL execution
4) Dynamically create an U-Boot ENV variable called name_overlays
during U-Boot execution containing a list of daugherboard-specific
DTB overlays based on daughercards found to be used during Kernel
boot.
This patch adds support for the J721E system on module boards containing
the actual SoC ("J721EX-PM2-SOM", accessed via CONFIG_EEPROM_CHIP_ADDRESS),
the common processor board ("J7X-BASE-CPB"), the Quad-Port Ethernet
Expansion Board ("J7X-VSC8514-ETH"), the infotainment board
("J7X-INFOTAN-EXP") as well as for the gateway/Ethernet switch/industrial
expansion board ("J7X-GESI-EXP").
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Tue, 7 Jan 2020 07:45:53 +0000 (13:15 +0530)]
ti: common: board_detect: Handle EEPROM probe more gracefully
Use dm_i2c_probe() rather than i2c_get_chip() when trying to access
board-detection EEPROM devices. This has the advantage of more gracefully
handling the case when the EEPROM is not present by allowing to exit the
function early rather than failing and outputting an error message on the
I2C transactions that follow.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Caleb Robey [Thu, 2 Jan 2020 14:17:29 +0000 (08:17 -0600)]
board: ti: beagleboneai: enable in am57xx_evm_defconfig
Adding the configurations to the evm_defconfig file
Signed-off-by: Jason Kridner <jdk@ti.com>
Signed-off-by: Caleb Robey <c-robey@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Jason Kridner [Thu, 2 Jan 2020 14:17:28 +0000 (08:17 -0600)]
board: ti: beagleboneai: add dts file
BeagleBoard.org BeagleBone AI is an open source hardware single board
computer based on the Texas Instruments AM5729 SoC featuring dual-core
1.5GHz Arm Cortex-A15 processor, dual-core C66 digital signal
processor (DSP), quad-core embedded vision engine (EVE), Arm Cortex-M4
processors, dual programmable realtime unit industrial control
subsystems and more. The board features 1GB DDR3L, USB3.0 Type-C, USB
HS Type-A, microHDMI, 16GB eMMC flash, 1G Ethernet, 802.11ac 2/5GHz,
Bluetooth, and BeagleBone expansion headers.
For more information, refer to:
https://beaglebone.ai
The corresponding patch against the mainline linux kernel can be found
at: https://patchwork.kernel.org/patch/
11254903/
This patch introduces the BeagleBone AI device tree.
Note that the device use the "ti,tpd12s016" component which is software
compatible with "ti,tpd12s015". Thus we only use the latter driver.
Signed-off-by: Jason Kridner <jdk@ti.com>
Signed-off-by: Caleb Robey <c-robey@ti.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Caleb Robey [Thu, 2 Jan 2020 14:17:27 +0000 (08:17 -0600)]
board: ti: beagleboneai: add initial support
These are necessities for beaglebone ai boot. There is the addition of
CONFIG_SUPPORT_EMMC_CONFIG to the Kconfig file. This is present upstream
but not in 19.01 yet.
Signed-off-by: Jason Kridner <jdk@ti.com>
Signed-off-by: Caleb Robey <c-robey@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Caleb Robey [Thu, 2 Jan 2020 14:17:26 +0000 (08:17 -0600)]
board: ti: beagleboneai: IODELAY and pinmux
This patch configures the pinmux settings for the BeagleBone AI after
the emmc read has completed.
Signed-off-by: Jason Kridner <jdk@ti.com>
Signed-off-by: Caleb Robey <c-robey@ti.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Caleb Robey [Thu, 2 Jan 2020 14:17:25 +0000 (08:17 -0600)]
board: ti: beagleboneai: emmc read changes
BeagleBoard.org BeagleBone AI rev A1 does not include a board
identifier I2C EEPROM due to a design oversight. These boards have
been put into production and are generally available now.
The board identifier information, however, has been included in the
second eMMC linear boot partition (/dev/mmcblk1boot1).
This patch works by:
* First, looking for a board identifier I2C EEPROM and if not found,
* Then seeing if the boot mode matches BeagleBone AI with eMMC in the
boot chain to make sure we don't enable eMMC pinmuxes on boards
that don't support it, and
* Finally, initializes the eMMC pins and reading the header.
Signed-off-by: Jason Kridner <jdk@ti.com>
Signed-off-by: Caleb Robey <c-robey@ti.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Thu, 16 Jan 2020 14:12:24 +0000 (19:42 +0530)]
configs: j721e_evm: Add configs for environment in eMMC
Add config to save and read back environment from eMMC.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Thu, 16 Jan 2020 14:12:23 +0000 (19:42 +0530)]
configs: j721e_evm_a72: Add Support for GPT partitions
Introduce a default GPT partition table for eMMC.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Thu, 16 Jan 2020 14:12:22 +0000 (19:42 +0530)]
configs: j721e_evm: Add configs for ADMA Support
Add configs for ADMA Support.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Thu, 16 Jan 2020 14:12:21 +0000 (19:42 +0530)]
arm: dts: k3-j721e-common-proc-board: Add pinmux for SD card
Add pinmux for sdhci1 node connected to the SD card.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Thu, 16 Jan 2020 14:12:20 +0000 (19:42 +0530)]
arm: dts: k3-j721e-common-proc-board: Remove voltage-ranges from sdhci nodes
voltage-ranges properties are NOP. Remove them.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Thu, 16 Jan 2020 14:12:19 +0000 (19:42 +0530)]
mmc: am654_sdhci: Add Support for configuring PHY in J721e
Add Support for writing to PHY registers for J721e. There are number of
differences between the J721e 8 bit PHY, J721e 4 bit PHY and AM654 PHY.
Create a driver_data structure with an ops and flags field and use the
flags field to indicate these differences. The differences are as
follows:
1. The J721e 4 bit instance PHY does not have a DLL. Introduce a
DLL_PRESENT flag to make sure that DLL related registers are accessed
only where they are present. Also add a separate set_ios_post()
callback.
2. The J721e 8 bit instance is not muxed with anything else inside the
SoC and hence the IOMUX_ENABLE filed does not exist. Add a flag which is
used to indicate the presence of this field.
3. The register field used to select DLL frequency is 3 bit wide in
J721e as compared to 2 bits in AM65x. Add another flag that
distinguishes these fields.
4. The strobe select field is 8 bit wide as compared to 4 bit wide for
AM65x. Add yet another flag to indicate this difference. Strobe select
is used only for HS400 speed mode, support for which has not been added
in AM65x.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Thu, 16 Jan 2020 14:12:18 +0000 (19:42 +0530)]
mmc: am654_sdhci: Get Xin clock by name
Get clk_xin by name instead of by index to avoid having to put clocks in
the same order in all devices.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:39 +0000 (10:25 +0530)]
dma: ti: k3-udma: Fix build warnings when building for 32 bit platforms
Cast pointers properly so as to avoid warnings when driver is built for
32 bit platforms
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:38 +0000 (10:25 +0530)]
dma: ti: k3-udma: Fix ring push operation for 32 bit cores
UDMA always expects 64 bit address pointer of the transfer descriptor in
the Ring. But on 32 bit cores like R5, pointer is always 32 bit in size.
Therefore copy over 32 bit pointer value to 64 bit variable before
pushing it over to the ring, so that upper 32 bits are 0s.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:37 +0000 (10:25 +0530)]
dma: ti: k3-udma: Switch to exposed ring mode
Exposed ring mode works well with 32 bit and 64 bit cores without need
for Proxies for 32 bit cores. Therefore switch to exposed ring mode.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:36 +0000 (10:25 +0530)]
dma: ti: k3-udma: Fix debug prints during enabling MEM_TO_DEV transfers
Fix up the debug prints that were dumping state of TCHAN RT registers to
use tchan for MEM_TO_DEV transfers.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:35 +0000 (10:25 +0530)]
dma: ti: k3-udma: Remove coherency check for cache ops
Remove redundant coherency checks before calling cache ops in UDMA
driver. This is now handled in arch specific cache operation
implementation based on Kconfig option
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:34 +0000 (10:25 +0530)]
soc: ti: k3-navss-ringacc: Get SYSFW reference from DT phandle
Instead of looking getting reference to SYSFW device using name which
is not guaranteed to be constant, use phandle supplied in the DT node to
get reference to SYSFW
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:33 +0000 (10:25 +0530)]
soc: ti: k3-navss-ringacc: Flush/invalidate caches on ring push/pop
Flush caches when pushing an element to ring and invalidate caches when
popping an element from ring in Exposed Ring mode. Otherwise DMA
transfers don't work properly in R5 SPL (with caches enabled) where the
core is not in coherency domain.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:32 +0000 (10:25 +0530)]
dma: ti: k3-udma: Query DMA channels allocated from Resource Manager
On K3 SoCs, DMA channels are shared across multiple entities, therefore
U-Boot DMA driver needs to query resource range from centralised
resource management controller i.e SystemFirmware and use DMA channels
allocated for A72 host. Add support for the same.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 9 Dec 2019 04:55:31 +0000 (10:25 +0530)]
lib: Import few bitmap functions from Linux
Import few basic bitmap functions (bitmap_{weight,fill,set,clear,or}())
and their dependencies from Linux. These are required for upcoming DMA
resource allocation support for TI's K3 SoCs.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Grygorii Strashko [Fri, 22 Nov 2019 17:26:31 +0000 (19:26 +0200)]
board: ti: am43xx: remove net platform code
The TI AM43xx platform has DM_ETH and OF_CONTROL enabled,
so remove networking platform code.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Grygorii Strashko [Fri, 22 Nov 2019 17:26:17 +0000 (19:26 +0200)]
board: ti: dra7-evm: remove net platform code
The DRA7 has DM_ETH and OF_CONTROL enabled, so remove networking platform
code.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Adam Ford [Wed, 13 Nov 2019 15:46:32 +0000 (09:46 -0600)]
ARM: dts: da850-lcdk: Update DTS files for SPL device tree support
Currently, the da850-lcdk uses SPL_OF_PLATDATA and manually loads
the necessary source code instead of using the auto-generated,
because the drivers don't properly autogenerate the code.
This patch simply enables the various device tree options to
mimic the da850-evm which doesn't need or use OF_PLATDATA for
device tree support. It does not disable OF_PLATDATA.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Mon, 11 Nov 2019 09:45:30 +0000 (15:15 +0530)]
thermal: ti-bandgap: Fix adc value datatype
The CORE_TEMP_SENSOR_MPU register gives a raw adc value which needs to
be indexed into a lookup table to get the actual temperature. Fix the
naming and datatype of the adc value variable.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 18 Nov 2019 13:46:36 +0000 (19:16 +0530)]
configs: j721e_evm_a72_defconfig: Enable USB related configs
Enable USB host and device related configs.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 18 Nov 2019 13:46:35 +0000 (19:16 +0530)]
arm: dts: k3-j721e: Add DT nodes for USB
J721e has two instances of Cadence USB3 controller. Add DT nodes for the
same. USB0 is configured to device mode and USB1 is configured to host
mode. For now only high speed mode is supported.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 18 Nov 2019 13:46:34 +0000 (19:16 +0530)]
environment: ti: Add DFU environment variables k3_dfu.h
Setup env variables for updating firmwares on eMMC/OSPI/MMC via DFU
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tom Rini [Fri, 17 Jan 2020 18:23:32 +0000 (13:23 -0500)]
Merge branch '2020-01-17-improve-aes-support'
- Add support and tests for AES192 and AES256
Philippe Reynes [Wed, 18 Dec 2019 17:25:42 +0000 (18:25 +0100)]
u-boot: fit: add support to decrypt fit with aes
This commit add to u-boot the support to decrypt
fit image encrypted with aes. The FIT image contains
the key name and the IV name. Then u-boot look for
the key and IV in his device tree and decrypt images
before moving to the next stage.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Wed, 18 Dec 2019 17:25:41 +0000 (18:25 +0100)]
mkimage: fit: add support to encrypt image with aes
This commit add the support of encrypting image with aes
in mkimage. To enable the ciphering, a node cipher with
a reference to a key and IV (Initialization Vector) must
be added to the its file. Then mkimage add the encrypted
image to the FIT and add the key and IV to the u-boot
device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Mon, 6 Jan 2020 14:22:37 +0000 (15:22 +0100)]
aes: add test unit for aes196 and aes256
This commit add test unit for aes196 and aes256.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philippe Reynes [Mon, 6 Jan 2020 14:22:36 +0000 (15:22 +0100)]
aes: add test unit for aes128
This commit add test unit for aes128.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philippe Reynes [Mon, 6 Jan 2020 14:22:35 +0000 (15:22 +0100)]
aes: add support of aes192 and aes256
Until now, we only support aes128. This commit add the support
of aes192 and aes256.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philippe Reynes [Mon, 6 Jan 2020 14:22:34 +0000 (15:22 +0100)]
aes: add a define for the size of a block
In the code, we use the size of the key for the
size of the block. It's true when the key is 128 bits,
but it become false for key of 192 bits and 256 bits.
So to prepare the support of aes192 and 256,
we introduce a constant for the iaes block size.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 16 Jan 2020 18:20:51 +0000 (13:20 -0500)]
Merge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- Cleanup of fsl_esdhc driver together with arch/defconfig change
- Add quirk for APP_CMD retry
Tom Rini [Thu, 16 Jan 2020 17:52:07 +0000 (12:52 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Clearfog: Fix SD booting (Baruch)
- Misc updates to MMC handling in SPL to support booting from
main data partition (vs hardware boot partition) on MVEBU (Baruch)
Tom Rini [Thu, 16 Jan 2020 14:45:40 +0000 (09:45 -0500)]
Merge tag 'xilinx-for-v2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx/FPGA changes for v2020.04
ARM64:
- Add INIT_SPL_RELATIVE dependency
SPL:
- FIT image fix
- Enable customization of bl2_plat_get_bl31_params()
Pytest:
- Add test for octal/hex conversions
Microblaze:
- Fix manual relocation for one SPI instance
Nand:
- Convert zynq/zynqmp drivers to DM
Xilinx:
- Enable boot script location via Kconfig
- Support OF_SEPARATE in board FDT selection
- Remove low level uart setup it is done later by code
- Add support for DEVICE_TREE variable passing for SPL
Zynq:
- Enable jtag boot mode via distro boot
- Removing unused baseaddresses from hardware.h
- DT fixups
ZynqMP:
- Fix emmc boot sequence
- Simplify spl logic around bss and board_init_r()
- Support psu_post_config_data() calling
- Tune mini-nand DTS
- Fix psu wiring for a2197 boards
- Add runtime MMC device boot order filling in spl
- Clear ATF handoff handling with custom bl2_plat_get_bl31_params()
- Add support u-boot.its generation
- Use single image configuration for all platforms
- Enable PANIC_HANG via Kconfig
- DT fixups
- Firmware fixes
- Add support for zcu208 and zcu1285
Versal:
- Fix emmc boot sequence
- Enable board_late_init() by default
Tom Rini [Thu, 16 Jan 2020 14:40:09 +0000 (09:40 -0500)]
Merge branch '2020-01-15-master-imports'
- MediaTek improvements
- Some generic clk improvements
- A few assorted bugfixes
Sam Shih [Fri, 10 Jan 2020 08:30:35 +0000 (16:30 +0800)]
configs: mediatek: fix mt7623n bpir2 defconfig
This patch add CONFIG_TARGET_MT7623 into mt7623n_bpir2_defconfig
to fix the mt7623 compile error after building others mediatek target
platform
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:34 +0000 (16:30 +0800)]
arm: dts: mediatek: move u-boot properties to -u-boot.dtsi file
This patch move u-boot properties to -u-boot.dtsi file.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:33 +0000 (16:30 +0800)]
Add support for MT7622 reference board
This adds a general board file based on MT7622 SoCs from MediaTek.
This commit is adding the basic boot support for the MT7622 rfb.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Sam Shih [Fri, 10 Jan 2020 08:30:32 +0000 (16:30 +0800)]
mmc: add mmc and sd support for MT7622
This patch add mmc and sd support for Mediatek MT7622 SoCs
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:31 +0000 (16:30 +0800)]
power: domain: add power domain support for MT7622
This patch add power domain support for Mediatek MT7622 SoCs
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:30 +0000 (16:30 +0800)]
clk: mediatek: fix clock-rate overflow problem
This patch fix clock-rate overflow problem in mediatek
clock driver common part.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:29 +0000 (16:30 +0800)]
clk: mediatek: add driver for MT7622
This patch add clock driver for MediaTek MT7622 SoC.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:28 +0000 (16:30 +0800)]
pinctrl: mediatek: add support for different pinctrl
Due to the pinctrl hardware of MT7622 is difference from others
SoC which using the common part of mediatek pinctrl.
So we need to modify the common part of mediatek pinctrl.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:27 +0000 (16:30 +0800)]
pinctrl: mediatek: add driver for MT7622
This patch add Pinctrl driver for MediaTek MT7622 SoC.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:26 +0000 (16:30 +0800)]
ARM: MediaTek: Add support for MediaTek MT7622 SoC
Add support for MediaTek MT7622 SoC. This include the file
that will initialize the SoC after boot and its device tree.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:10 +0000 (11:35 +0800)]
phy: phy-mtk-tphy: make ref clock optional
If make the ref clock optional, no need refer to fixed-clock when
the ref clock is always on or comes from oscillator directly.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:09 +0000 (11:35 +0800)]
phy: phy-mtk-tphy: remove the check of -ENOSYS
No need check -ENOSYS anymore after add dummy_enable() for
fixed-clock.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:08 +0000 (11:35 +0800)]
clk: fixed_rate: add dummy enable() function
This is used to avoid clk_enable() return -ENOSYS.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:07 +0000 (11:35 +0800)]
clk: add APIs to get (optional) clock by name without a device
Sometimes we may need get (optional) clock without a device,
that means use ofnode.
e.g. when the phy node has subnode, and there is no device created
for subnode, in this case, we need these new APIs to get subnode's
clock.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:06 +0000 (11:35 +0800)]
clk: check valid clock by clk_valid()
Add valid check for clk->dev, it's useful when get optional
clock even when the clk point is valid, but its dev will be
NULL.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:05 +0000 (11:35 +0800)]
clk: fix error check for devm_clk_get_optional()
If skip all return error number, it may skip some real error cases,
so only skip the error when the clock is not provided in DTS
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:04 +0000 (11:35 +0800)]
clk: mediatek: mt7629: add support for ssusbsys
The SSUSB IP's clocks come from ssusbsys module on mt7629,
so add its driver
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
mingming lee [Tue, 31 Dec 2019 03:29:26 +0000 (11:29 +0800)]
ARM: MediaTek: add basic support for MT8512 boards
This adds a general board file based on MT8512 SoCs from MediaTek.
Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.
This commit is adding the basic boot support for the MT8512 eMMC board.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
mingming lee [Tue, 31 Dec 2019 03:29:25 +0000 (11:29 +0800)]
mmc: mtk-sd: fix hang when data read quickly
For CMD21 tuning data, the 128/64 bytes data may coming in very
short time, before msdc_start_data(), the read data has already
come, in this case, clear MSDC_INT will cause the interrupt disappear
and lead to the thread hang.
the solution is just clear all interrupts before command was sent.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
mingming lee [Tue, 31 Dec 2019 03:29:24 +0000 (11:29 +0800)]
mmc: mtk-sd: add support for MediaTek MT8512/MT8110 SoCs
This patch adds mmc support for MediaTek MT8512/MT8110 SoCs.
MT8512/MT8110 SoCs puts the tune register at top layer, so
need add new code to support it.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
mingming lee [Tue, 31 Dec 2019 03:29:23 +0000 (11:29 +0800)]
pinctrl: mediatek: add driver for MT8512
Add Pinctrl driver for MediaTek MT8512 SoC.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
mingming lee [Tue, 31 Dec 2019 03:29:22 +0000 (11:29 +0800)]
clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll
Add configurable pcw_chg_reg/ibits/fmin to mtk_pll to support mt8512
mingming lee [Tue, 31 Dec 2019 03:29:21 +0000 (11:29 +0800)]
clk: mediatek: add set_clr_upd mux type flow
Add new set_clr_upd mux type and related operation to
mtk common clock driver to support mt8512
mingming lee [Tue, 31 Dec 2019 03:29:20 +0000 (11:29 +0800)]
clk: mediatek: add driver support for MT8512
Add clock driver for MediaTek MT8512 SoC, include topckgen,
apmixedsys and infracfg support.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
mingming lee [Tue, 31 Dec 2019 03:29:19 +0000 (11:29 +0800)]
ARM: MediaTek: Add support for MediaTek MT8512 SoC
Add support for MediaTek MT8512 SoC. This include the file
that will initialize the SoC after boot and its device tree.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
Sam Protsenko [Tue, 14 Jan 2020 17:54:12 +0000 (19:54 +0200)]
MAINTAINERS: Fix mail
Sam doesn't work for Linaro anymore, so Linaro mail is not valid. Change
it to his home mail instead.
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Alexandre Besnard [Fri, 20 Dec 2019 14:25:22 +0000 (15:25 +0100)]
cmd/blk_common: clarify no partition error message
When no partition table is found, users should be warned so.
Warning that no device is available in this case could be misleading,
especially as it is the same error when no device is selected.
Signed-off-by: Alexandre Besnard <alexandre.besnard@softathome.com>
Baruch Siach [Wed, 15 Jan 2020 07:08:10 +0000 (09:08 +0200)]
arm: mvebu: clearfog: update eMMC documentation
SPL now automatically selects the correct U-Boot image offset for both
eMMC and SD card. No need to tweak
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR anymore.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Wed, 15 Jan 2020 07:08:09 +0000 (09:08 +0200)]
arm: mvebu: clearfog: set uboot image SD card offset
Armada 38x ROM skips the first SD card offset when loading SPL. This
affects the location of the main U-Boot image. SPL MMC code now supports
U-Boot image offset based on run-time detection of the boot partition.
Use this feature to make the same generated image support both SD card
and eMMC boot partition.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Wed, 15 Jan 2020 07:08:08 +0000 (09:08 +0200)]
spl: mmc: support uboot image offset on main partition
On Armada 38x platforms the ROM code loads SPL from offset 0 of eMMC
hardware boot partitions. When there are no boot partitions (i.e. SD
card) the ROM skips the first sector that usually contains the (logical)
partition table. Since the generated .kwb image contains the main U-Boot
image in a fixed location (0x140 sectors by default), we end up with the
main U-Boot image in offset of 1 sector. The current workaround is to
manually set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x141 to
compensate for that.
This patch uses the run-time detected boot partition to determine the
right offset of the main U-Boot partition. The generated .kwb image is
now compatible with both eMMC boot partition, and SD card main data
partition.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Sun, 8 Dec 2019 07:41:41 +0000 (09:41 +0200)]
configs: clearfog: enable SPL_DM_GPIO to fix boot from SD
SPL needs DM GPIO to read the SD card-detect signal. This complements
the fix in commit
70bae02f71d4 ("arm: mvebu: clearfog: fix boot from SD
card").
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Joel Johnson [Sat, 11 Jan 2020 16:08:15 +0000 (09:08 -0700)]
mmc: config help typo fix
Fix typo in description of MMC_QUIRKS config option.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Joel Johnson [Sat, 11 Jan 2020 16:08:14 +0000 (09:08 -0700)]
mmc: add additional quirk for APP_CMD retry
It was observed (on ClearFog Base) that sending MMC APP_CMD returned
an error on the first attempt. The issue appears to be timing related
since even inserting a puts() short debug entry before the execution
added sufficient delay to receive success on first attempt.
Follow the existing quirks pattern to retry if initial issuance
failed so as to not introduce any delay unless needed.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Yangbo Lu [Thu, 19 Dec 2019 10:59:30 +0000 (18:59 +0800)]
Drop CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK usage
The eSDHC reference clocks should be provided by speed.c in arch/.
And we do not need CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK option to
select which clock to use. Because we can make the driver to select
the periperhal clock which is better (provides higher frequency)
automatically if its value is provided by speed.c.
This patch is to drop this option and make driver to select clock
automatically. Also fix peripheral clock calculation issue in
fsl_lsch2_speed.c/fsl_lsch3_speed.c.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 16 Jan 2020 05:19:44 +0000 (13:19 +0800)]
configs: ls1028a: use default SDHC clock divider value
The SDHC clock divider value for LS1028A should be default 2,
not 1.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 19 Dec 2019 10:59:28 +0000 (18:59 +0800)]
Add global variable sdhc_per_clk for arm/powerpc
The QorIQ eSDHC controller supports two reference clocks. They are
platform clock and periperhal clock. The global variable sdhc_clk
has already been used for platform clock.
This patch is to add another global variable sdhc_per_clk for
periperhal clock, which provides higher frequency and is required
to be used for SD UHS and eMMC HS200/HS400 speed modes.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 19 Dec 2019 10:59:27 +0000 (18:59 +0800)]
powerpc/mpc85xx: drop eSDHC periperhal clock code
The below patch added eSDHC periperhal clock code initially.
2d9ca2c mmc: fsl_esdhc: Add peripheral clock support
The purpose was to fix up device tree properties "peripheral-frequency"
so that linux could get the periperhal clock by it.
However the implementation on both u-boot and linux was only
for a Freescale SDK release. The linux part implementation had never
been upstreamed. These code should not have been exist on u-boot
mainline.
Let's remove the powerpc part changes but keep the changes in
fsl_esdhc driver. The changes in fsl_esdhc driver could be utilized
to support SD UHS and eMMC HS200/HS400 speed modes for current
Layerscape ARM platforms.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 19 Dec 2019 10:59:26 +0000 (18:59 +0800)]
mmc: fsl_esdhc: drop useless fdt fixup
The fdt fixup for properties "peripheral-frequency" and "adapter-type"
was once for a Freescale SDK release. The properties haven't been existed
in linux mainline. Drop these useless code.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 19 Dec 2019 10:59:25 +0000 (18:59 +0800)]
mmc: fsl_esdhc_imx: drop QorIQ eSDHC specific peripheral clock code
Drop QorIQ eSDHC specific peripheral clock code.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Heinrich Schuchardt [Wed, 18 Dec 2019 10:05:59 +0000 (11:05 +0100)]
test/py: use valid device tree in test_fit.py
The device tree compiler expects that a node with a unit-address has a reg
property.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>