oweals/u-boot.git
4 years agoimx: spl: Fix use of removed SPL_FAT_SUPPORT config
Harald Seiler [Thu, 23 Apr 2020 11:07:53 +0000 (13:07 +0200)]
imx: spl: Fix use of removed SPL_FAT_SUPPORT config

CONFIG_SPL_FAT_SUPPORT was removed in commit 0c3a9ed409a5
("spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT").
Fixup a leftover use of the symbol.

Fixes: 9d86dbd9cf9d ("imx: spl: implement spl_boot_mode for i.MX7/8/8M")
Signed-off-by: Harald Seiler <hws@denx.de>
4 years agoimx: spl: Remove ifdefs in spl_mmc_boot_mode()
Harald Seiler [Thu, 23 Apr 2020 11:07:52 +0000 (13:07 +0200)]
imx: spl: Remove ifdefs in spl_mmc_boot_mode()

It is hard to read code which contains nested ifdef blocks.  Replace
them with normal if-blocks and the IS_ENABLED() macro.  This is not only
more readable but also helps as both arms are validated by the compiler
in all cases.

Signed-off-by: Harald Seiler <hws@denx.de>
4 years agoRevert "imx: defconfig: Enable CONFIG_SPL_FORCE_MMC_BOOT"
Harald Seiler [Thu, 23 Apr 2020 11:07:51 +0000 (13:07 +0200)]
Revert "imx: defconfig: Enable CONFIG_SPL_FORCE_MMC_BOOT"

CONFIG_SPL_FORCE_MMC_BOOT was removed in a previous patch as its
behavior is the correct one in all cases.  Remove all uses of it from
defconfigs.

This reverts commit 3201e5b444ae3a13aa31e8b5101ad38d7ff0640d and removes
CONFIG_SPL_FORCE_MMC_BOOT from the imx28_xea defconfig.

Signed-off-by: Harald Seiler <hws@denx.de>
4 years agoRevert "imx: Introduce CONFIG_SPL_FORCE_MMC_BOOT to force MMC boot on falcon mode"
Harald Seiler [Thu, 23 Apr 2020 11:07:50 +0000 (13:07 +0200)]
Revert "imx: Introduce CONFIG_SPL_FORCE_MMC_BOOT to force MMC boot on falcon mode"

The CONFIG_SPL_FORCE_MMC_BOOT config flag is not needed as its behavior
is the correct one in all cases;  using spl_boot_device() instead of the
boot_device parameter will lead to inconsistency issues, for example,
when a board_boot_order() is defined.  In fact, this is the reason the
parameter was introduced in the first place, in commit 2b1cdafa9fdd
("common: Pass the boot device into spl_boot_mode()").

This reverts commit 772b55723bcbe8ebe84f579d9cdc831d8e18579d.

Link: https://lists.denx.de/pipermail/u-boot/2020-April/405979.html
Signed-off-by: Harald Seiler <hws@denx.de>
4 years agoimx: spl: return boot mode for asked MMC device in spl_mmc_boot_mode()
Anatolij Gustschin [Thu, 23 Apr 2020 11:07:49 +0000 (13:07 +0200)]
imx: spl: return boot mode for asked MMC device in spl_mmc_boot_mode()

Boards may extend or re-define the boot list in their board_boot_order()
function by modifying spl_boot_list. E.g. a board might boot SPL from a
slow SPI NOR flash and then load the U-Boot from an eMMC or SD-card.
Or it might use additional MMC boot device in spl_boot_list for cases
when the image in SPI NOR flash is not found, so it could fall back to
eMMC, SD-card or another boot device.

Getting the MMC boot mode in spl_mmc will fail when we are trying to
boot from an MMC device in the spl_boot_list and the original board
boot mode (as returned by spl_boot_device()) is not an MMC boot mode.
Fix it by checking the asked MMC boot device from the spl_mmc_boot_mode()
argument.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
4 years agoarm: imx: Add support for Google's Coral Dev Board
Alifer Moraes [Fri, 6 Mar 2020 10:46:33 +0000 (07:46 -0300)]
arm: imx: Add support for Google's Coral Dev Board

Add initial support for Google's Coral Dev Board based on i.MX8MQ.

https://coral.ai/products/dev-board

The Phanbell naming has been used here to match the naming convention
used in Google's U-Boot source tree:

https://coral.googlesource.com/uboot-imx/

Co-developed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
Tested-by: Marco Franchi <marcofrk@gmail.com>
4 years agoARM: imx8m: Fix reset in SPL on Toradex iMX8MM Verdin
Marek Vasut [Wed, 29 Apr 2020 13:04:27 +0000 (15:04 +0200)]
ARM: imx8m: Fix reset in SPL on Toradex iMX8MM Verdin

Board files should not re-implement do_reset() to work around this
function not being defined in for specific configurations. Rather,
the fix is to compile in drivers which implement this properly.
This patch enables sysreset and watchdog drivers in SPL and ties
them together to implement the same as the do_reset() hack in the
board file, except correctly in the DM/DT framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Acked-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Igor Opaniuk <igor.opaniuk@toradex.com>
4 years agoARM: imx8m: Fix reset in SPL on NXP iMX8MP EVK
Marek Vasut [Wed, 29 Apr 2020 13:04:26 +0000 (15:04 +0200)]
ARM: imx8m: Fix reset in SPL on NXP iMX8MP EVK

Board files should not re-implement do_reset() to work around this
function not being defined in for specific configurations. Rather,
the fix is to compile in drivers which implement this properly.
This patch enables sysreset and watchdog drivers in SPL and ties
them together to implement the same as the do_reset() hack in the
board file, except correctly in the DM/DT framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
4 years agoARM: imx8m: Fix reset in SPL on NXP iMX8MN EVK
Marek Vasut [Wed, 29 Apr 2020 13:04:25 +0000 (15:04 +0200)]
ARM: imx8m: Fix reset in SPL on NXP iMX8MN EVK

Board files should not re-implement do_reset() to work around this
function not being defined in for specific configurations. Rather,
the fix is to compile in drivers which implement this properly.
This patch enables sysreset and watchdog drivers in SPL and ties
them together to implement the same as the do_reset() hack in the
board file, except correctly in the DM/DT framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
4 years agoARM: imx8m: Fix reset in SPL on NXP iMX8MM EVK
Marek Vasut [Wed, 29 Apr 2020 13:04:24 +0000 (15:04 +0200)]
ARM: imx8m: Fix reset in SPL on NXP iMX8MM EVK

Board files should not re-implement do_reset() to work around this
function not being defined in for specific configurations. Rather,
the fix is to compile in drivers which implement this properly.
This patch enables sysreset and watchdog drivers in SPL and ties
them together to implement the same as the do_reset() hack in the
board file, except correctly in the DM/DT framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
4 years agoARM: imx8m: Don't use the addr parameter of reset_cpu()
Claudius Heine [Wed, 29 Apr 2020 13:04:23 +0000 (15:04 +0200)]
ARM: imx8m: Don't use the addr parameter of reset_cpu()

imx8m has the only implementation of reset_cpu() which does not ignore
the addr parameter and instead gives it some meaning as the base address
of watchdog registers.  This breaks convention with the rest of U-Boot
where the parameter is ignored and callers are passing in 0.

Fixes: d2041725e84b ("imx8m: restrict reset_cpu")
Co-developed-by: Harald Seiler <hws@denx.de>
Signed-off-by: Harald Seiler <hws@denx.de>
Signed-off-by: Claudius Heine <ch@denx.de>
4 years agoARM: imx8m: Fix indentation of reset_cpu() function
Harald Seiler [Wed, 29 Apr 2020 13:04:22 +0000 (15:04 +0200)]
ARM: imx8m: Fix indentation of reset_cpu() function

Use proper code-style, tabs instead of spaces for indentation.

Signed-off-by: Harald Seiler <hws@denx.de>
4 years agoARM: imx8m: Do not define do_reset() if sysreset is enabled
Marek Vasut [Wed, 29 Apr 2020 13:04:21 +0000 (15:04 +0200)]
ARM: imx8m: Do not define do_reset() if sysreset is enabled

The SPL can also be compiled with sysreset drivers just fine, so
update the condition to cater for that option.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
4 years agodt-bindings: pinctrl: imxrt1020: remove useless comment
Giulio Benetti [Mon, 20 Apr 2020 15:48:12 +0000 (17:48 +0200)]
dt-bindings: pinctrl: imxrt1020: remove useless comment

A comment note has been left after completing pinctrl listing, so let's
remove it since it's useless.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
4 years agoARM: imx: imx8m: Do not warn about cpu-idle-states if missing
Marek Vasut [Fri, 24 Apr 2020 19:37:33 +0000 (21:37 +0200)]
ARM: imx: imx8m: Do not warn about cpu-idle-states if missing

If the cpu-idle-states is missing from the DT in the first place, do
not fail on removing in. Just move on and do not even print an error,
since not being able to remove something which is not there in the
first place is not an error and surely does not justify failing to
boot.

Turn the surrounding prints into debugs to reduce the useless noise.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
4 years agoarm: dts: imx8mm: sync dts from Linux Kernel 5.6.7
Adam Ford [Mon, 27 Apr 2020 12:11:19 +0000 (07:11 -0500)]
arm: dts: imx8mm: sync dts from Linux Kernel 5.6.7

This patch synchronizes the device tree with that from 5.6.7.

This also adds nodes for crypto and ddrc, which makes keeping
the device tree files from individual boards in sync with the
Linux kernel.  This is helpful when boads reference those nodes.

Signed-off-by: Adam Ford <aford173@gmail.com>
4 years agotreewide: Remove unused FSL QSPI config options for IMX platforms
Kuldeep Singh [Thu, 20 Feb 2020 17:27:54 +0000 (22:57 +0530)]
treewide: Remove unused FSL QSPI config options for IMX platforms

Some of these options are not used by the driver anymore and some of them
are obsolete as the information is gathered from the dt.
So, remove the unused config options now.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
4 years agoimx8qxp_mek: Run with caches enabled
Fabio Estevam [Mon, 20 Apr 2020 18:55:29 +0000 (15:55 -0300)]
imx8qxp_mek: Run with caches enabled

There is no need to run with caches disabled.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8qxp_mek: Remove SPL watchdog option
Fabio Estevam [Mon, 20 Apr 2020 12:55:47 +0000 (09:55 -0300)]
imx8qxp_mek: Remove SPL watchdog option

Currently the following watchdog error is seen in SPL:

U-Boot SPL 2020.04-00407-g8d5d3bcf3c (Apr 20 2020 - 09:48:09 -0300)
Normal Boot
WDT:   Not found!
...

There is no watchdog driver for i.MX8 at the moment, nor code for
configuring the watchdog in SPL, so remove the CONFIG_SPL_WATCHDOG_SUPPORT
option for now.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
4 years agoimx8: Run SPL with caches enabled
Fabio Estevam [Tue, 21 Apr 2020 15:02:45 +0000 (12:02 -0300)]
imx8: Run SPL with caches enabled

It is safe to run SPL with caches enabled on i.MX8, so
remove such restriction.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Oliver Graute <oliver.graute@kococonnector.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Igor Opaniuk <igor.opaniuk@toradex.com>
4 years agoconfig: apalis-imx8: Enable FEC TXC delay
Philippe Schenker [Wed, 11 Mar 2020 10:52:59 +0000 (11:52 +0100)]
config: apalis-imx8: Enable FEC TXC delay

define FEC_ENET_ENABLE_TXC_DELAY to enable the delay on TXC line on
the MAC. This has to be done in order to meet RGMII specs.
According to RGMII specs the clock should get delayed so the edges of
the clock are preferrably in the middle of the edges of data-lines so
they can be sampled properly.
Our PHY expects the MAC to delay TXC line, as it is also written
in the spec. This patch makes sure the TXC delay on the FEC is enabled

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
4 years agonet: fec: Add possibility to enable TXC delay
Philippe Schenker [Wed, 11 Mar 2020 10:52:58 +0000 (11:52 +0100)]
net: fec: Add possibility to enable TXC delay

This patch enables the possibility to set FEC_ENET_ENABLE_TXC_DELAY or
FEC_ENET_ENABLE_RXC_DELAY so one can via a define enable the RXC or TXC
delay in the MAC.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
4 years agoboard: apalis_imx6: Add KSZ9131 phy skew settings
Philippe Schenker [Wed, 11 Mar 2020 10:59:26 +0000 (11:59 +0100)]
board: apalis_imx6: Add KSZ9131 phy skew settings

This patch adds skew register settings for KSZ9131. It checks first
which phy is on the board and then applies the correct skew settings.

Skew settings calculation for the KSZ9131:
The i.MX6 SoC has an output skew tolerance of -100ps to 900ps. All
PCB traces where routed exactly the same length so we can calculate
the skew settings without taking the length into consideration. The
traces are all length matched.

RXC skew (PHY to MAC):
- We use the 2ns DLL controlled delay on the PHY
- We do not use the skew registers

This results in the following values:

RXC
PHY fixed Delay 2000ps
PHY Added Delay 0ps
T_setup_R min 2.00ns
T_setup_R typ 2.00ns
T_setup_R max 2.00ns
T_hold_R min 1.60ns
T_hold_R typ 2.00ns
T_hold_R max 2.40ns

That means we are well within RGMII specs.

TXC skew (MAC to PHY):
- We use the 2ns DLL controlled delay on the PHY
- We then subtract ~0.6ns with TXD[0:3] and TXC clock pad skew
  register in a resulting ~1.4ns delay.

This results in the following values under consideration of the
tolerances:

TXC min TXC typ TXC max
MAC min -100ps -100ps -100ps
MAC max 900ps 900ps 900ps
PHY fixed Delay 2000ps 2000ps 2000ps
PHY added Delay -340ps -600ps -859ps
T_setup_T min 1.56ns 1.30ns 1.04ns
T_setup_T typ 2.06ns 1.80ns 1.54ns
T_setup_T max 2.56ns 2.30ns 2.04ns
T_hold_T min 1.04ns 1.30ns 1.56ns
T_hold_T typ 1.94ns 2.20ns 2.46ns
T_hold_T max 2.84ns 3.10ns 3.36ns

This shows that T_hold_T min and T_setup_T min times are out of spec
for RGMII timing. However the KSZ9131 has a minimal value for this time
of 0.8ns which is met under all circumstances.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
4 years agoboard: verdin-imx8mm: Add KSZ9131 phy skew settings
Philippe Schenker [Wed, 11 Mar 2020 10:59:25 +0000 (11:59 +0100)]
board: verdin-imx8mm: Add KSZ9131 phy skew settings

This patch determines which phy is placed on the board with the PHY ID
then it sets the same settings for KSZ9031 as before but for KSZ9131
it enables both RXC and TXC delay lines in the PHY.
This will compensate the missing delay from the MAC. Other skew
settings are not needed as the traces on board are routed exactly the
same length

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Tested-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Igor Opaniuk <igor.opaniuk@toradex.com>
4 years agoverdin-imx8mm: Change board phy skew values for our ksz9031
Philippe Schenker [Wed, 11 Mar 2020 10:59:24 +0000 (11:59 +0100)]
verdin-imx8mm: Change board phy skew values for our ksz9031

This patches uses the existing functions for interacting with the
KSZ9031 and uses the values appropriate for our board.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Tested-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Igor Opaniuk <igor.opaniuk@toradex.com>
4 years agonet: phy: micrel: Add basic support for KSZ9131
Philippe Schenker [Wed, 11 Mar 2020 10:59:23 +0000 (11:59 +0100)]
net: phy: micrel: Add basic support for KSZ9131

This adds basic support for the new Micrel KSZ9131 phy.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
4 years agonet: phy: micrel: Use defines for PHY_IDs and MASK
Philippe Schenker [Wed, 11 Mar 2020 10:59:22 +0000 (11:59 +0100)]
net: phy: micrel: Use defines for PHY_IDs and MASK

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
4 years agomx8mq_evk: Remove unrelated comment
Fabio Estevam [Mon, 20 Apr 2020 15:38:51 +0000 (12:38 -0300)]
mx8mq_evk: Remove unrelated comment

The comment does not relate to the setup_i2c() function, so just
remove it.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
4 years agoimx8mp_evk: Remove unrelated comment
Fabio Estevam [Mon, 20 Apr 2020 15:38:50 +0000 (12:38 -0300)]
imx8mp_evk: Remove unrelated comment

The comment does not relate to the setup_i2c() function, so just
remove it.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
4 years agoimx: imx8m: Don't use the addr parameter of reset_cpu
Claudius Heine [Wed, 4 Mar 2020 14:23:12 +0000 (15:23 +0100)]
imx: imx8m: Don't use the addr parameter of reset_cpu

imx8m has the only implementation of `reset_cpu` which does not ignore
the addr parameter and instead gives it some meaning as the base address
of watchdog registers.  This breaks convention with the rest of U-Boot
where the parameter is ignored and callers are passing in 0.

Fixes: d2041725e84b ("imx8m: restrict reset_cpu")
Co-Authored-by: Harald Seiler <hws@denx.de>
Signed-off-by: Claudius Heine <ch@denx.de>
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
4 years agoimx: imx8m*: Remove do_reset from board files
Claudius Heine [Wed, 4 Mar 2020 14:23:11 +0000 (15:23 +0100)]
imx: imx8m*: Remove do_reset from board files

Use the `do_reset` implementation of `arch/arm/lib/reset.c` in SPL
instead.  It is very close to what is done here, anyway, and plays
more nicely with the rest of U-Boot than adding a custom `do_reset`
implementation into board files.

`do_reset` from `arch/arm/lib/reset.c` calls `reset_cpu` with 0 as the
addr parameter while the boards are passing WDOG1_BASE_ADDR.  This is
ok because the `reset_cpu` implementation uses WDOG1_BASE_ADDR by
default if 0 is passed in.

Co-Authored-by: Harald Seiler <hws@denx.de>
Signed-off-by: Claudius Heine <ch@denx.de>
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
4 years agoARM: reset: use do_reset in SPL/TPL if SYSRESET was not enabled for them
Claudius Heine [Wed, 4 Mar 2020 14:23:10 +0000 (15:23 +0100)]
ARM: reset: use do_reset in SPL/TPL if SYSRESET was not enabled for them

In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available
anywere, even if SYSRESET is disabled for SPL/TPL.

'do_reset' is called from SPL for instance from the panic handler and
PANIC_HANG is not set

Signed-off-by: Claudius Heine <ch@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
4 years agoimx8: Configure SNVS
Franck LENORMAND [Wed, 9 Oct 2019 08:27:43 +0000 (10:27 +0200)]
imx8: Configure SNVS

Add a module to configure the tamper and secure violation of
the SNVS using the SCU API.

The module also adds some commands:
 - snvs_cfg: Configure the SNVS HP and LP registers
 - snvs_dgo_cfg: Configure the SNVS DGO bloc if present (8QXP)
 - tamper_pin_cfg: Change the configuration of the tamper pins
 - snvs_clear_status: Allow to write to LPSR and LPTDSR to clear
   status bits

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: Update SCFW API to version 1.5
Ye Li [Thu, 14 Nov 2019 05:20:43 +0000 (21:20 -0800)]
imx8: Update SCFW API to version 1.5

Sync the latest SCFW API with below commit
6dcd0242ae7a53ac ("SCF-105: Revert accidental change") to add
interfaces for PM resource reset and read/write SNVS security
violation and tamper DGO registers.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: scu api: Add support for SECO manufacturing protection APIs
Breno Lima [Wed, 16 Oct 2019 21:10:54 +0000 (18:10 -0300)]
imx8: scu api: Add support for SECO manufacturing protection APIs

SECO provides APIs to support CAAM manufacturing protection:

- sc_seco_get_mp_key()
- sc_seco_get_mp_sign()
- sc_seco_update_mpmr()

Add SCFW APIs support.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agodoc: ahab: Add encrypted boot documentation for i.MX8/8x devices
Breno Lima [Mon, 11 Nov 2019 21:54:09 +0000 (18:54 -0300)]
doc: ahab: Add encrypted boot documentation for i.MX8/8x devices

Add AHAB encrypted boot documentation for i.MX8/8x family devices
covering the following topics:

- How to encrypt and sign the 2nd container in flash.bin image.
- How to encrypt and sign a standalone container image.

Include a CSF example to encrypt 2nd container in flash.bin image.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Catia Han <yaqian.han@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: Enable WDOG_B for timeout
Ye Li [Mon, 9 Dec 2019 08:47:18 +0000 (00:47 -0800)]
imx8m: Enable WDOG_B for timeout

When doing reset_cpu, in normal case the WDOG_B outputs immediately
after we clean WDA bit. But on mscale, the WDOG_B may be later than
internal reset, and cause PMIC not reset. As we enabled the SD3.0
support, the PMIC must be reset to reset SD card.

Change the reset_cpu to enable the WDOG_B for timeout as well, and set
WDOG timeout to 1s.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8mm: clock: fix fracpll decode issue
Ye Li [Tue, 24 Mar 2020 02:54:29 +0000 (19:54 -0700)]
imx8mm: clock: fix fracpll decode issue

The fracpll decoding is using the bit definitions for int pll. Most of
them are same, but the CLKE bit is different. Fix the wrong CLKE_MASK
for fracpll and correct all bit definitions in fracpll decoding.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: parser: fix some bad debug message formating
Peng Fan [Wed, 22 Apr 2020 07:45:42 +0000 (15:45 +0800)]
imx8: parser: fix some bad debug message formating

In SPL build, the formatting '%llx' in debug() is not supported.
Also, fix some misplaced parameters in printf.

Modified from Seb Fagard's downstream patch

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: ahab: fix some bad debug message formating
Seb Fagard [Mon, 30 Mar 2020 15:13:31 +0000 (17:13 +0200)]
imx8: ahab: fix some bad debug message formating

In SPL build, the formatting '%llx' in debug() is not supported.
Also, fix some misplaced parameters in printf.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: ahab: fix 'end address' parameter of rm_find_memreg
Peng Fan [Wed, 22 Apr 2020 07:36:34 +0000 (15:36 +0800)]
imx8: ahab: fix 'end address' parameter of rm_find_memreg

parameter 'end address' must be inclusive of address range.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: Change to use new SECO API commands
Ye Li [Tue, 15 Oct 2019 06:08:46 +0000 (23:08 -0700)]
imx8: Change to use new SECO API commands

Latest SCFW has removed old MISC SECO commands. So update the codes
to use new SECO commands.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: parser: fix 'end address' parameter of rm_find_memreg
Peng Fan [Wed, 22 Apr 2020 07:25:31 +0000 (15:25 +0800)]
imx8: parser: fix 'end address' parameter of rm_find_memreg

parameter 'end address' must be inclusive of address range.

Modified from Seb's downstream patch.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: Dump DRAM PLL rate by clocks command
Ye Li [Tue, 24 Mar 2020 02:57:55 +0000 (19:57 -0700)]
imx8m: Dump DRAM PLL rate by clocks command

Add the dump of DRAM PLL into "clocks" command

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
4 years agoimx8mq: Set ARM core clock directly from ARM PLL
Peng Fan [Wed, 22 Apr 2020 03:18:23 +0000 (11:18 +0800)]
imx8mq: Set ARM core clock directly from ARM PLL

For ARM core clock, there are two input branches, and can select via mux:
one from ARM PLL directly, second from CCM A53 clock root.

Currently we are using second branch. But IC confirmed the CCM A53 root
signoff timing is 1Ghz, so we should switch to input from ARM PLL directly.

This patch fixes the CORE SEL slice configuration and switch ARM clock
to ARM PLL.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8mq: Enable eMMC HS400 and SD UHS mode on EVK
Ye Li [Fri, 25 Oct 2019 08:28:48 +0000 (01:28 -0700)]
imx8mq: Enable eMMC HS400 and SD UHS mode on EVK

iMX8MQ EVK board has a eMMC5.0 chip and supports SD3.0, so enable the UHS
and HS400 configs to enhance the eMMC/SD access.

The change also needs to set usdhc clock to 400Mhz, and add the
off-on-delay-us to SD reset pin, otherwise some SD cards will
fail to select UHS mode in re-initialization.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: update clock root and fix core_sel
Peng Fan [Wed, 22 Apr 2020 02:55:56 +0000 (10:55 +0800)]
imx8m: update clock root and fix core_sel

Update clock root table to let it be easy to configure clock at
very early stage. Also the core_sel mux parent should be A53 CLK
root and ARM PLL.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: acquire ATF commit hash
Peng Fan [Wed, 22 Apr 2020 02:51:13 +0000 (10:51 +0800)]
imx8m: acquire ATF commit hash

Acquire ATF commit hash when booting U-Boot to make user easy
to know the ATF version.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8: move SIP macro to common header
Peng Fan [Wed, 22 Apr 2020 02:50:04 +0000 (10:50 +0800)]
imx8: move SIP macro to common header

Move the SIP macro to common header and unify the name to
make others could reuse them.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: update is_imx6ull to include i.MX6ULZ
Peng Fan [Wed, 5 Feb 2020 12:17:17 +0000 (20:17 +0800)]
imx: update is_imx6ull to include i.MX6ULZ

Update is_imx6ull helper to include i.MX6ULZ SoC. i.MX6ULZ could
share same macro, then we no need to add is_imx6ulz in various drivers.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: imx8m: add i.MX8MN variants support
Peng Fan [Wed, 5 Feb 2020 09:39:27 +0000 (17:39 +0800)]
imx: imx8m: add i.MX8MN variants support

Add i.MX8MN variants support

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: imx8m: add i.MX8MQ Dual and QuadLite support
Peng Fan [Wed, 5 Feb 2020 09:34:54 +0000 (17:34 +0800)]
imx: imx8m: add i.MX8MQ Dual and QuadLite support

Add i.MX8MQ Dual and QuadLite variants.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: cpu: support speed grade for i.MX8MP
Peng Fan [Fri, 17 Jan 2020 08:11:29 +0000 (16:11 +0800)]
imx: cpu: support speed grade for i.MX8MP

i.MX8MP speed grade use same layout as i.MX8MN, so reuse it for i.MX8MP

Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8mn: Update speed grade
Peng Fan [Wed, 12 Dec 2018 10:47:58 +0000 (02:47 -0800)]
imx8mn: Update speed grade

imx8mn speed grade fuse uses new definitions as below. So have
to update get_cpu_speed_grade_hz function to match it.

SPEED_GRADE[5:4]    SPEED_GRADE[3:0]    MHz
      xx                0000            2300
      xx                0001            2200
      xx                0010            2100
      xx                0011            2000
      xx                0100            1900
      xx                0101            1800
      xx                0110            1700
      xx                0111            1600
      xx                1000            1500
      xx                1001            1400
      xx                1010            1300
      xx                1011            1200
      xx                1100            1100
      xx                1101            1000
      xx                1110             900
      xx                1111             800

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
4 years agoimx8mm: Update CPU speed grading
Ye Li [Wed, 17 Oct 2018 06:12:37 +0000 (23:12 -0700)]
imx8mm: Update CPU speed grading

According to iMX8MM datasheet (IMX8MMIEC_Rev_D and IMX8MMCEC_Rev_D),
the speed grading for imx8mm is 800Mhz, 1.2Ghz, 1.6Ghz and 1.8Ghz.
Update them to get_cpu_speed_grade_hz function.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx: fix cpu_type helper
Peng Fan [Wed, 5 Feb 2020 09:44:28 +0000 (17:44 +0800)]
imx: fix cpu_type helper

i.MX8MP use 0x182 as its ID, so 0xff is not valid to get the cpu type,
extend it to 0x1ff.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoARM: imx: imx8mm: Add missing clock entries for FEC clock
Marek Vasut [Fri, 24 Apr 2020 19:37:26 +0000 (21:37 +0200)]
ARM: imx: imx8mm: Add missing clock entries for FEC clock

All the FEC ethernet clock entries for iMX8MM are missing, while they
are already present on iMX8MQ. Fill in the nodes on iMX8MM, as the FEC
ethernet gets bogus clock information otherwise which makes ethernet
inoperable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
4 years agoMerge tag 'efi-2020-07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Thu, 30 Apr 2020 19:11:06 +0000 (15:11 -0400)]
Merge tag 'efi-2020-07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-07-rc2

This pull request contains bug fixes needed due to the merged changes for
EFI secure boot.

Patches are supplied to identify EFI system partitions.

4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Thu, 30 Apr 2020 17:00:20 +0000 (13:00 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- DM ACPI support (Part A)
- Improve support for chain-loading x86 U-Boot

4 years agoMerge tag 'xilinx-for-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Thu, 30 Apr 2020 15:31:33 +0000 (11:31 -0400)]
Merge tag 'xilinx-for-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2020.07-rc2

mmc:
- Fix dt property handling via generic function

clk:
- Fix versal watchdog clock setting

nand:
- Fix zynq nand command comparison

xilinx:
- Enable ubifs
- Sync board_late_init configurations with initrd_high setup
- Make custom distro boot more verbose

zynq:
- Kconfig alignments
- Fix nand cse configuration

zynqmp:
- Fix zcu104 low level qspi configuration
- Small DT updates

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Tom Rini [Thu, 30 Apr 2020 14:06:54 +0000 (10:06 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

- Add DM_ETH support for DPAA1, DPAA2 based RDB platforms: ls1046ardb,
  ls1043ardb, lx2160ardb, ls2088ardb, ls1088ardb.
- Add GICv3 support for ls1028a, ls2088a, ls1088a.
- Add lpuart support on ls1028aqds.
- Few bug fixes and updates on ls2088a, ls1012a, ls1046a, ls1021a based
  platforms.

4 years agox86: Add documentation for the chain-load feature
Simon Glass [Sun, 26 Apr 2020 15:13:01 +0000 (09:13 -0600)]
x86: Add documentation for the chain-load feature

Add a few notes about this feature, which is aimed for development.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Use the existing stack when chain-loading
Simon Glass [Sun, 26 Apr 2020 15:13:00 +0000 (09:13 -0600)]
x86: Use the existing stack when chain-loading

With chromebook_coral we normally run TPL->SPL->U-Boot. This is the
'bare metal' case.

When running from coreboot we put u-boot.bin in the RW_LEGACY portion
of the image, e.g. with:

   cbfstool image-coral.serial.bin add-flat-binary -r RW_LEGACY \
-f /tmp/b/chromebook_coral/u-boot.bin -n altfw/u-boot \
-c lzma -l 0x1110000 -e 0x1110000

In this case U-Boot is run from coreboot (actually Depthcharge, its
payload) so we cannot access CAR. Use the existing stack instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Add a way to detect running from coreboot
Simon Glass [Sun, 26 Apr 2020 15:12:59 +0000 (09:12 -0600)]
x86: Add a way to detect running from coreboot

If U-Boot is running from coreboot we need to skip low-level init. Add
an way to detect this and to set the gd flag.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Move coreboot-table detection into common code
Simon Glass [Sun, 26 Apr 2020 15:12:58 +0000 (09:12 -0600)]
x86: Move coreboot-table detection into common code

To support detecting booting from coreboot, move the code which locates
the coreboot tables into a common place. Adjust the algorithm slightly to
use a word comparison instead of string, since it is faster.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the comments to 960KB]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoboard: Add a gd flag for chain loading
Simon Glass [Sun, 26 Apr 2020 15:12:57 +0000 (09:12 -0600)]
board: Add a gd flag for chain loading

When U-Boot is run from another boot loader, much of the low-level init
needs to be skipped.

Add a flag for this and adjust ll_boot_init() to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agopci: Avoid auto-config when chain loading
Simon Glass [Sun, 26 Apr 2020 15:12:56 +0000 (09:12 -0600)]
pci: Avoid auto-config when chain loading

When U-Boot is not the first-stage bootloader we don't want to
re-configure the PCI devices, since this has already been done. Add a
check to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: cpu: Skip init code when chain loading
Simon Glass [Sun, 26 Apr 2020 15:12:55 +0000 (09:12 -0600)]
x86: cpu: Skip init code when chain loading

When U-Boot is not the first-stage bootloader the interrupt and cache init
must be skipped, as well as init for various peripherals. Update the code
to add checks for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: apl: Skip init code when chain loading
Simon Glass [Sun, 26 Apr 2020 15:12:54 +0000 (09:12 -0600)]
x86: apl: Skip init code when chain loading

When U-Boot is not the first-stage bootloader the FSP-S init must be
skipped. Update it to add a check.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: fsp: Allow skipping init code when chain loading
Simon Glass [Sun, 26 Apr 2020 15:12:53 +0000 (09:12 -0600)]
x86: fsp: Allow skipping init code when chain loading

It is useful to be able to boot the same x86 image on a device with or
without a first-stage bootloader. For example, with chromebook_coral, it
is helpful for testing to be able to boot the same U-Boot (complete with
FSP) on bare metal and from coreboot. It allows checking of things like
CPU speed, comparing registers, ACPI tables and the like.

When U-Boot is not the first-stage bootloader much of this code is not
needed and can break booting. Add checks for this to the FSP code.

Rather than checking for the amount of available SDRAM, just use 1GB in
this situation, which should be safe. Using 2GB may run into a memory
hole on some SoCs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Add an acpi command
Simon Glass [Sun, 26 Apr 2020 15:19:53 +0000 (09:19 -0600)]
acpi: Add an acpi command

It is useful to dump ACPI tables in U-Boot to see what has been generated.
Add a command to handle this.

To allow the command to find the tables, add a position into the global
data.

Support subcommands to list and dump the tables.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agoacpi: Move the xsdt pointer to acpi_ctx
Simon Glass [Sun, 26 Apr 2020 15:19:52 +0000 (09:19 -0600)]
acpi: Move the xsdt pointer to acpi_ctx

Put this in the context along with the other important pointers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agoacpi: Put table-setup code in its own function
Simon Glass [Sun, 26 Apr 2020 15:19:51 +0000 (09:19 -0600)]
acpi: Put table-setup code in its own function

We always write three basic tables to ACPI at the start. Move this into
its own function, along with acpi_fill_header(), so we can write a test
for this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoacpi: Move acpi_add_table() to generic code
Simon Glass [Sun, 26 Apr 2020 15:19:50 +0000 (09:19 -0600)]
acpi: Move acpi_add_table() to generic code

Move this code to a generic location so that we can test it with sandbox.
This requires adding a few new fields to acpi_ctx, so drop the local
variables used in the original code.

Also use mapmem to avoid pointer-to-address casts which don't work on
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agoacpi: Drop code for missing XSDT from acpi_write_rsdp()
Simon Glass [Sun, 26 Apr 2020 15:19:49 +0000 (09:19 -0600)]
acpi: Drop code for missing XSDT from acpi_write_rsdp()

We don't actually support tables without an XSDT so we can drop this dead
code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: Allow devices to write ACPI tables
Simon Glass [Sun, 26 Apr 2020 15:19:48 +0000 (09:19 -0600)]
x86: Allow devices to write ACPI tables

Call the new core function to permit devices to write their own ACPI
tables. These tables will appear after all other tables.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agoacpi: Convert part of acpi_table to use acpi_ctx
Simon Glass [Sun, 26 Apr 2020 15:19:47 +0000 (09:19 -0600)]
acpi: Convert part of acpi_table to use acpi_ctx

The current code uses an address but a pointer would result in fewer
casts. Also it repeats the alignment code in a lot of places so this would
be better done in a helper function.

Update write_acpi_tables() to make use of the new acpi_ctx structure,
adding a few helpers to clean things up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agoacpi: Add a method to write tables for a device
Simon Glass [Sun, 26 Apr 2020 15:19:46 +0000 (09:19 -0600)]
acpi: Add a method to write tables for a device

A device may want to write out ACPI tables to describe itself to Linux.
Add a method to permit this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agoacpi: Add a binding for ACPI settings in the device tree
Simon Glass [Sun, 26 Apr 2020 15:19:45 +0000 (09:19 -0600)]
acpi: Add a binding for ACPI settings in the device tree

Devices need to report various identifiers in the ACPI tables. Rather than
hard-coding these in drivers it is typically better to put them in the
device tree.

Add a binding file to describe this.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agox86: cbfs: Drop unwanted declaration
Simon Glass [Sun, 5 Apr 2020 23:22:38 +0000 (17:22 -0600)]
x86: cbfs: Drop unwanted declaration

The intention here is add a forward declaration, not actually declare a
variable. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoefi_loader: fix 'efidebug bootorder'
Heinrich Schuchardt [Wed, 29 Apr 2020 19:15:08 +0000 (21:15 +0200)]
efi_loader: fix 'efidebug bootorder'

* don't copy GUIDs for no reason
* shorten print format strings by using variable names
* don't use the run-time table to access exported functions
* check the result of malloc() (fixes Coverity CID 300331)

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: efidebug, avoid illegal memory access
Heinrich Schuchardt [Wed, 29 Apr 2020 18:21:39 +0000 (20:21 +0200)]
efi_loader: efidebug, avoid illegal memory access

For EFI_PERSISTENT_MEMORY_TYPE the 'efidebug memmap' command produces an
illegal memory access.

* Add the missing descriptive string for EFI_PERSISTENT_MEMORY_TYPE.
* Replace the check for EFI_MAX_MEMORY_TYPE by the ARRAY_SIZE() macro.

Reported-by: Coverity (CID 300336)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: fix 'efidebug boot dump'
Heinrich Schuchardt [Wed, 29 Apr 2020 17:20:35 +0000 (19:20 +0200)]
efi_loader: fix 'efidebug boot dump'

* Do not recreate a variable name that we already have as u16 string.
* Check the return value of malloc()
* EFI_NOT_FOUND cannot occur for a variable name returned by
  GetNextVariableName(). Remove a print statement.
* Don't copy a GUID for no reason.
* Don't use the run-time service table to call exported functions.
* Don't pass NULL to show_efi_boot_opt_data() (fixes Coverity CID 300338).

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoMAINTAINERS: assign test/py/tests/test_efi*/ to EFI PAYLOAD
Heinrich Schuchardt [Wed, 22 Apr 2020 15:53:34 +0000 (17:53 +0200)]
MAINTAINERS: assign test/py/tests/test_efi*/ to EFI PAYLOAD

Some UEFI related files are not assigned currently. Add them to the
EFI PAYLOAD area.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: remove CONFIG_EFI_SECURE_BOOT in efi_loader.h
AKASHI Takahiro [Tue, 21 Apr 2020 00:38:38 +0000 (09:38 +0900)]
efi_loader: remove CONFIG_EFI_SECURE_BOOT in efi_loader.h

The guard doesn't make any difference, so remove it.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agodoc/efi: rework secure boot description
Heinrich Schuchardt [Thu, 16 Apr 2020 18:31:56 +0000 (20:31 +0200)]
doc/efi: rework secure boot description

Ensure a uniform formatting.
Some rephrasing.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: identify EFI system partition
Heinrich Schuchardt [Thu, 19 Mar 2020 14:16:31 +0000 (15:16 +0100)]
efi_loader: identify EFI system partition

In subsequent patches UEFI variables shalled be stored on the EFI system
partition. Hence we need to identify the EFI system partition.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agopart: detect EFI system partition
Heinrich Schuchardt [Thu, 19 Mar 2020 12:49:34 +0000 (13:49 +0100)]
part: detect EFI system partition

Up to now for MBR and GPT partitions the info field 'bootable' was set to 1
if either the partition was an EFI system partition or the bootable flag
was set.

Turn info field 'bootable' into a bit mask with separate bits for bootable
and EFI system partition.

This will allow us to identify the EFI system partition in the UEFI
sub-system.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: remove superfluous NULL check in bootefi.c
Heinrich Schuchardt [Mon, 20 Apr 2020 10:44:56 +0000 (12:44 +0200)]
efi_loader: remove superfluous NULL check in bootefi.c

efi_free_pool() and efi_delete_handle() both check if their argument is
NULL. The caller should not duplicate this check.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agotest/py: fix test_efi_secboot/conftest.py
Heinrich Schuchardt [Tue, 21 Apr 2020 16:44:39 +0000 (18:44 +0200)]
test/py: fix test_efi_secboot/conftest.py

If udisksctl is present
test/py/tests/test_efi_secboot/conftest.py
fails because the disk image is never mounted.

Normal users can only mount fuse file systems. Unfortunately fusefat is
still in an experimental state and seems not to work here correctly.

So as we have to be root or use the sudo command anyway delete all coding
referring to udisksctl.

--

We should not use mount point /mnt as this directory or one of its
sub-directories might already be in use as active mount points. Instead
create a new directory in the build root as mount point.

--

Remove debug print statements that have been commented out. print without
parentheses is anyway invalid in Python 3. And pytest anyway filters out
the output if there is no exception reported.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Wed, 29 Apr 2020 14:39:18 +0000 (10:39 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh

- rmobile gen2/gen3 DTS sync and defconfig consolidation

4 years agoconfigs: ls2088ardb: Correct DEFAULT_DEVICE_TREE value
Kuldeep Singh [Thu, 19 Mar 2020 10:04:16 +0000 (15:34 +0530)]
configs: ls2088ardb: Correct DEFAULT_DEVICE_TREE value

LS2088A-RDB has CONFIG_DEFAULT_DEVICE_TREE value correctly set as
"fsl-ls2088a-rdb-qspi" for QSPI secure/non-secure boot and TFA
non-secure boot mode.

Fix the value for TFA secure boot mode.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agoconfigs: enable DM_ETH support for LS1046ARDB
Madalin Bucur [Thu, 23 Apr 2020 13:25:22 +0000 (16:25 +0300)]
configs: enable DM_ETH support for LS1046ARDB

Enable DM_ETH on all the defconfigs for the LS1046ARDB board.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agoconfigs: enable DM_ETH support for LS1043ARDB
Madalin Bucur [Thu, 23 Apr 2020 13:25:21 +0000 (16:25 +0300)]
configs: enable DM_ETH support for LS1043ARDB

Enable DM_ETH on all the defconfigs for the LS1043ARDB board.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agodriver: net: fm: add DM ETH support
Madalin Bucur [Thu, 23 Apr 2020 13:25:19 +0000 (16:25 +0300)]
driver: net: fm: add DM ETH support

Probe the FMan MACs based on the device tree while
retaining the legacy code/functionality.
One notable change introduced here is that, for DM_ETH,
the name of the interfaces is corrected to the fmX-macY
format, that avoids the referral to the MAC block names
which were incorrect for FMan v3 devices (i.e. DTSEC,
TGEC) and had weird formatting (i.e. FM1@DTSEC6, FM1@TGEC1).
The legacy code is left unchanged in this respect.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agodriver: net: fm: add DM MDIO support
Madalin Bucur [Thu, 23 Apr 2020 13:25:18 +0000 (16:25 +0300)]
driver: net: fm: add DM MDIO support

Allow the MDIO devices to be probed based on the device tree.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agodriver: net: fm: separate receive buffer free code
Madalin Bucur [Thu, 23 Apr 2020 13:25:17 +0000 (16:25 +0300)]
driver: net: fm: separate receive buffer free code

Move the receive buffer free code in a separate function.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agodriver: net: fm: change init_phy() param
Madalin Bucur [Thu, 23 Apr 2020 13:25:16 +0000 (16:25 +0300)]
driver: net: fm: change init_phy() param

Change the init_phy() parameter to simplify the code.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agoARM: dts: add QorIQ DPAA 1 FMan v3 to LS1046ARDB
Madalin Bucur [Thu, 23 Apr 2020 13:25:15 +0000 (16:25 +0300)]
ARM: dts: add QorIQ DPAA 1 FMan v3 to LS1046ARDB

Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1046ARDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agoARM: dts: add QorIQ DPAA 1 FMan v3 for LS1046A
Madalin Bucur [Thu, 23 Apr 2020 13:25:14 +0000 (16:25 +0300)]
ARM: dts: add QorIQ DPAA 1 FMan v3 for LS1046A

Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the
LS1046A SoC. The device tree fragments are copied over with little
modification from the Linux kernel source code.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>