net: phy: micrel: Add basic support for KSZ9131
authorPhilippe Schenker <philippe.schenker@toradex.com>
Wed, 11 Mar 2020 10:59:23 +0000 (11:59 +0100)
committerStefano Babic <sbabic@denx.de>
Fri, 1 May 2020 11:46:22 +0000 (13:46 +0200)
This adds basic support for the new Micrel KSZ9131 phy.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
drivers/net/phy/micrel_ksz90x1.c
include/micrel.h

index f83650b8ef686e3bff54909bea13bfc6b4ee8dcd..f0032e8ce166813f9fe58afa380064df3f27537e 100644 (file)
@@ -393,9 +393,67 @@ static struct phy_driver ksz9031_driver = {
        .readext = &ksz9031_phy_extread,
 };
 
+/*
+ * KSZ9131
+ */
+static int ksz9131_config(struct phy_device *phydev)
+{
+       /* TBD: Implement Skew values for dts */
+
+       /* add an option to disable the gigabit feature of this PHY */
+       if (env_get("disable_giga")) {
+               unsigned features;
+               unsigned bmcr;
+
+               /* disable speed 1000 in features supported by the PHY */
+               features = phydev->drv->features;
+               features &= ~(SUPPORTED_1000baseT_Half |
+                               SUPPORTED_1000baseT_Full);
+               phydev->advertising = phydev->supported = features;
+
+               /* disable speed 1000 in Basic Control Register */
+               bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
+               bmcr &= ~(1 << 6);
+               phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, bmcr);
+
+               /* disable speed 1000 in 1000Base-T Control Register */
+               phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0);
+
+               /* start autoneg */
+               genphy_config_aneg(phydev);
+               genphy_restart_aneg(phydev);
+
+               return 0;
+       }
+
+       return genphy_config(phydev);
+}
+
+static struct phy_driver ksz9131_driver = {
+       .name = "Micrel ksz9031",
+       .uid  = PHY_ID_KSZ9131,
+       .mask = MII_KSZ9x31_SILICON_REV_MASK,
+       .features = PHY_GBIT_FEATURES,
+       .config   = &ksz9131_config,
+       .startup  = &ksz90xx_startup,
+       .shutdown = &genphy_shutdown,
+       .writeext = &ksz9031_phy_extwrite,
+       .readext = &ksz9031_phy_extread,
+};
+
+int ksz9xx1_phy_get_id(struct phy_device *phydev)
+{
+       unsigned int phyid;
+
+       get_phy_id(phydev->bus, phydev->addr, MDIO_DEVAD_NONE, &phyid);
+
+       return phyid;
+}
+
 int phy_micrel_ksz90x1_init(void)
 {
        phy_register(&ksz9021_driver);
        phy_register(&ksz9031_driver);
+       phy_register(&ksz9131_driver);
        return 0;
 }
index 1d121c2825b81ee943a36bfdeaab5332c9fb116e..f5126f299299077f8da2eebc20a91124a9014a84 100644 (file)
@@ -26,6 +26,7 @@
 #define MII_KSZ9x31_SILICON_REV_MASK           0xfffff0
 
 #define PHY_ID_KSZ9031                         0x00221620
+#define PHY_ID_KSZ9131                         0x00221640
 
 
 /* Registers */
@@ -40,5 +41,6 @@ int ksz9031_phy_extended_write(struct phy_device *phydev, int devaddr,
                               int regnum, u16 mode, u16 val);
 int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr,
                              int regnum, u16 mode);
+int ksz9xx1_phy_get_id(struct phy_device *phydev);
 
 #endif