Merge tag 'xilinx-for-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u...
authorTom Rini <trini@konsulko.com>
Thu, 30 Apr 2020 15:31:33 +0000 (11:31 -0400)
committerTom Rini <trini@konsulko.com>
Thu, 30 Apr 2020 15:34:01 +0000 (11:34 -0400)
commit6d7dacf726ca043a3f5487549bbfa506c990c813
tree0976c82eca83479ba9337f9a1824572ea0b9578e
parentb9da77f1958aab4ec50ff2f095b40464ca2489dd
parent27d706937a5c72f0414a540ca20fd36b4b72bda7
Merge tag 'xilinx-for-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2020.07-rc2

mmc:
- Fix dt property handling via generic function

clk:
- Fix versal watchdog clock setting

nand:
- Fix zynq nand command comparison

xilinx:
- Enable ubifs
- Sync board_late_init configurations with initrd_high setup
- Make custom distro boot more verbose

zynq:
- Kconfig alignments
- Fix nand cse configuration

zynqmp:
- Fix zcu104 low level qspi configuration
- Small DT updates

Signed-off-by: Tom Rini <trini@konsulko.com>
configs/xilinx_zynq_virt_defconfig
configs/zynq_cse_nand_defconfig