Add more clarity by changing the Kconfig entry name.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Re-run migration, update a few more cases]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
select SPL_USE_TINY_PRINTF
imply CMD_DM
imply CMD_GPT
- imply CMD_UBI if NAND
+ imply CMD_UBI if MTD_RAW_NAND
imply DISTRO_DEFAULTS
imply FAT_WRITE
imply FIT
select CPU_V7A
select SYS_FSL_ERRATUM_ESDHC111
imply CMD_MTDPARTS
- imply NAND
+ imply MTD_RAW_NAND
config ARCH_ZYNQ
bool "Xilinx Zynq based platform"
config CMD_NANDBCB
bool "i.MX6 NAND Boot Control Block(BCB) command"
- depends on NAND && CMD_MTDPARTS
+ depends on MTD_RAW_NAND && CMD_MTDPARTS
select BCH if MX6UL || MX6ULL
default y if (ARCH_MX6 && NAND_MXS) || (ARCH_MX7 && NAND_MXS)
help
#if defined(CONFIG_NOR)
char gpmc_cs0_flash = MTD_DEV_TYPE_NOR;
-#elif defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_CMD_NAND)
char gpmc_cs0_flash = MTD_DEV_TYPE_NAND;
#elif defined(CONFIG_CMD_ONENAND)
char gpmc_cs0_flash = MTD_DEV_TYPE_ONENAND;
STNOR_GPMC_CONFIG7
};
#endif
-#if defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND)
+#if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_CMD_NAND)
const u32 gpmc_regs_nand[GPMC_MAX_REG] = {
M_NAND_GPMC_CONFIG1,
M_NAND_GPMC_CONFIG2,
GPMC_SIZE_16M)));
break;
#endif
-#if defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND)
+#if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_CMD_NAND)
case MTD_DEV_TYPE_NAND:
gpmc_regs = gpmc_regs_nand;
base = CONFIG_SYS_NAND_BASE;
hw_watchdog_init();
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
gpmc_init();
#endif
return 0;
{OFFSET(gpmc_be1n), (MODE(1) | RXACTIVE)},/* MII1_COL */
{-1},
};
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
{OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS) },
/* GPIO3_17 (MCASP0_AHCLKR) - ETH2_LEDY */
{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS) },
-#ifndef CONFIG_NAND
+#ifndef CONFIG_MTD_RAW_NAND
/* GPIO2_3 - NAND_OE */
{OFFSET(gpmc_oen_ren), (MODE(7) | PULLDOWN_EN | RXACTIVE)},
/* GPIO2_4 - NAND_WEN */
configure_module_pin_mux(i2c0_pin_mux);
configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mii2_pin_mux);
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux);
#elif defined(CONFIG_MMC)
configure_module_pin_mux(mmc1_pin_mux);
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
+#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif
return 0;
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
gpmc_init();
#endif
return 0;
{-1},
};
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)},
void enable_board_pin_mux(void)
{
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux);
#endif
configure_module_pin_mux(guardian_interfaces_pin_mux);
puts("EEPROM Content Invalid.\n");
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
+#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif
shc_request_gpio();
else
config_board_mux(MUX_TYPE_SDHC);
-#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI)
+#if defined(CONFIG_MTD_RAW_NAND) && defined(CONFIG_FSL_QSPI)
val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4);
if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3))
printf("NOR vBank%d\n", reg);
}
#elif defined(CONFIG_TARGET_T1023RDB)
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
puts("NAND\n");
#else
printf("NOR vBank%d\n", t1023rdb_ctrl(I2C_GET_BANK));
{
void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
/* setup pins (some already setup for NAND) */
writel(0x04030000, gpio_regs + GPIO_PXINTC(0));
writel(0x04030000, gpio_regs + GPIO_PXMASKC(0));
{-1},
};
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
configure_module_pin_mux(cbmux_pin_mux);
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux);
#endif
#ifdef CONFIG_SPI
{-1},
};
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
configure_module_pin_mux(cbmux_pin_mux);
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux);
#endif
#ifdef CONFIG_SPI
{-1},
};
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
{
configure_module_pin_mux(uart0_pin_mux);
configure_module_pin_mux(i2c1_pin_mux);
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux);
#endif
#ifndef CONFIG_NO_ETH
SPL image that is ready to be programmed directly embedding the ECCs,
randomized, and with the necessary bits needed to reduce the number of
bitflips. The U-Boot build system, when configured for the NAND (with
-CONFIG_NAND=y) will also generate the image sunxi-spl-with-ecc.bin
+CONFIG_MTD_RAW_NAND=y) will also generate the image sunxi-spl-with-ecc.bin
that will have been generated by that tool.
In order to flash your U-Boot image onto a board, assuming that the
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
+#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif
{-1},
};
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */
/* Beaglebone pinmux */
configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux);
#elif defined(CONFIG_NOR)
configure_module_pin_mux(bone_norcape_pin_mux);
if (profile & ~PROFILE_2)
configure_module_pin_mux(i2c1_pin_mux);
/* Profiles 2 & 3 don't have NAND */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
if (profile & ~(PROFILE_2 | PROFILE_3))
configure_module_pin_mux(nand_pin_mux);
#endif
}
/* Beaglebone LT pinmux */
configure_module_pin_mux(mmc0_pin_mux);
-#if defined(CONFIG_NAND) && defined(CONFIG_EMMC_BOOT)
+#if defined(CONFIG_MTD_RAW_NAND) && defined(CONFIG_EMMC_BOOT)
configure_module_pin_mux(nand_pin_mux);
#elif defined(CONFIG_NOR) && defined(CONFIG_EMMC_BOOT)
configure_module_pin_mux(bone_norcape_pin_mux);
{-1},
};
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */
if (board_is_evm()) {
configure_module_pin_mux(gpio5_7_pin_mux);
configure_module_pin_mux(rgmii1_pin_mux);
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux);
#endif
} else if (board_is_sk() || board_is_idk()) {
configure_module_pin_mux(rgmii1_pin_mux);
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
printf("Error: NAND flash not present on this board\n");
#endif
configure_module_pin_mux(qspi_pin_mux);
} else if (board_is_eposevm()) {
configure_module_pin_mux(rmii1_pin_mux);
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux);
#else
configure_module_pin_mux(qspi_pin_mux);
early_padconf, ARRAY_SIZE(early_padconf));
}
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
static int nand_sw_detect(void)
{
int rc;
int board_init(void)
{
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif
return 0;
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
+#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif
return 0;
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux);
#endif
}
config CMD_MTDPARTS
bool "MTD partition support"
- select MTD_DEVICE if (CMD_NAND || NAND)
+ select MTD_DEVICE if (CMD_NAND || MTD_RAW_NAND)
help
MTD partitioning tool support.
It is strongly encouraged to avoid using this command
config NAND_BOOT
bool "Support for booting from NAND flash"
default n
- imply NAND
+ imply MTD_RAW_NAND
help
Enabling this will make a U-Boot binary that is capable of being
booted via NAND flash. This is not a must, some SoCs need this,
config ONENAND_BOOT
bool "Support for booting from ONENAND"
default n
- imply NAND
+ imply MTD_RAW_NAND
help
Enabling this will make a U-Boot binary that is capable of being
booted via ONENAND. This is not a must, some SoCs need this,
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_UBI_VOLUME="uboot-env"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0x100
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_MARVELL=y
CONFIG_TSEC_ENET=y
CONFIG_SYS_NS16550=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_MARVELL=y
CONFIG_TSEC_ENET=y
CONFIG_SYS_NS16550=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_OMAP_HS_ADMA=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x00080000
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_DM_MMC=y
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MISC=y
# CONFIG_MMC is not set
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x100000
CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x200000
CONFIG_DM_MMC=y
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_MMC=y
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MII=y
CONFIG_DRIVER_TI_CPSW=y
CONFIG_CMD_JFFS2=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_CONS_INDEX=3
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_DM_PCA953X=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SF_DEFAULT_SPEED=48000000
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHY_GIGE=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SF_DEFAULT_SPEED=48000000
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHY_GIGE=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SF_DEFAULT_SPEED=48000000
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHY_GIGE=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SF_DEFAULT_SPEED=48000000
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHY_GIGE=y
CONFIG_FPGA_SPARTAN3=y
CONFIG_MXC_GPIO=y
CONFIG_MMC_MXC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_MII=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_MXS_GPIO=y
CONFIG_MMC_MXS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_MII=y
CONFIG_CONS_INDEX=0
CONFIG_ENV_OFFSET_REDUND=0xE0000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=3
CONFIG_ENV_OFFSET_REDUND=0xE0000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_ENV_OFFSET_REDUND=0xE0000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=3
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_KONA=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_LED_BLINK=y
# CONFIG_MMC is not set
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_BRCMNAND=y
CONFIG_NAND_BRCMNAND_63158=y
CONFIG_DM_SPI_FLASH=y
CONFIG_LED_BCM6328=y
CONFIG_LED_BLINK=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_BRCMNAND=y
CONFIG_NAND_BRCMNAND_6838=y
CONFIG_PHY=y
CONFIG_LED_BLINK=y
# CONFIG_MMC is not set
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_BRCMNAND=y
CONFIG_NAND_BRCMNAND_6858=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_MXS_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_MII=y
CONFIG_CONS_INDEX=0
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ZYNQ=y
CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS=y
CONFIG_MII=y
CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_VF610_NFC=y
CONFIG_NAND_VF610_NFC_DT=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_MISC=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_PHY_NATSEMI=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_TWL4030_LED=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_CONS_INDEX=2
CONFIG_SPI=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_DM_ETH=y
CONFIG_MII=y
CONFIG_DRIVER_TI_CPSW=y
CONFIG_DM_KEYBOARD=y
CONFIG_DM_MMC=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_LED_STATUS_BOOT_ENABLE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_MII=y
CONFIG_DRIVER_TI_CPSW=y
CONFIG_FAT_WRITE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_TWL4030_LED=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x2C000000
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=48000000
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_DM_MMC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_MXS=y
CONFIG_NAND_MXS_DT=y
CONFIG_DM_MMC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS_DT=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_PHYLIB=y
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_VF610_NFC=y
CONFIG_NAND_VF610_NFC_DT=y
CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y
CONFIG_LED_BCM6328=y
CONFIG_LED_BLINK=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_BRCMNAND=y
CONFIG_NAND_BRCMNAND_6368=y
CONFIG_DM_ETH=y
CONFIG_CLK_AT91=y
CONFIG_DFU_NAND=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PHYLIB=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_SATA_MV=y
CONFIG_BLK=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH_MACRONIX=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_LPC32XX_SLC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_TWL4030_LED=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_CONS_INDEX=3
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_SPL_MMC_HS200_SUPPORT=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_SPL_MMC_HS200_SUPPORT=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
CONFIG_MTD_NOR_FLASH=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
# CONFIG_MMC is not set
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_DM_ETH=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-gurnard"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_ATMEL_NAND_HWECC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_E1000=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_LED_GPIO=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_MXS=y
CONFIG_NAND_MXS_DT=y
CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_TI_AEMIF=y
CONFIG_MISC=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_TI_AEMIF=y
CONFIG_MISC=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_TI_AEMIF=y
CONFIG_MISC=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_TI_AEMIF=y
CONFIG_MISC=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_TI_AEMIF=y
CONFIG_MISC=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_TI_AEMIF=y
CONFIG_MISC=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_PHYLIB=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_PHYLIB=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_PHYLIB=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_PHYLIB=y
CONFIG_E1000=y
CONFIG_FSL_CAAM=y
CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_DM_SPI_FLASH=y
# CONFIG_SPI_FLASH_BAR is not set
CONFIG_PHYLIB=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC_IMX=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_MXC=y
CONFIG_PHYLIB=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_MXS_GPIO=y
CONFIG_MMC_MXS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_MII=y
CONFIG_CONS_INDEX=0
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_MXS_GPIO=y
CONFIG_MMC_MXS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_MII=y
CONFIG_CONS_INDEX=0
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_MXS_GPIO=y
CONFIG_MMC_MXS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_MII=y
CONFIG_CONS_INDEX=0
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_MXS_GPIO=y
CONFIG_MMC_MXS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_MII=y
CONFIG_CONS_INDEX=0
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_MXC_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXC=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0xB6000000
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXC=y
CONFIG_MII=y
CONFIG_SMC911X=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_ESDHC_IMX=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_MXC=y
CONFIG_MII=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_TWL4030_LED=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_DM_MMC=y
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_ENV_IS_IN_NAND=y
CONFIG_TWL4030_LED=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_CONS_INDEX=3
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_OMAP36XX_PINS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_ENV_IS_IN_NAND=y
CONFIG_TWL4030_LED=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_SMC911X=y
CONFIG_DM=y
CONFIG_TWL4030_LED=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_TWL4030_LED=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x08000000
CONFIG_SYS_I2C_DAVINCI=y
CONFIG_DM_MMC=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_VF610_NFC=y
CONFIG_NAND_VF610_NFC_DT=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_DM=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_MII=y
CONFIG_DRIVER_TI_CPSW=y
CONFIG_SPI=y
CONFIG_DM=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x100000
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_NAND_MXS_DT=y
CONFIG_PHYLIB=y
CONFIG_ENV_OFFSET_REDUND=0x1080000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_MII=y
CONFIG_ENV_OFFSET_REDUND=0x1080000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MICROCHIP_FLEXCOM=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_MICREL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ATMEL=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_ATMEL_NAND_HW_PMECC=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ATMEL=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_ATMEL_NAND_HW_PMECC=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PMECC_CAP=4
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PMECC_CAP=4
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_ATMEL_NAND_HW_PMECC=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PMECC_CAP=8
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PMECC_CAP=8
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_CLK_AT91=y
CONFIG_DFU_NAND=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PHYLIB=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_USB=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_USB=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_STM32_FMC2=y
CONFIG_MTD_SPI_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_STM32_FMC2=y
CONFIG_MTD_SPI_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_STM32_FMC2=y
CONFIG_MTD_SPI_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_TWL4030_LED=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_CONS_INDEX=3
CONFIG_CLK_AT91=y
CONFIG_DFU_NAND=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_DM_ETH=y
CONFIG_MII=y
CONFIG_ENV_OFFSET_REDUND=0x1080000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_LED_STATUS_CMD=y
CONFIG_TWL4030_LED=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_LED_STATUS_CMD=y
CONFIG_TWL4030_LED=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_CONS_INDEX=3
CONFIG_SYS_NS16550=y
CONFIG_MMC_UNIPHIER=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_DENALI_DT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
CONFIG_SPL_NAND_DENALI=y
CONFIG_MMC_UNIPHIER=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_DENALI_DT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
CONFIG_SPL_NAND_DENALI=y
CONFIG_MMC_SDHCI_CADENCE=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_DENALI_DT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
CONFIG_DM_ETH=y
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_GPIO=y
CONFIG_VYBRID_GPIO=y
CONFIG_FSL_ESDHC_IMX=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_VF610_NFC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_PHYLIB=y
CONFIG_DM_GPIO=y
CONFIG_VYBRID_GPIO=y
CONFIG_FSL_ESDHC_IMX=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_VF610_NFC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_PHYLIB=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_OFFSET_REDUND=0xC0000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PMECC_CAP=4
CONFIG_ENV_OFFSET_REDUND=0xC0000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PMECC_CAP=8
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
CONFIG_SF_DEFAULT_BUS=1
# CONFIG_DM_WARN is not set
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ARASAN=y
CONFIG_SYS_NAND_MAX_CHIPS=2
# CONFIG_EFI_LOADER is not set
# CONFIG_DM_WARN is not set
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_MMC is not set
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ARASAN=y
# CONFIG_EFI_LOADER is not set
# CONFIG_MMC is not set
CONFIG_DM_MMC=y
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ARASAN=y
CONFIG_SYS_NAND_MAX_CHIPS=2
CONFIG_SPI_FLASH_SST=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ARASAN=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_NATSEMI=y
CONFIG_SPL_DM_SEQ_ALIAS=y
# CONFIG_MMC is not set
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ZYNQ=y
# CONFIG_EFI_LOADER is not set
CONFIG_DM_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ZYNQ=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DM_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD_DEVICE=y
-CONFIG_NAND=y
+CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ZYNQ=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_ANNOUNCE=y
config FASTBOOT_FLASH
bool "Enable FASTBOOT FLASH command"
default y if ARCH_SUNXI || ARCH_ROCKCHIP
- depends on MMC || (NAND && CMD_MTDPARTS)
+ depends on MMC || (MTD_RAW_NAND && CMD_MTDPARTS)
select IMAGE_SPARSE
help
The fastboot protocol includes a "flash" command for writing
config FASTBOOT_FLASH_NAND
bool "FASTBOOT on NAND"
- depends on NAND && CMD_MTDPARTS
+ depends on MTD_RAW_NAND && CMD_MTDPARTS
endchoice
-menuconfig NAND
+menuconfig MTD_RAW_NAND
bool "Raw NAND Device Support"
-if NAND
+if MTD_RAW_NAND
config SYS_NAND_SELF_INIT
bool
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/b4860qds/b4_pbi.cfg
#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/b4860qds/b4_rcw.cfg
-#ifndef CONFIG_NAND
+#ifndef CONFIG_MTD_RAW_NAND
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#else
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
* 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
*/
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1130)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FMAN_FW_ADDR (13 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
/*
#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
* Environment
*/
#if defined(CONFIG_RAMBOOT_SPIFLASH)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE)
#endif
#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#endif
/* Set up IFC registers for boot location NOR/NAND */
-#if defined(CONFIG_NAND) || defined(CONFIG_NAND_SECBOOT)
+#if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_NAND_SECBOOT)
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR
#if defined(CONFIG_RAMBOOT_SDCARD)
#define CONFIG_FSL_FIXED_MMC_LOCATION
#define CONFIG_SYS_MMC_ENV_DEV 0
-#elif defined(CONFIG_NAND) || defined(CONFIG_NAND_SECBOOT)
+#elif defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_NAND_SECBOOT)
#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE)
#endif
#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_NAND_INIT
#define CONFIG_SYS_NAND_DDR_LAW 11
/* Set up IFC registers for boot location NOR/NAND */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
* Environment
*/
#if defined(CONFIG_SYS_RAMBOOT)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
#define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
#else
#endif
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#ifdef CONFIG_NXP_ESBC
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SYS_NAND_DDR_LAW 11
/* Set up IFC registers for boot location NOR/NAND */
-#if defined(CONFIG_NAND) || defined(CONFIG_NAND_SECBOOT)
+#if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_NAND_SECBOOT)
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (128 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 96 * 1024)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
* SPI interface will not be available in case of NAND boot SPI CS0 will be
* used for SLIC
*/
-#if !defined(CONFIG_NAND) || !defined(CONFIG_NAND_SECBOOT)
+#if !defined(CONFIG_MTD_RAW_NAND) || !defined(CONFIG_NAND_SECBOOT)
/* eSPI - Enhanced SPI */
#endif
#if defined(CONFIG_SDCARD)
#define CONFIG_FSL_FIXED_MMC_LOCATION
#define CONFIG_SYS_MMC_ENV_DEV 0
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
#define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
#else
#define CONFIG_SYS_NAND_MAX_ECCPOS 56
#define CONFIG_SYS_NAND_MAX_OOBFREE 5
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_NAND_INIT
(BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V)
#define CONFIG_FLASH_OR_PRELIM (OR_AM_128MB | 0xff7)
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
#define CONFIG_SYS_OR1_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
#else
| OR_FCM_SCY_1 \
| OR_FCM_TRLX \
| OR_FCM_EHTR)
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
#else
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#if defined(CONFIG_SDCARD)
#define CONFIG_FSL_FIXED_MMC_LOCATION
#define CONFIG_SYS_MMC_ENV_DEV 0
-#elif defined(CONFIG_NAND)
-#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE)
+#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
#define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
#endif
| OR_FCM_TRLX \
| OR_FCM_EHTR)
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */
* 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
*/
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
/*
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
*/
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
#define CONFIG_SYS_QE_FW_ADDR (512 * 0x920)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE)
#define CONFIG_SYS_QE_FW_ADDR (12 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000
#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
*/
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
#define CONFIG_SYS_QE_FW_ADDR (512 * 0x920)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
#define CONFIG_SYS_QE_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE)
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
* 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
*/
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE)
#else
#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
#define RESET_VECTOR_OFFSET 0x27FFC
#define BOOT_PAGE_OFFSET 0x27000
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#ifdef CONFIG_NXP_ESBC
#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
/*
#if defined(CONFIG_SPIFLASH)
#elif defined(CONFIG_SDCARD)
#define CONFIG_SYS_MMC_ENV_DEV 0
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_NXP_ESBC
#define CONFIG_RAMBOOT_NAND
#define CONFIG_BOOTSCRIPT_COPY_RAM
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A008044
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_A008044_WORKAROUND
#endif
#endif
* 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
*/
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FMAN_FW_ADDR (5 * CONFIG_SYS_NAND_BLOCK_SIZE)
#else
#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
#define CONFIG_SYS_QE_FW_ADDR 0x130000
#elif defined(CONFIG_SDCARD)
#define CONFIG_SYS_QE_FW_ADDR (512 * 0x920)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_QE_FW_ADDR (7 * CONFIG_SYS_NAND_BLOCK_SIZE)
#else
#define CONFIG_SYS_QE_FW_ADDR 0xEFF10000
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
* 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
*/
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
/*
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
#define CONFIG_CORTINA_FW_ADDR (512 * 0x8a0)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
#define CONFIG_CORTINA_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t4qds/t4_pbi.cfg
-#if !defined(CONFIG_NAND) && !defined(CONFIG_SDCARD)
+#if !defined(CONFIG_MTD_RAW_NAND) && !defined(CONFIG_SDCARD)
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#else
#define RESET_VECTOR_OFFSET 0x27FFC
#define BOOT_PAGE_OFFSET 0x27000
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
#define CONFIG_SYS_NAND_MAX_OOBFREE 2
#define CONFIG_SYS_NAND_MAX_ECCPOS 256
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
* 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
*/
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
/*
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
* 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
*/
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE)
#else
#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define NANDARGS \
"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
/* USB gadget RNDIS */
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
/* NAND: device related configs */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
#endif
-#endif /* !CONFIG_NAND */
+#endif /* !CONFIG_MTD_RAW_NAND */
/*
* For NOR boot, we must set this to the start of where NOR is mapped
/* Bootcount using the RTC block */
#define CONFIG_SYS_BOOTCOUNT_LE
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
#endif /* ! __CONFIG_AM335X_GUARDIAN_H */
#define CONFIG_NET_RETRY_COUNT 10
/* Board NAND Info. */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
* DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000
* RootFS Remaining Flash Space @ 0xB20000
*/
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
/* Environment information */
#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FLASH_BASE NAND_BASE
#endif
#define CONFIG_SYS_RX_ETH_BUFFER 64
/* NAND support */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
/* NAND: device related configs */
#define CONFIG_SYS_NAND_PAGE_SIZE 4096
#define CONFIG_SYS_NAND_OOBSIZE 224
"nand read ${loadaddr} NAND.kernel; " \
"bootz ${loadaddr} - ${fdtaddr}\0"
#define NANDBOOT "run nandboot; "
-#else /* !CONFIG_NAND */
+#else /* !CONFIG_MTD_RAW_NAND */
#define NANDARGS
#define NANDBOOT
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
#if defined(CONFIG_TI_SECURE_DEVICE)
/* Avoid relocating onto firewalled area at end of DRAM */
/* FIT support */
#define CONFIG_SYS_BOOTM_LEN SZ_64M
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define NANDARGS \
"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
/* SPL */
#ifndef CONFIG_NOR_BOOT
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_AM335X_USB1_MODE MUSB_OTG
/* NAND support */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define GPMC_NAND_ECC_LP_x8_LAYOUT 1
#endif
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define NANDARGS \
"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
/* USB gadget RNDIS */
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
/* NAND: device related configs */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
#endif
-#endif /* !CONFIG_NAND */
+#endif /* !CONFIG_MTD_RAW_NAND */
/*
* For NOR boot, we must set this to the start of where NOR is mapped
"spl-os-image fat 0 1;" \
"u-boot.img fat 0 1;" \
"uEnv.txt fat 0 1\0"
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define DFU_ALT_INFO_NAND \
"dfu_alt_info_nand=" \
"SPL part 0 1;" \
#define CONFIG_SKIP_LOWLEVEL_INIT
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_SYS_NAND_ONFI_DETECTION
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
/*
* bcm963158
#include <configs/bmips_common.h>
#include <configs/bmips_bcm6838.h>
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_SYS_NAND_ONFI_DETECTION
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
#define CONFIG_SKIP_LOWLEVEL_INIT
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_SYS_NAND_ONFI_DETECTION
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
/*
* 968580xref
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
/* NAND */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x140000
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
#endif /* CONFIG_SPL_OS_BOOT */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define NANDTGTS \
"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
"b_tgts_pme=usb0 nand net\0"
#else
#define NANDTGTS ""
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
#define MMCSPI_TGTS \
"t30args#0=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \
" if test ${b_break} = 1; then; exit; fi; done\0"
#endif /* !CONFIG_SPL_BUILD*/
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
/*
* GPMC block. We support 1 device and the physical address to
* access CS0 at is 0x8000000.
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_NAND_OMAP_GPMC_WSCFG 1
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
#if defined(CONFIG_SPI)
/* SPI Flash */
#define CONFIG_REMAKE_ELF
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_SYS_NAND_ONFI_DETECTION
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
#ifdef CONFIG_NXP_ESBC
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_RAMBOOT_NAND
#endif
#define CONFIG_BOOTSCRIPT_COPY_RAM
| OR_FCM_TRLX \
| OR_FCM_EHTR)
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */
* 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
*/
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680)
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
/*
/*
* Flash & Environment
*/
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_NAND_CS 3
#define CONFIG_CLOCKS
#endif
-#if !defined(CONFIG_NAND) && \
+#if !defined(CONFIG_MTD_RAW_NAND) && \
!defined(CONFIG_USE_NOR) && \
!defined(CONFIG_USE_SPIFLASH)
#endif
#define CONFIG_SCSI_AHCI_PLAT
/* NAND support */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
/* NAND: device related configs */
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
#endif
-#endif /* !CONFIG_NAND */
+#endif /* !CONFIG_MTD_RAW_NAND */
/* Parallel NOR Support */
#if defined(CONFIG_NOR)
FTIM2_GPCM_TWP(0x3E))
#define CONFIG_SYS_CS3_FTIM3 0x0
-#if defined(CONFIG_SPL) && defined(CONFIG_NAND)
+#if defined(CONFIG_SPL) && defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR0_CSPR_EXT
#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR0_CSPR_EARLY
#define CONFIG_SYS_CSPR2_FINAL CONFIG_SYS_NOR0_CSPR
#define CONFIG_REVISION_TAG
/* NAND */
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FLASH_BASE NAND_BASE
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#if defined(CONFIG_SPL_OS_BOOT)
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000
#endif /* CONFIG_SPL_OS_BOOT */
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
/* USB EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \
#devtypel #instance " "
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
"bootcmd_" #devtypel #instance "=" \
func(UBIFS, ubifs, 0) \
func(NAND, nand, 0)
-#else /* !CONFIG_NAND */
+#else /* !CONFIG_MTD_RAW_NAND */
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(LEGACY_MMC, legacy_mmc, 0)
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
#include <config_distro_bootcmd.h>
#define CONFIG_REVISION_TAG
/* NAND */
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FLASH_BASE NAND_BASE
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#if defined(CONFIG_SPL_OS_BOOT)
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000
#endif /* CONFIG_SPL_OS_BOOT */
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
#define MEM_LAYOUT_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV
#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \
#devtypel #instance " "
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
"bootcmd_" #devtypel #instance "=" \
func(UBIFS, ubifs, 0) \
func(NAND, nand, 0)
-#else /* !CONFIG_NAND */
+#else /* !CONFIG_MTD_RAW_NAND */
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(LEGACY_MMC, legacy_mmc, 0)
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
#include <config_distro_bootcmd.h>
#endif
/* Board NAND Info. */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
/* NAND devices */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
/* commands to include */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
/* NAND block size is 128 KiB. Synchronize these values with
* overo_nand_partitions in mach-omap2/board-overo.c in Linux:
* xloader 4 * NAND_BLOCK_SIZE = 512 KiB
* linux 64 * NAND_BLOCK_SIZE = 8 MiB
* rootfs remainder
*/
-#endif /* CONFIG_NAND */
+#endif /* CONFIG_MTD_RAW_NAND */
/* Board NAND Info. */
/* Environment information */
0x01F00000) /* 31MB */
/* FLASH and environment organization */
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FLASH_BASE NAND_BASE
#endif
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
0x01F00000) /* 31MB */
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FLASH_BASE NAND_BASE
#endif
/*
* Flash & Environment
*/
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_NAND_CS 3
#endif
#endif
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_NAND_INIT
OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
OR_GPCM_EAD)
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
#define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
#else
#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
#endif
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#if defined(CONFIG_SDCARD)
#define CONFIG_FSL_FIXED_MMC_LOCATION
#define CONFIG_SYS_MMC_ENV_DEV 0
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE)
#ifdef CONFIG_TPL_BUILD
#define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define NANDARGS \
"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
#define CONFIG_POWER_TPS65910
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
/* NAND: device related configs */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
#endif
-#endif /* !CONFIG_NAND */
+#endif /* !CONFIG_MTD_RAW_NAND */
/* CPU */
#define CONFIG_NET_RETRY_COUNT 10
/* NAND support */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
/* UBI Support */
/* Commen environment */
/* General parts of the framework, required. */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
* GPMC NAND block. We support 1 device and the physical address to
* access CS0 at is 0x8000000.
*/
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#ifndef CONFIG_SYS_NAND_BASE
#define CONFIG_SYS_NAND_BASE 0x8000000
#endif
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(64 << 20))
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_BASE 0x30000000
#endif
"u-boot.img fat 1 1;" \
"uEnv.txt fat 1 1\0"
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define DFU_ALT_INFO_NAND \
"dfu_alt_info_nand=" \
"SPL part 0 1;" \
* Environment variable definitions for NAND on TI boards.
*/
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
#define NANDARGS \
"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \