u-boot/include/configs/ap143.h

   1 /*
   2  * Copyright (C) 2016 Piotr Dymacz <piotr@dymacz.pl>
   3  *
   4  * This file contains the configuration parameters
   5  * for Qualcomm Atheros QCA953x based devices
   6  *
   7  * Reference designs: AP143
   8  *
   9  * SPDX-License-Identifier: GPL-2.0
  10  */
  11
  12 #ifndef _AP143_H
  13 #define _AP143_H
  14
  15 #include <config.h>
  16 #include <configs/qca9k_common.h>
  17 #include <soc/soc_common.h>
  18
  19 /*
  20  * ==================
  21  * GPIO configuration
  22  * ==================
  23  */
  24 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
  25
  26         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO12 | GPIO14 |\
  27                                                 GPIO15 | GPIO16
  28         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  29         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO3
  30         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L GPIO0 | GPIO1
  31
  32 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)
  33
  34         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO4  | GPIO11 | GPIO14 |\
  35                                                 GPIO15 | GPIO16
  36         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO2 | GPIO3
  37
  38 #elif defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
  39
  40         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO2 | GPIO3
  41         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO12 | GPIO14 |\
  42                                                 GPIO16
  43
  44 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
  45       defined(CONFIG_FOR_COMFAST_CF_E530N)
  46
  47         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11
  48
  49 #elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV)
  50
  51         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO13
  52
  53 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE)
  54
  55         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13 | GPIO14
  56         #define CONFIG_QCA_GPIO_MASK_IN         GPIO0 | GPIO1 | GPIO16 | GPIO17
  57         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L GPIO12
  58
  59 #elif defined(CONFIG_FOR_GLINET_GL_AR750)
  60
  61         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13 | GPIO14
  62         #define CONFIG_QCA_GPIO_MASK_IN         GPIO0 | GPIO16 | GPIO17
  63         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO2
  64         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L GPIO12
  65
  66 #elif defined(CONFIG_FOR_P2W_CPE505N)
  67
  68         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
  69                                                 GPIO14 | GPIO15
  70
  71 #elif defined(CONFIG_FOR_P2W_R602N)
  72
  73         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
  74                                                 GPIO14 | GPIO15 | GPIO16
  75
  76 #elif defined(CONFIG_FOR_TPLINK_MR22U_V1)
  77
  78         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
  79         #define CONFIG_QCA_GPIO_MASK_IN         GPIO14 | GPIO16
  80         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO11
  81
  82 #elif defined(CONFIG_FOR_TPLINK_MR3420_V3)
  83
  84         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO1  | GPIO3  | GPIO4  |\
  85                                                 GPIO11 | GPIO13 | GPIO14 |\
  86                                                 GPIO15 | GPIO16
  87         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  88
  89 #elif defined(CONFIG_FOR_TPLINK_MR6400_V1V2)
  90
  91         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0  | GPIO1 | GPIO3 |\
  92                                                 GPIO11 | GPIO16
  93         #define CONFIG_QCA_GPIO_MASK_IN         GPIO14
  94         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO4 | GPIO13
  95
  96 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2)
  97
  98         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0  | GPIO1 | GPIO2  |\
  99                                                 GPIO3  | GPIO4 | GPIO12 |\
 100                                                 GPIO13 | GPIO14
 101         #define CONFIG_QCA_GPIO_MASK_IN         GPIO16
 102         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO15
 103
 104 #elif defined(CONFIG_FOR_TPLINK_WR802N_V1) ||\
 105       defined(CONFIG_FOR_TPLINK_WR820N_V1_CN)
 106
 107         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
 108
 109 #elif defined(CONFIG_FOR_TPLINK_WR810N_V1) ||\
 110       defined(CONFIG_FOR_TPLINK_WR810N_V2)
 111
 112         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
 113         #define CONFIG_QCA_GPIO_MASK_IN         GPIO0 | GPIO1
 114
 115         #if defined(CONFIG_FOR_TPLINK_WR810N_V1)
 116                 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO11
 117         #endif
 118
 119 #elif defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 120       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 121
 122         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO3  | GPIO4  | GPIO11 |\
 123                                                 GPIO13 | GPIO14 | GPIO15 |\
 124                                                 GPIO16
 125         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 126
 127 #elif defined(CONFIG_FOR_TPLINK_WR841N_V11)
 128
 129         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO1  | GPIO2  | GPIO3  |\
 130                                                 GPIO4  | GPIO11 | GPIO13 |\
 131                                                 GPIO14 | GPIO15 | GPIO16
 132         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 133
 134 #elif defined(CONFIG_FOR_TPLINK_WR842N_V3)
 135
 136         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO2  | GPIO3  | GPIO4  |\
 137                                                 GPIO11 | GPIO12 | GPIO13 |\
 138                                                 GPIO14 | GPIO15 | GPIO16 |\
 139                                                 GPIO17
 140         #define CONFIG_QCA_GPIO_MASK_IN         GPIO0
 141
 142 #elif defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 143
 144         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO4 | GPIO15
 145         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO11 | GPIO12
 146         #define CONFIG_QCA_GPIO_MASK_IN         GPIO2 | GPIO14 | GPIO17
 147         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO1 | GPIO13
 148
 149 #elif defined(CONFIG_FOR_WALLYS_DR531)
 150
 151         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11 | GPIO12 | GPIO13 |\
 152                                                 GPIO14 | GPIO15 | GPIO16
 153
 154 #elif defined(CONFIG_FOR_WHQX_E600G_V2)
 155
 156         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4 | GPIO13 | GPIO15 | GPIO16
 157
 158 #elif defined(CONFIG_FOR_WHQX_E600GAC_V2)
 159
 160         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
 161                                                 GPIO13 | GPIO14 | GPIO15 |\
 162                                                 GPIO16
 163         #define CONFIG_QCA_GPIO_MASK_IN         GPIO1
 164
 165 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)
 166
 167         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4 | GPIO12 | GPIO16
 168
 169 #elif defined(CONFIG_FOR_YUNCORE_CPE830)
 170
 171         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO1 | GPIO2  |\
 172                                                 GPIO3 | GPIO4 | GPIO12 |\
 173                                                 GPIO16
 174
 175 #elif defined(CONFIG_FOR_YUNCORE_T830)
 176
 177         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
 178                                                 GPIO13 | GPIO14 | GPIO15 |\
 179                                                 GPIO16
 180
 181 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 182
 183         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
 184                                                 GPIO13 | GPIO14 | GPIO15 |\
 185                                                 GPIO16
 186
 187 #endif
 188
 189 /*
 190  * ================
 191  * Default bootargs
 192  * ================
 193  */
 194 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 195
 196         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 197                                 "rootfstype=jffs2,squashfs init=/sbin/init "\
 198                                 "mtdparts=ath-nor0:448k(u-boot),64k(art),1280k(kernel),14528k(rootfs),64k(config)"
 199
 200 #elif defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
 201       defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
 202
 203         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 204                                 "rootfstype=jffs2 init=/sbin/init "\
 205                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),14656k(rootfs),64k(mib0)"
 206
 207 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
 208       defined(CONFIG_FOR_COMFAST_CF_E530N)
 209
 210         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 211                                 "rootfstype=jffs2 init=/sbin/init "\
 212                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)"
 213
 214 #elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2) ||\
 215       defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV)
 216
 217         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:01 "\
 218                                 "rootfstype=squashfs init=/sbin/init "\
 219                                 "mtdparts=ath-nor0:128k(u-boot),16192k@0x20000(firmware),64k@0xff0000(art)"
 220
 221 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE)
 222
 223         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 224                                 "rootfstype=squashfs init=/sbin/init "\
 225                                 "mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),16000k(firmware),64k(art)ro"
 226
 227 #elif defined(CONFIG_FOR_GLINET_GL_AR750)
 228
 229         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 230                                 "rootfstype=squashfs init=/sbin/init "\
 231                                 "mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),64k(art)ro,16000k(firmware)"
 232
 233 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
 234       defined(CONFIG_FOR_P2W_R602N)      ||\
 235       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 236       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 237       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 238
 239         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 240                                 "rootfstype=squashfs init=/sbin/init "\
 241                                 "mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1472k(kernel),64k(art),16000k(firmware)"
 242
 243 #elif defined(CONFIG_FOR_TPLINK_MR22U_V1)    ||\
 244       defined(CONFIG_FOR_TPLINK_MR6400_V1V2) ||\
 245       defined(CONFIG_FOR_TPLINK_WR810N_V1)   ||\
 246       defined(CONFIG_FOR_TPLINK_WR810N_V2)
 247
 248         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 249                                 "rootfstype=squashfs init=/sbin/init "\
 250                                 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),6912k(rootfs),64k(config),64k(art)"
 251
 252 #elif defined(CONFIG_FOR_TPLINK_MR3420_V3)  ||\
 253       defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
 254       defined(CONFIG_FOR_TPLINK_WR802N_V1)  ||\
 255       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 256       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
 257       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 258
 259         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 260                                 "rootfstype=squashfs init=/sbin/init "\
 261                                 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 262
 263 #elif defined(CONFIG_FOR_TPLINK_WR820N_V1_CN)
 264
 265         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 266                                 "rootfstype=squashfs init=/sbin/init "\
 267                                 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(art)"
 268
 269 #elif defined(CONFIG_FOR_TPLINK_WR842N_V3) ||\
 270       defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 271
 272         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 273                                 "rootfstype=jffs2 init=/sbin/init "\
 274                                 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(ART)"
 275
 276 #elif defined(CONFIG_FOR_WALLYS_DR531)
 277
 278         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 279                                 "rootfstype=jffs2 init=/sbin/init "\
 280                                 "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART)"
 281
 282 #elif defined(CONFIG_FOR_WHQX_E600G_V2)   ||\
 283       defined(CONFIG_FOR_WHQX_E600GAC_V2) ||\
 284       defined(CONFIG_FOR_YUNCORE_T830)
 285
 286         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 287                                 "rootfstype=jffs2 init=/sbin/init "\
 288                                 "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1408k(uImage),64k(mib0),64k(ART)"
 289
 290 #endif
 291
 292 /*
 293  * =============================
 294  * Load address and boot command
 295  * =============================
 296  */
 297 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 298
 299         #define CFG_LOAD_ADDR   0x9F080000
 300
 301 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)           ||\
 302       defined(CONFIG_FOR_COMFAST_CF_E320N_V2)        ||\
 303       defined(CONFIG_FOR_COMFAST_CF_E520N)           ||\
 304       defined(CONFIG_FOR_COMFAST_CF_E530N)           ||\
 305       defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2)     ||\
 306       defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV) ||\
 307       defined(CONFIG_FOR_TPLINK_MR22U_V1)            ||\
 308       defined(CONFIG_FOR_TPLINK_MR3420_V3)           ||\
 309       defined(CONFIG_FOR_TPLINK_MR6400_V1V2)         ||\
 310       defined(CONFIG_FOR_TPLINK_WA850RE_V2)          ||\
 311       defined(CONFIG_FOR_TPLINK_WR802N_V1)           ||\
 312       defined(CONFIG_FOR_TPLINK_WR810N_V1)           ||\
 313       defined(CONFIG_FOR_TPLINK_WR810N_V2)           ||\
 314       defined(CONFIG_FOR_TPLINK_WR820N_V1_CN)        ||\
 315       defined(CONFIG_FOR_TPLINK_WR841N_V10)          ||\
 316       defined(CONFIG_FOR_TPLINK_WR841N_V11)          ||\
 317       defined(CONFIG_FOR_TPLINK_WR841N_V9)           ||\
 318       defined(CONFIG_FOR_TPLINK_WR842N_V3)           ||\
 319       defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 320
 321         #define CFG_LOAD_ADDR   0x9F020000
 322
 323 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE) ||\
 324       defined(CONFIG_FOR_P2W_CPE505N)           ||\
 325       defined(CONFIG_FOR_P2W_R602N)             ||\
 326       defined(CONFIG_FOR_WALLYS_DR531)          ||\
 327       defined(CONFIG_FOR_YUNCORE_AP90Q)         ||\
 328       defined(CONFIG_FOR_YUNCORE_CPE830)        ||\
 329       defined(CONFIG_FOR_YUNCORE_T830)          ||\
 330       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 331
 332         #define CFG_LOAD_ADDR   0x9F050000
 333
 334 #elif defined(CONFIG_FOR_GLINET_GL_AR750) ||\
 335       defined(CONFIG_FOR_WHQX_E600G_V2)   ||\
 336       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 337
 338         #define CFG_LOAD_ADDR   0x9F070000
 339
 340 #endif
 341
 342 #if defined(CONFIG_FOR_P2W_CPE505N)    ||\
 343     defined(CONFIG_FOR_P2W_R602N)      ||\
 344     defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 345     defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 346     defined(CONFIG_FOR_YUNCORE_T830)   ||\
 347     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 348
 349         #define CONFIG_BOOTCOMMAND      "bootm 0x9F050000 || bootm 0x9FE80000"
 350
 351 #else
 352
 353         #define CONFIG_BOOTCOMMAND      "bootm " MK_STR(CFG_LOAD_ADDR)
 354
 355 #endif
 356
 357 /*
 358  * =========================
 359  * Environment configuration
 360  * =========================
 361  */
 362 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 363
 364         #define CFG_ENV_ADDR            0x9F060000
 365         #define CFG_ENV_SIZE            0x10000
 366
 367 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 368       defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 369       defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 370       defined(CONFIG_FOR_COMFAST_CF_E530N)
 371
 372         #define CFG_ENV_ADDR            0x9F018000
 373         #define CFG_ENV_SIZE            0x7C00
 374         #define CFG_ENV_SECT_SIZE       0x10000
 375
 376 #elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2)     ||\
 377       defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV) ||\
 378       defined(CONFIG_FOR_TPLINK_MR22U_V1)            ||\
 379       defined(CONFIG_FOR_TPLINK_MR3420_V3)           ||\
 380       defined(CONFIG_FOR_TPLINK_MR6400_V1V2)         ||\
 381       defined(CONFIG_FOR_TPLINK_WA850RE_V2)          ||\
 382       defined(CONFIG_FOR_TPLINK_WR802N_V1)           ||\
 383       defined(CONFIG_FOR_TPLINK_WR810N_V1)           ||\
 384       defined(CONFIG_FOR_TPLINK_WR810N_V2)           ||\
 385       defined(CONFIG_FOR_TPLINK_WR820N_V1_CN)        ||\
 386       defined(CONFIG_FOR_TPLINK_WR841N_V10)          ||\
 387       defined(CONFIG_FOR_TPLINK_WR841N_V11)          ||\
 388       defined(CONFIG_FOR_TPLINK_WR841N_V9)           ||\
 389       defined(CONFIG_FOR_TPLINK_WR842N_V3)           ||\
 390       defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 391
 392         #define CFG_ENV_ADDR            0x9F01EC00
 393         #define CFG_ENV_SIZE            0x1000
 394         #define CFG_ENV_SECT_SIZE       0x10000
 395
 396 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE) ||\
 397       defined(CONFIG_FOR_GLINET_GL_AR750)       ||\
 398       defined(CONFIG_FOR_WHQX_E600G_V2)         ||\
 399       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 400
 401         #define CFG_ENV_ADDR            0x9F040000
 402         #define CFG_ENV_SIZE            0x10000
 403         #define CFG_ENV_SECT_SIZE       0x10000
 404
 405 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
 406       defined(CONFIG_FOR_P2W_R602N)      ||\
 407       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 408       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 409       defined(CONFIG_FOR_YUNCORE_T830)   ||\
 410       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 411
 412         #define CFG_ENV_ADDR            0x9F040000
 413         #define CFG_ENV_SIZE            0xFC00
 414         #define CFG_ENV_SECT_SIZE       0x10000
 415
 416 #elif defined(CONFIG_FOR_WALLYS_DR531)
 417
 418         #define CFG_ENV_ADDR            0x9F030000
 419         #define CFG_ENV_SIZE            0xF800
 420         #define CFG_ENV_SECT_SIZE       0x10000
 421
 422 #endif
 423
 424 /*
 425  * ===========================
 426  * List of available baudrates
 427  * ===========================
 428  */
 429 #define CFG_BAUDRATE_TABLE      \
 430                 { 600,    1200,   2400,    4800,    9600,    14400, \
 431                   19200,  28800,  38400,   56000,   57600,   115200 }
 432
 433 /*
 434  * ==================================================
 435  * MAC address/es, model and WPS pin offsets in FLASH
 436  * ==================================================
 437  */
 438 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 439
 440         #define OFFSET_MAC_DATA_BLOCK           0x70000
 441         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 442         #define OFFSET_MAC_ADDRESS              0x00000
 443
 444 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 445       defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 446       defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 447       defined(CONFIG_FOR_COMFAST_CF_E530N)
 448
 449         #define OFFSET_MAC_DATA_BLOCK           0x10000
 450         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 451         #define OFFSET_MAC_ADDRESS              0x00000
 452
 453 #elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2)     ||\
 454       defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV) ||\
 455       defined(CONFIG_FOR_GLINET_GL_AR300M_LITE)      ||\
 456       defined(CONFIG_FOR_P2W_CPE505N)                ||\
 457       defined(CONFIG_FOR_P2W_R602N)                  ||\
 458       defined(CONFIG_FOR_YUNCORE_AP90Q)              ||\
 459       defined(CONFIG_FOR_YUNCORE_CPE830)             ||\
 460       defined(CONFIG_FOR_YUNCORE_T830)               ||\
 461       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 462
 463         #define OFFSET_MAC_DATA_BLOCK           0xFF0000
 464         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 465         #define OFFSET_MAC_ADDRESS              0x000000
 466
 467 #elif defined(CONFIG_FOR_GLINET_GL_AR750)
 468
 469         #define OFFSET_MAC_DATA_BLOCK           0x50000
 470         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 471         #define OFFSET_MAC_ADDRESS              0x00000
 472
 473 #elif defined(CONFIG_FOR_TPLINK_MR22U_V1)     ||\
 474       defined(CONFIG_FOR_TPLINK_MR3420_V3)    ||\
 475       defined(CONFIG_FOR_TPLINK_MR6400_V1V2)  ||\
 476       defined(CONFIG_FOR_TPLINK_WR802N_V1)    ||\
 477       defined(CONFIG_FOR_TPLINK_WR810N_V1)    ||\
 478       defined(CONFIG_FOR_TPLINK_WR810N_V2)    ||\
 479       defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
 480       defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 481       defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 482       defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
 483       defined(CONFIG_FOR_TPLINK_WR842N_V3)
 484
 485         #define OFFSET_MAC_DATA_BLOCK           0x010000
 486         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 487         #define OFFSET_MAC_ADDRESS              0x00FC00
 488         #define OFFSET_ROUTER_MODEL             0x00FD00
 489         #define OFFSET_PIN_NUMBER               0x00FE00
 490
 491 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2)
 492
 493         #define OFFSET_MAC_DATA_BLOCK           0x3c0000
 494         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 495         #define OFFSET_MAC_ADDRESS              0x000008
 496
 497 #elif defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 498
 499         #define OFFSET_MAC_DATA_BLOCK           0x750000
 500         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 501         #define OFFSET_MAC_ADDRESS              0x000008
 502
 503 #elif defined(CONFIG_FOR_WALLYS_DR531)
 504
 505         #define OFFSET_MAC_DATA_BLOCK           0x030000
 506         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 507         #define OFFSET_MAC_ADDRESS              0x00F810
 508
 509 #elif defined(CONFIG_FOR_WHQX_E600G_V2) ||\
 510       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 511
 512         #define OFFSET_MAC_DATA_BLOCK           0x50000
 513         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 514         #define OFFSET_MAC_ADDRESS              0x00400
 515
 516 #endif
 517
 518 /*
 519  * =========================
 520  * Custom changes per device
 521  * =========================
 522  */
 523
 524 /*
 525  * Comfast CF-E520N and E320Nv2 are limited to 64 KB only,
 526  * disable some commands
 527  */
 528 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 529     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 530     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 531     defined(CONFIG_FOR_COMFAST_CF_E530N)
 532
 533         #undef CONFIG_CMD_DHCP
 534         #undef CONFIG_CMD_LOADB
 535         #undef CONFIG_CMD_SNTP
 536         #undef CONFIG_UPG_SCRIPTS_UBOOT
 537
 538 #endif
 539
 540 /*
 541  * ===========================
 542  * HTTP recovery configuration
 543  * ===========================
 544  */
 545 #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_LOAD_ADDR
 546
 547 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 548
 549         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x70000)
 550
 551 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 552       defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 553       defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 554       defined(CONFIG_FOR_COMFAST_CF_E530N)
 555
 556         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x10000)
 557
 558 #elif defined(CONFIG_FOR_GLINET_GL_AR750)
 559
 560         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x50000)
 561
 562 #elif defined(CONFIG_FOR_WHQX_E600G_V2) ||\
 563       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 564
 565         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x60000)
 566
 567 #endif
 568
 569 /* Firmware size limit */
 570 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 571
 572         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (512 * 1024)
 573
 574 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)           ||\
 575       defined(CONFIG_FOR_COMFAST_CF_E320N_V2)        ||\
 576       defined(CONFIG_FOR_COMFAST_CF_E520N)           ||\
 577       defined(CONFIG_FOR_COMFAST_CF_E530N)           ||\
 578       defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2)     ||\
 579       defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV) ||\
 580       defined(CONFIG_FOR_TPLINK_MR22U_V1)            ||\
 581       defined(CONFIG_FOR_TPLINK_MR3420_V3)           ||\
 582       defined(CONFIG_FOR_TPLINK_MR6400_V1V2)         ||\
 583       defined(CONFIG_FOR_TPLINK_WR802N_V1)           ||\
 584       defined(CONFIG_FOR_TPLINK_WR810N_V1)           ||\
 585       defined(CONFIG_FOR_TPLINK_WR810N_V2)           ||\
 586       defined(CONFIG_FOR_TPLINK_WR820N_V1_CN)        ||\
 587       defined(CONFIG_FOR_TPLINK_WR841N_V10)          ||\
 588       defined(CONFIG_FOR_TPLINK_WR841N_V11)          ||\
 589       defined(CONFIG_FOR_TPLINK_WR841N_V9)           ||\
 590       defined(CONFIG_FOR_TPLINK_WR842N_V3)
 591
 592         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 593
 594 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE) ||\
 595       defined(CONFIG_FOR_GLINET_GL_AR750)       ||\
 596       defined(CONFIG_FOR_P2W_CPE505N)           ||\
 597       defined(CONFIG_FOR_P2W_R602N)             ||\
 598       defined(CONFIG_FOR_WALLYS_DR531)          ||\
 599       defined(CONFIG_FOR_YUNCORE_AP90Q)         ||\
 600       defined(CONFIG_FOR_YUNCORE_CPE830)        ||\
 601       defined(CONFIG_FOR_YUNCORE_T830)          ||\
 602       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 603
 604         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (384 * 1024)
 605
 606 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
 607       defined(CONFIG_FOR_WHQX_E600G_V2)     ||\
 608       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 609
 610         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (448 * 1024)
 611
 612 #elif defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 613
 614         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (832 * 1024)
 615
 616 #endif
 617
 618 /*
 619  * ========================
 620  * PLL/Clocks configuration
 621  * ========================
 622  */
 623 #if defined(CONFIG_FOR_TPLINK_MR22U_V1)     ||\
 624     defined(CONFIG_FOR_TPLINK_WA850RE_V2)   ||\
 625     defined(CONFIG_FOR_TPLINK_WR802N_V1)    ||\
 626     defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
 627     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 628
 629         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_550_400_200
 630
 631 #else
 632
 633         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_650_400_200
 634
 635 #endif
 636
 637
 638 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 639
 640         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x70000
 641         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 642
 643 #elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2)     ||\
 644       defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV) ||\
 645       defined(CONFIG_FOR_COMFAST_CF_E314N)           ||\
 646       defined(CONFIG_FOR_COMFAST_CF_E320N_V2)        ||\
 647       defined(CONFIG_FOR_COMFAST_CF_E520N)           ||\
 648       defined(CONFIG_FOR_COMFAST_CF_E530N)           ||\
 649       defined(CONFIG_FOR_TPLINK_MR22U_V1)            ||\
 650       defined(CONFIG_FOR_TPLINK_MR3420_V3)           ||\
 651       defined(CONFIG_FOR_TPLINK_MR6400_V1V2)         ||\
 652       defined(CONFIG_FOR_TPLINK_WA850RE_V2)          ||\
 653       defined(CONFIG_FOR_TPLINK_WR802N_V1)           ||\
 654       defined(CONFIG_FOR_TPLINK_WR810N_V1)           ||\
 655       defined(CONFIG_FOR_TPLINK_WR810N_V2)           ||\
 656       defined(CONFIG_FOR_TPLINK_WR820N_V1_CN)        ||\
 657       defined(CONFIG_FOR_TPLINK_WR841N_V10)          ||\
 658       defined(CONFIG_FOR_TPLINK_WR841N_V11)          ||\
 659       defined(CONFIG_FOR_TPLINK_WR841N_V9)           ||\
 660       defined(CONFIG_FOR_TPLINK_WR842N_V3)           ||\
 661       defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 662
 663         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000
 664         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 665
 666 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE)
 667
 668         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0xFF0000
 669         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x010000
 670
 671 #elif defined(CONFIG_FOR_GLINET_GL_AR750) ||\
 672       defined(CONFIG_FOR_WHQX_E600G_V2)   ||\
 673       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 674
 675         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x50000
 676         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 677
 678 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
 679       defined(CONFIG_FOR_P2W_R602N)      ||\
 680       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 681       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 682       defined(CONFIG_FOR_YUNCORE_T830)   ||\
 683       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 684
 685         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x40000
 686         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 687
 688 #elif defined(CONFIG_FOR_WALLYS_DR531)
 689
 690         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x30000
 691         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 692
 693 #endif
 694
 695 /*
 696  * ==================================
 697  * For upgrade scripts in environment
 698  * ==================================
 699  */
 700 #if !defined(CONFIG_FOR_ALFA_NETWORK_R36A)     &&\
 701     !defined(CONFIG_FOR_COMFAST_CF_E314N)      &&\
 702     !defined(CONFIG_FOR_COMFAST_CF_E320N_V2)   &&\
 703     !defined(CONFIG_FOR_COMFAST_CF_E520N)      &&\
 704     !defined(CONFIG_FOR_COMFAST_CF_E530N)      &&\
 705     !defined(CONFIG_FOR_GLINET_GL_AR300M_LITE) &&\
 706     !defined(CONFIG_FOR_GLINET_GL_AR750)       &&\
 707     !defined(CONFIG_FOR_P2W_CPE505N)           &&\
 708     !defined(CONFIG_FOR_P2W_R602N)             &&\
 709     !defined(CONFIG_FOR_WALLYS_DR531)          &&\
 710     !defined(CONFIG_FOR_WHQX_E600G_V2)         &&\
 711     !defined(CONFIG_FOR_WHQX_E600GAC_V2)       &&\
 712     !defined(CONFIG_FOR_YUNCORE_AP90Q)         &&\
 713     !defined(CONFIG_FOR_YUNCORE_CPE830)        &&\
 714     !defined(CONFIG_FOR_YUNCORE_T830)          &&\
 715     !defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 716
 717         #define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX        0x20000
 718
 719 #endif
 720
 721 #if defined(CONFIG_FOR_P2W_CPE505N)    ||\
 722     defined(CONFIG_FOR_P2W_R602N)      ||\
 723     defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 724     defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 725     defined(CONFIG_FOR_YUNCORE_T830)   ||\
 726     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 727
 728         #define CONFIG_UPG_SCRIPTS_FW_ADDR_HEX  0x9F050000
 729
 730 #endif
 731
 732 /*
 733  * ===================
 734  * Other configuration
 735  * ===================
 736  */
 737
 738 /* Cache lock for stack */
 739 #define CONFIG_INIT_SRAM_SP_OFFSET      0xbd001800
 740
 741 #endif /* _AP143_H */