@$(MKCONFIG) -a db12x mips mips db12x ar7240 ar7240
gainstrong_oolite_v1_dev: ar933x_common
- @$(call config_init,Gainstrong Oolite v1 (dev board),oolite-v1,16,11,,QCA_AR9331_SOC)
- @$(call define_add,CONFIG_FOR_GS_OOLITE_V1_DEV,1)
+ @$(call config_init,GainStrong Oolite v1-Dev,oolite-v1-dev,16,11,,QCA_AR9331_SOC)
+ @$(call define_add,CONFIG_FOR_GAINSTRONG_OOLITE_V1_DEV,1)
@$(MKCONFIG) -a ap121 mips mips ap121 ar7240 ar7240
+gainstrong_oolite_v5.2: qca953x_common
+ @$(call config_init,GainStrong Oolite v5.2,oolite-v5.2,16,,,QCA_QCA9531_SOC)
+ @$(call define_add,CONFIG_FOR_GAINSTRONG_OOLITE_V5_2,1)
+ @$(call define_add,CFG_ATHRS27_PHY,1)
+ @$(call define_add,CFG_ATH_GMAC_NMACS,2)
+ @$(call define_add,CONFIG_PCI,1)
+ @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
+
+gainstrong_oolite_v5.2_dev: qca953x_common
+ @$(call config_init,GainStrong Oolite v5.2-Dev,oolite-v5.2-dev,16,17,1,QCA_QCA9531_SOC)
+ @$(call define_add,CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV,1)
+ @$(call define_add,CFG_ATHRS27_PHY,1)
+ @$(call define_add,CFG_ATH_GMAC_NMACS,2)
+ @$(call define_add,CONFIG_PCI,1)
+ @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
+
gl-inet_6416: ar933x_common
@$(call config_init,GL.iNet 6416,glinet-6416,8,11,,QCA_AR9331_SOC)
@$(call define_add,CONFIG_FOR_GLINET_6416,1)
#define CONFIG_QCA_GPIO_MASK_LED_ACT_H GPIO0 | GPIO28
#define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO13 | GPIO17
+#elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V1_DEV)
+
+ #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO13 | GPIO15 | GPIO17 |\
+ GPIO27
+
#elif defined(CONFIG_FOR_GLINET_6416)
#define CONFIG_QCA_GPIO_MASK_LED_ACT_H GPIO0 | GPIO13
#define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO13
#define CONFIG_QCA_GPIO_MASK_OUT_INIT_L GPIO7
-#elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
-
- #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO13 | GPIO15 | GPIO17 |\
- GPIO27
-
#elif defined(CONFIG_FOR_HAK5_LAN_TURTLE)
#define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO13
"rootfstype=squashfs init=/sbin/init "\
"mtdparts=ar7240-nor0:192k(u-boot),64k(u-boot-env),16064k(firmware),64k(art)"
+#elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V1_DEV)
+
+ #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
+ "rootfstype=squashfs init=/sbin/init "\
+ "mtdparts=ar7240-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
+
#elif defined(CONFIG_FOR_GLINET_6416) ||\
defined(CONFIG_FOR_HAK5_LAN_TURTLE) ||\
defined(CONFIG_FOR_HAK5_PACKET_SQUIRREL) ||\
"rootfstype=squashfs,jffs2 noinitrd "\
"mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1280k(kernel),14656k(rootfs),64k(nvram),64k(art)ro,15936k@0x50000(firmware)"
-#elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
-
- #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
- "rootfstype=squashfs init=/sbin/init "\
- "mtdparts=ar7240-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
-
#elif defined(CONFIG_FOR_TPLINK_WR710N_V1)
#define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
* #define OFFSET_MAC_ADDRESS2 0x000016
*/
+#elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V1_DEV)
+
+ #define OFFSET_MAC_DATA_BLOCK 0x010000
+ #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
+ #define OFFSET_MAC_ADDRESS 0x00FC00
+
#elif defined(CONFIG_FOR_GLINET_GL_AR150) ||\
defined(CONFIG_FOR_GLINET_GL_USB150) ||\
defined(CONFIG_FOR_UNWIRED_DEVICES_UNWIRED_ONE)
#define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
#define OFFSET_MAC_ADDRESS 0x000000
-#elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
-
- #define OFFSET_MAC_DATA_BLOCK 0x010000
- #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
- #define OFFSET_MAC_ADDRESS 0x00FC00
-
#elif defined(CONFIG_FOR_HAK5_WIFI_PINEAPPLE_NANO)
#define OFFSET_MAC_DATA_BLOCK 0xFF0000
!defined(CONFIG_FOR_CREATCOMM_D3321) &&\
!defined(CONFIG_FOR_DLINK_DIR505_A1) &&\
!defined(CONFIG_FOR_DRAGINO_MS14) &&\
+ !defined(CONFIG_FOR_GAINSTRONG_OOLITE_V1_DEV) &&\
!defined(CONFIG_FOR_GLINET_6416) &&\
!defined(CONFIG_FOR_GLINET_GL_AR150) &&\
!defined(CONFIG_FOR_GLINET_GL_USB150) &&\
- !defined(CONFIG_FOR_GS_OOLITE_V1_DEV) &&\
!defined(CONFIG_FOR_HAK5_LAN_TURTLE) &&\
!defined(CONFIG_FOR_HAK5_PACKET_SQUIRREL) &&\
!defined(CONFIG_FOR_HAK5_WIFI_PINEAPPLE_NANO) &&\
#define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO11
+#elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV)
+
+ #define CONFIG_QCA_GPIO_MASK_LED_ACT_H GPIO13
+
#elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE)
#define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO13 | GPIO14
"rootfstype=jffs2 init=/sbin/init "\
"mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)"
+#elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2) ||\
+ defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV)
+
+ #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:01 "\
+ "rootfstype=squashfs init=/sbin/init "\
+ "mtdparts=ath-nor0:128k(u-boot),16192k@0x20000(firmware),64k@0xff0000(art)"
+
#elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE)
#define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
#define CFG_LOAD_ADDR 0x9F080000
-#elif defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
- defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
- defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
- defined(CONFIG_FOR_COMFAST_CF_E530N) ||\
- defined(CONFIG_FOR_TPLINK_MR22U_V1) ||\
- defined(CONFIG_FOR_TPLINK_MR3420_V3) ||\
- defined(CONFIG_FOR_TPLINK_MR6400_V1V2) ||\
- defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
- defined(CONFIG_FOR_TPLINK_WR802N_V1) ||\
- defined(CONFIG_FOR_TPLINK_WR810N_V1) ||\
- defined(CONFIG_FOR_TPLINK_WR810N_V2) ||\
- defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
- defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
- defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
- defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
- defined(CONFIG_FOR_TPLINK_WR842N_V3) ||\
+#elif defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
+ defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
+ defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
+ defined(CONFIG_FOR_COMFAST_CF_E530N) ||\
+ defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2) ||\
+ defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV) ||\
+ defined(CONFIG_FOR_TPLINK_MR22U_V1) ||\
+ defined(CONFIG_FOR_TPLINK_MR3420_V3) ||\
+ defined(CONFIG_FOR_TPLINK_MR6400_V1V2) ||\
+ defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
+ defined(CONFIG_FOR_TPLINK_WR802N_V1) ||\
+ defined(CONFIG_FOR_TPLINK_WR810N_V1) ||\
+ defined(CONFIG_FOR_TPLINK_WR810N_V2) ||\
+ defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
+ defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
+ defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
+ defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
+ defined(CONFIG_FOR_TPLINK_WR842N_V3) ||\
defined(CONFIG_FOR_TPLINK_WR902AC_V1)
#define CFG_LOAD_ADDR 0x9F020000
#define CFG_ENV_SIZE 0x7C00
#define CFG_ENV_SECT_SIZE 0x10000
+#elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2) ||\
+ defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV) ||\
+ defined(CONFIG_FOR_TPLINK_MR22U_V1) ||\
+ defined(CONFIG_FOR_TPLINK_MR3420_V3) ||\
+ defined(CONFIG_FOR_TPLINK_MR6400_V1V2) ||\
+ defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
+ defined(CONFIG_FOR_TPLINK_WR802N_V1) ||\
+ defined(CONFIG_FOR_TPLINK_WR810N_V1) ||\
+ defined(CONFIG_FOR_TPLINK_WR810N_V2) ||\
+ defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
+ defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
+ defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
+ defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
+ defined(CONFIG_FOR_TPLINK_WR842N_V3) ||\
+ defined(CONFIG_FOR_TPLINK_WR902AC_V1)
+
+ #define CFG_ENV_ADDR 0x9F01EC00
+ #define CFG_ENV_SIZE 0x1000
+ #define CFG_ENV_SECT_SIZE 0x10000
+
#elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE) ||\
defined(CONFIG_FOR_GLINET_GL_AR750) ||\
defined(CONFIG_FOR_WHQX_E600G_V2) ||\
#define CFG_ENV_SIZE 0xFC00
#define CFG_ENV_SECT_SIZE 0x10000
-#elif defined(CONFIG_FOR_TPLINK_MR22U_V1) ||\
- defined(CONFIG_FOR_TPLINK_MR3420_V3) ||\
- defined(CONFIG_FOR_TPLINK_MR6400_V1V2) ||\
- defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
- defined(CONFIG_FOR_TPLINK_WR802N_V1) ||\
- defined(CONFIG_FOR_TPLINK_WR810N_V1) ||\
- defined(CONFIG_FOR_TPLINK_WR810N_V2) ||\
- defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
- defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
- defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
- defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
- defined(CONFIG_FOR_TPLINK_WR842N_V3) ||\
- defined(CONFIG_FOR_TPLINK_WR902AC_V1)
-
- #define CFG_ENV_ADDR 0x9F01EC00
- #define CFG_ENV_SIZE 0x1000
- #define CFG_ENV_SECT_SIZE 0x10000
-
#elif defined(CONFIG_FOR_WALLYS_DR531)
#define CFG_ENV_ADDR 0x9F030000
#define OFFSET_MAC_DATA_BLOCK_LENGTH 0x10000
#define OFFSET_MAC_ADDRESS 0x00000
-#elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE) ||\
- defined(CONFIG_FOR_P2W_CPE505N) ||\
- defined(CONFIG_FOR_P2W_R602N) ||\
- defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
- defined(CONFIG_FOR_YUNCORE_CPE830) ||\
- defined(CONFIG_FOR_YUNCORE_T830) ||\
+#elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2) ||\
+ defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV) ||\
+ defined(CONFIG_FOR_GLINET_GL_AR300M_LITE) ||\
+ defined(CONFIG_FOR_P2W_CPE505N) ||\
+ defined(CONFIG_FOR_P2W_R602N) ||\
+ defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
+ defined(CONFIG_FOR_YUNCORE_CPE830) ||\
+ defined(CONFIG_FOR_YUNCORE_T830) ||\
defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define OFFSET_MAC_DATA_BLOCK 0xFF0000
#define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES (512 * 1024)
-#elif defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
- defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
- defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
- defined(CONFIG_FOR_COMFAST_CF_E530N) ||\
- defined(CONFIG_FOR_TPLINK_MR22U_V1) ||\
- defined(CONFIG_FOR_TPLINK_MR3420_V3) ||\
- defined(CONFIG_FOR_TPLINK_MR6400_V1V2) ||\
- defined(CONFIG_FOR_TPLINK_WR802N_V1) ||\
- defined(CONFIG_FOR_TPLINK_WR810N_V1) ||\
- defined(CONFIG_FOR_TPLINK_WR810N_V2) ||\
- defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
- defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
- defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
- defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
+#elif defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
+ defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
+ defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
+ defined(CONFIG_FOR_COMFAST_CF_E530N) ||\
+ defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2) ||\
+ defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV) ||\
+ defined(CONFIG_FOR_TPLINK_MR22U_V1) ||\
+ defined(CONFIG_FOR_TPLINK_MR3420_V3) ||\
+ defined(CONFIG_FOR_TPLINK_MR6400_V1V2) ||\
+ defined(CONFIG_FOR_TPLINK_WR802N_V1) ||\
+ defined(CONFIG_FOR_TPLINK_WR810N_V1) ||\
+ defined(CONFIG_FOR_TPLINK_WR810N_V2) ||\
+ defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
+ defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
+ defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
+ defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
defined(CONFIG_FOR_TPLINK_WR842N_V3)
#define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES (192 * 1024)
#define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x70000
#define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000
-#elif defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
- defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
- defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
- defined(CONFIG_FOR_COMFAST_CF_E530N) ||\
- defined(CONFIG_FOR_TPLINK_MR22U_V1) ||\
- defined(CONFIG_FOR_TPLINK_MR3420_V3) ||\
- defined(CONFIG_FOR_TPLINK_MR6400_V1V2) ||\
- defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
- defined(CONFIG_FOR_TPLINK_WR802N_V1) ||\
- defined(CONFIG_FOR_TPLINK_WR810N_V1) ||\
- defined(CONFIG_FOR_TPLINK_WR810N_V2) ||\
- defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
- defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
- defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
- defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
- defined(CONFIG_FOR_TPLINK_WR842N_V3) ||\
+#elif defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2) ||\
+ defined(CONFIG_FOR_GAINSTRONG_OOLITE_V5_2_DEV) ||\
+ defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
+ defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
+ defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
+ defined(CONFIG_FOR_COMFAST_CF_E530N) ||\
+ defined(CONFIG_FOR_TPLINK_MR22U_V1) ||\
+ defined(CONFIG_FOR_TPLINK_MR3420_V3) ||\
+ defined(CONFIG_FOR_TPLINK_MR6400_V1V2) ||\
+ defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
+ defined(CONFIG_FOR_TPLINK_WR802N_V1) ||\
+ defined(CONFIG_FOR_TPLINK_WR810N_V1) ||\
+ defined(CONFIG_FOR_TPLINK_WR810N_V2) ||\
+ defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
+ defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
+ defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
+ defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
+ defined(CONFIG_FOR_TPLINK_WR842N_V3) ||\
defined(CONFIG_FOR_TPLINK_WR902AC_V1)
#define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x10000