oweals/u-boot.git
4 years agommc: fsl_esdhc: drop i.MX DDR support code
Yangbo Lu [Mon, 21 Oct 2019 10:09:09 +0000 (18:09 +0800)]
mmc: fsl_esdhc: drop i.MX DDR support code

A previous patch below adding DDR mode support was actually for i.MX
platforms. Now i.MX eSDHC driver is fsl_esdhc_imx.c. For QorIQ eSDHC,
it uses different process for DDR mode, and hasn't been supported.
Let's drop DDR support code for i.MX in fsl_esdhc driver.

0e1bf61 mmc: fsl_esdhc: Add support for DDR mode

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
4 years agommc: fsl_esdhc: remove redundant DM_MMC checking
Yangbo Lu [Mon, 21 Oct 2019 10:09:08 +0000 (18:09 +0800)]
mmc: fsl_esdhc: remove redundant DM_MMC checking

Remove redundant DM_MMC checking which is already in DM_MMC conditional
compile block.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
4 years agommc: fsl_esdhc: make BLK as hard requirement of DM_MMC
Yangbo Lu [Mon, 21 Oct 2019 10:09:07 +0000 (18:09 +0800)]
mmc: fsl_esdhc: make BLK as hard requirement of DM_MMC

U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already
support it, so let's force to use it.

- Drop non-BLK support for DM_MMC introduced by below patch.
  66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled

- Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC).

- Use DM_MMC instead of BLK for conditional compile.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
4 years agoMerge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mips
Tom Rini [Sat, 26 Oct 2019 00:07:24 +0000 (20:07 -0400)]
Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mips

- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC

4 years agoMerge branch '2019-10-24-ti-imports'
Tom Rini [Fri, 25 Oct 2019 21:33:28 +0000 (17:33 -0400)]
Merge branch '2019-10-24-ti-imports'

- Enable DFU on dra7xx boards
- Further Keystone 3 platform improvements

4 years agoarm: dts: k3-am65: Add R5F ranges in interconnect nodes
Suman Anna [Thu, 17 Oct 2019 03:33:08 +0000 (09:03 +0530)]
arm: dts: k3-am65: Add R5F ranges in interconnect nodes

Add the address spaces for the R5F cores in MCU domain to the ranges
property of the cbass_mcu interconnect node so that the addresses
within the R5F nodes can be translated properly by the relevant OF
address API.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoarmv7R: K3: j721e: Add support for triggering ddr init from SPL
Lokesh Vutla [Mon, 7 Oct 2019 13:56:38 +0000 (19:26 +0530)]
armv7R: K3: j721e: Add support for triggering ddr init from SPL

In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support for
triggering DDR initialization from board_init_f().

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoarm: dts: k3-j721e: Add ddr node
Lokesh Vutla [Mon, 7 Oct 2019 13:56:37 +0000 (19:26 +0530)]
arm: dts: k3-j721e: Add ddr node

Use the 3733MTs DDR configuration that is auto generated from
DDR_Regconfig tool.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
4 years agoram: k3-j721e: Add support for J721E DDR controller
Kevin Scholz [Mon, 7 Oct 2019 13:56:36 +0000 (19:26 +0530)]
ram: k3-j721e: Add support for J721E DDR controller

The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper
logic to integrate these blocks in the device. The DDR subsystem is
used to provide an interface to external SDRAM devices which can be
utilized for storing program or data. Introduce support for the
DDR controller and DDR phy within the DDR subsystem.

Signed-off-by: Kevin Scholz <k-scholz@ti.com
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agodt-bindings: memory-controller: Introduce J721E DDRSS bindings
Lokesh Vutla [Mon, 7 Oct 2019 13:56:35 +0000 (19:26 +0530)]
dt-bindings: memory-controller: Introduce J721E DDRSS bindings

Add DT binding documentation for DDR sub system present on J721E device.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoram: k3-am654: Do not rely on default values for certain DDR register
James Doublesin [Mon, 7 Oct 2019 08:34:27 +0000 (14:04 +0530)]
ram: k3-am654: Do not rely on default values for certain DDR register

Added the following registers to the DDR configuration:
- ACIOCR0,
- ACIOCR3,
- V2H_CTL_REG,
- DX8SLxDQSCTL.

Modified enable_dqs_pd and disable_dqs_pd to only touch the associated
bit fields for pullup and pulldown registers (to preserve slew rate and
other bits in that same register). Also update the dts files in the same
patch to maintain git bisectability.

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoram: k3-am654: add support for LPDDR4 and DDR3L DDRs
James Doublesin [Mon, 7 Oct 2019 08:34:26 +0000 (14:04 +0530)]
ram: k3-am654: add support for LPDDR4 and DDR3L DDRs

Added training support for LPDDR4 and DDR3L DDRs.  Also added/changed
some register configuration to support all 3 DDR types

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoarmv7r: dts: am654-base-board: Rename 1600MHz to 1600MTs in dtsi filename
James Doublesin [Mon, 7 Oct 2019 08:34:25 +0000 (14:04 +0530)]
armv7r: dts: am654-base-board: Rename 1600MHz to 1600MTs in dtsi filename

The current configuration of DDR on AM654 base board is for 1600MTs but
the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi.
Since 1600MHz is misleading, rename it to
k3-am654-base-board-ddr4-1600MTs.dtsi

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoarm: K3: Clean and invalidate Linux Image before jumping to Linux
Lokesh Vutla [Mon, 7 Oct 2019 08:22:17 +0000 (13:52 +0530)]
arm: K3: Clean and invalidate Linux Image before jumping to Linux

U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux
by set/way in cleanup_before_linux(). Additionally there is a custom
hook provided to clean and invalidate L3 cache.

Unfortunately on K3 devices(having a coherent architecture), there is no
easy way to quickly clean all the cache lines for L3. The entire address
range needs to be cleaned and invalidated by Virtual Address. This can
be implemented using the L3 custom hook but it take lot of time to clean
the entire address range. In the interest of boot time this might not be
a viable solution.

The best hit is to make sure the loaded Linux image is flushed so that
the entire image is written to DDR from L3. When Linux starts running with
caches disabled the full image is available from DDR.

Reported-by: Andrew F. Davis <afd@ti.com>
Reported-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agocmd: booti: Store OS start and end info in images structure
Lokesh Vutla [Mon, 7 Oct 2019 08:22:16 +0000 (13:52 +0530)]
cmd: booti: Store OS start and end info in images structure

Store the start and end of the OS image that is loaded in images
structure.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoboot: arm: Enable support for custom board_prep_linux
Lokesh Vutla [Mon, 7 Oct 2019 08:22:15 +0000 (13:52 +0530)]
boot: arm: Enable support for custom board_prep_linux

Once the arch specific boot_prepare_linux completes, boards wants to
have a custom preparation for linux. Add support for a custom
board_prep_linux.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoconfigs: dra7xx_evm: Increase the size of SPL_MULTI_DTB_FIT
Faiz Abbas [Wed, 9 Oct 2019 10:35:20 +0000 (12:35 +0200)]
configs: dra7xx_evm: Increase the size of SPL_MULTI_DTB_FIT

Expand SPL_MULTI_DTB_FIT to accommodate usb peripheral nodes being
added to support SPL_DFU bootmode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
4 years agoconfigs: dra7xx_evm: Add Kconfigs for SPL_DFU bootmode
Faiz Abbas [Wed, 9 Oct 2019 10:35:19 +0000 (12:35 +0200)]
configs: dra7xx_evm: Add Kconfigs for SPL_DFU bootmode

Enable configs for supporting SPL_DFU bootmode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
4 years agoARM: dts: dra7: Add usb peripheral nodes in spl
Faiz Abbas [Wed, 9 Oct 2019 10:35:18 +0000 (12:35 +0200)]
ARM: dts: dra7: Add usb peripheral nodes in spl

Add usb peripheral and usb phy nodes in spl to enable SPL_DFU bootmode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
4 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Fri, 25 Oct 2019 17:50:51 +0000 (13:50 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

- DWC3 improvements
- i.MX7 EHCI bugfix

4 years agoMerge tag 'u-boot-atmel-2020.01-b' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Fri, 25 Oct 2019 17:50:33 +0000 (13:50 -0400)]
Merge tag 'u-boot-atmel-2020.01-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

Second set of u-boot-atmel features and fixes for 2020.01 cycle

This feature set includes Eugen's work on a new tiny flexcom driver and
eeprom mac retrieval for the sam9x60-ek board.

4 years agoMerge tag 'xilinx-for-v2020.01-part2' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Fri, 25 Oct 2019 15:23:46 +0000 (11:23 -0400)]
Merge tag 'xilinx-for-v2020.01-part2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2020.01 part 2

common:
- Fix manual relocation for repeatable commands

arm:
- Also clean up generated dtbos

microblaze:
- Add support for Manual relocation in crypto framework
- Tune and align architecture bootm support

zynq:
- DT sync ups
- Some defconfig updates
- Remove empty board_early_init_f()

zynqmp:
- Clean firmware handing via drivers/firmware/
- DT/defconfig name alignments
- DT cleanups with using firmware based clock driver
- Some defconfig updates
- Add IIO ina226 DT description
- Tune zynqmp_psu_init_minimalize.sh script
- Add single nand mini configuration, e-a2197, m-a2197-02/03 and zcu216

versal:
- Clean firmware handing via drivers/firmware/
- Add gpio support
- Enable DT overlay/USB/CLK/FPGA
- DT updates
- Tune mini configuration

spi:
- gqspi - Remove unused headers

4 years agoconfigs: mtmips: remove configs which are selected in Kconfig or useless
Weijie Gao [Wed, 25 Sep 2019 09:45:44 +0000 (17:45 +0800)]
configs: mtmips: remove configs which are selected in Kconfig or useless

Some configs are selected in Kconfig and is no longer needed in the
defconfig files. Some configs (power domain, ram) are never used.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agomips: mtmips: select essential drivers in Kconfig
Weijie Gao [Wed, 25 Sep 2019 09:45:43 +0000 (17:45 +0800)]
mips: mtmips: select essential drivers in Kconfig

Some drivers (clk, pinctrl, reset, ...) are necessary for reset of the
system, they should be always selected.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agomips: mtmips: change baudrate table for all boards
Weijie Gao [Wed, 25 Sep 2019 09:45:42 +0000 (17:45 +0800)]
mips: mtmips: change baudrate table for all boards

This patch changes baudrate table for all boards preparing for using mtk
highspeed uart driver.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agodts: mtmips: add default pinctrl to eth nodes for all boards
Weijie Gao [Wed, 25 Sep 2019 09:45:41 +0000 (17:45 +0800)]
dts: mtmips: add default pinctrl to eth nodes for all boards

This patch adds default eth pinctrl for all boards.

There are two pinctrl nodes used for two scenarios:
ephy_iot_mode    - for IOT boards which have only one port (PHY0)
ephy_router_mode - For routers which have more than one ports

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agodts: mtmips: add default pinctrl for gardena-smart-gateway-mt7688
Weijie Gao [Wed, 25 Sep 2019 09:45:40 +0000 (17:45 +0800)]
dts: mtmips: add default pinctrl for gardena-smart-gateway-mt7688

This adds default pinctrl (dual SPI chip select) for gardena smart gateway

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agodts: mtmips: add mmc related nodes for mt7628an.dtsi
Weijie Gao [Wed, 25 Sep 2019 09:45:39 +0000 (17:45 +0800)]
dts: mtmips: add mmc related nodes for mt7628an.dtsi

This patch adds mmc related nodes for mt7628an.dtsi

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agommc: mtk-sd: add a dts property cd-active-high for builtin-cd mode
Weijie Gao [Wed, 25 Sep 2019 09:45:38 +0000 (17:45 +0800)]
mmc: mtk-sd: add a dts property cd-active-high for builtin-cd mode

This patch adds a dts property cd-active-high for builtin-cd mode to make
it configurable instead of using hardcoded active-low.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agommc: mtk-sd: add support for MediaTek MT7620/MT7628 SoCs
Weijie Gao [Wed, 25 Sep 2019 09:45:37 +0000 (17:45 +0800)]
mmc: mtk-sd: add support for MediaTek MT7620/MT7628 SoCs

This patch adds mmc support for MediaTek MT7620/MT7628 SoCs.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agodts: mtmips: enable eth port0 led and link poll functions for all boards
Weijie Gao [Wed, 25 Sep 2019 09:45:36 +0000 (17:45 +0800)]
dts: mtmips: enable eth port0 led and link poll functions for all boards

This patch adds default p0led status and phy0 link polling for all boards.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agonet: mt7628-eth: add support to isolate LAN/WAN ports
Weijie Gao [Wed, 25 Sep 2019 09:45:35 +0000 (17:45 +0800)]
net: mt7628-eth: add support to isolate LAN/WAN ports

This patch add support for mt7628-eth to isolate LAN/WAN ports mainly to
prevent LAN devices from getting IP address from WAN.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agonet: mt7628-eth: free rx descriptor on receiving failure
Weijie Gao [Wed, 25 Sep 2019 09:45:34 +0000 (17:45 +0800)]
net: mt7628-eth: free rx descriptor on receiving failure

When received a packet with an invalid length recorded in rx descriptor,
we should free this rx descriptor to allow us to continue to receive
following packets.
Without doing so, u-boot will stuck in a dead loop trying to process this
invalid rx descriptor.

This patch adds a call to mt7628_eth_free_pkt() after received an invalid
packet length.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agonet: mt7628-eth: make phy link up detection optional via DT
Weijie Gao [Wed, 25 Sep 2019 09:45:33 +0000 (17:45 +0800)]
net: mt7628-eth: make phy link up detection optional via DT

The mt7628 has an embedded ethernet switch (5 phy ports + 1 cpu port).
Although in IOT mode only port0 is usable, the phy0 is still connected
to the switch, not the ethernet gmac directly.

This patch rewrites it and makes it optional. It can be turned on by adding
mediatek,poll-link-phy = <?> explicitly into the eth node. By default the
driver is switch mode with all 5 phy ports working without link detection.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agonet: mt7628-eth: remove hardcoded gpio settings and regmap-based phy reset
Weijie Gao [Wed, 25 Sep 2019 09:45:32 +0000 (17:45 +0800)]
net: mt7628-eth: remove hardcoded gpio settings and regmap-based phy reset

This patch removes hardcoded gpio settings as they have been replaced by
pinctrl in dts, and also replaces regmap-based phy reset with a more
generic reset controller.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agophy: mt76x8-usb-phy: add slew rate calibration and remove non-mt7628 part
Weijie Gao [Wed, 25 Sep 2019 09:45:31 +0000 (17:45 +0800)]
phy: mt76x8-usb-phy: add slew rate calibration and remove non-mt7628 part

This patch adds slew rate calibration for mt76x8-usb-phy, removes code
which belongs to mt7620, and gets rid of using syscon and regmap by using
clock driver and reset controller.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agodts: mtmips: update reset controller node for mt7628
Weijie Gao [Wed, 25 Sep 2019 09:45:30 +0000 (17:45 +0800)]
dts: mtmips: update reset controller node for mt7628

This patch updates reset controller node for mt7628

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agoreset: add reset controller driver for MediaTek MIPS platform
Weijie Gao [Wed, 25 Sep 2019 09:45:29 +0000 (17:45 +0800)]
reset: add reset controller driver for MediaTek MIPS platform

This patch adds reset controller driver for MediaTek MIPS platform and
header file for mt7628.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agodts: mtmips: add default pinctrl for uart nodes
Weijie Gao [Wed, 25 Sep 2019 09:45:28 +0000 (17:45 +0800)]
dts: mtmips: add default pinctrl for uart nodes

This patch adds default pinctrl for uart nodes

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agodts: mtmips: add pinctrl node for mt7628
Weijie Gao [Wed, 25 Sep 2019 09:45:27 +0000 (17:45 +0800)]
dts: mtmips: add pinctrl node for mt7628

This patch adds pinctrl node with default pin state for mt7628an.dtsi.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agopinctrl: add support for MediaTek MT7628
Weijie Gao [Wed, 25 Sep 2019 09:45:26 +0000 (17:45 +0800)]
pinctrl: add support for MediaTek MT7628

This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agospi: mt7621-spi: restore default register value after each xfer
Weijie Gao [Wed, 25 Sep 2019 09:45:25 +0000 (17:45 +0800)]
spi: mt7621-spi: restore default register value after each xfer

Currently this driver uses a different way to implement the spi xfer,
by modifying some fields of two registers, which is incompatible with the
MTK's original SDK linux driver. This will cause the flash data being
damaged by the SDK driver.

This patch lets the mt7621_spi_set_cs() restore the original register
fields after cs deactivated.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agospi: mt7621-spi: remove data cache and rewrite its xfer function
Weijie Gao [Wed, 25 Sep 2019 09:45:24 +0000 (17:45 +0800)]
spi: mt7621-spi: remove data cache and rewrite its xfer function

The mt7621 spi controller supports continuous generic half-duplex spi
transaction. There is no need to cache xfer data at all.

To achieve this goal, the OPADDR register must be used as the first data
to be sent. And follows the eight generic DIDO registers. But one thing
different between OPADDR and DIDO registers is OPADDR has a reversed byte
order.

With this patch, any amount of data can be read/written in a single xfer
function call.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agospi: mt7621-spi: use clock frequency from clk driver
Weijie Gao [Wed, 25 Sep 2019 09:45:23 +0000 (17:45 +0800)]
spi: mt7621-spi: use clock frequency from clk driver

This patch lets the spi driver to use clock provided by the clk driver
since the new clk-mt7628 driver provides accurate sys clock frequency.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agodts: mtmips: add clock node for mt7628
Weijie Gao [Wed, 25 Sep 2019 09:45:22 +0000 (17:45 +0800)]
dts: mtmips: add clock node for mt7628

This patch adds clkctrl node for mt7628 and adds clocks property for
some node.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agoclk: add clock driver for MediaTek MT76x8 platform
Weijie Gao [Wed, 25 Sep 2019 09:45:21 +0000 (17:45 +0800)]
clk: add clock driver for MediaTek MT76x8 platform

This patch adds a clock driver for MediaTek MT7628/7688 SoC.
It provides clock gate control as well as getting clock frequency for
CPU/SYS/XTAL and some peripherals.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agodts: mtmips: enable high-speed UART support for mt7628
Weijie Gao [Wed, 25 Sep 2019 09:45:20 +0000 (17:45 +0800)]
dts: mtmips: enable high-speed UART support for mt7628

All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate <= 115200.

Add compatible string to dtsi file so u-boot can use it when serial_mtk
driver is built in.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agodts: mtmips: move uart property clock-frequency into mt7628an.dtsi
Weijie Gao [Wed, 25 Sep 2019 09:45:19 +0000 (17:45 +0800)]
dts: mtmips: move uart property clock-frequency into mt7628an.dtsi

The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agoserial: serial_mtk: add non-DM version for SPL
Weijie Gao [Wed, 25 Sep 2019 09:45:18 +0000 (17:45 +0800)]
serial: serial_mtk: add non-DM version for SPL

This patch adds non-DM version for mtk hsuart driver and makes it
compatible with ns16550a driver in configuration.
This is needed in SPL with CONFIG_SPL_DM disabled for reducing size.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agoserial: serial_mtk: enable FIFO and disable flow control
Weijie Gao [Wed, 25 Sep 2019 09:45:17 +0000 (17:45 +0800)]
serial: serial_mtk: enable FIFO and disable flow control

This patch adds codes to enable FIFO and disable flow control taken from
ns16550 driver.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
4 years agodrivers: nand: brcmnand: fix nand_chip ecc layout structure
William Zhang [Wed, 4 Sep 2019 17:51:13 +0000 (10:51 -0700)]
drivers: nand: brcmnand: fix nand_chip ecc layout structure

The current brcmnand driver is based on 4.18 linux kernel which uses
mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from
old kernel which does not use this new API and expect nand_chip.ecc.layout
structure to be set. This cause nand_scan_tail function running into a bug
check if the device has a different oob size than the default ones.

This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7
that supports the ecc layout struture and replaces the mtd_set_ooblayout
method

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
4 years agomips: bmips: switch to board defines for dtb
Álvaro Fernández Rojas [Mon, 16 Sep 2019 15:15:05 +0000 (17:15 +0200)]
mips: bmips: switch to board defines for dtb

Fixes commit 344db3f, which added missing bmips dtbs depending on their SoCs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
4 years agobmips: correct name characters
Álvaro Fernández Rojas [Fri, 30 Aug 2019 10:00:42 +0000 (12:00 +0200)]
bmips: correct name characters

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
4 years agobmips: configs: switch to size definitions
Álvaro Fernández Rojas [Fri, 30 Aug 2019 09:54:27 +0000 (11:54 +0200)]
bmips: configs: switch to size definitions

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
4 years agomips: bmips: remove unneeded definitions
Álvaro Fernández Rojas [Fri, 30 Aug 2019 09:52:59 +0000 (11:52 +0200)]
mips: bmips: remove unneeded definitions

These are no longer needed.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
4 years agobmips: enable vr-3032u nand support
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:20 +0000 (19:12 +0200)]
bmips: enable vr-3032u nand support

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
4 years agobmips: bcm63268: add support for brcmnand
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:19 +0000 (19:12 +0200)]
bmips: bcm63268: add support for brcmnand

BCM63268 uses 4.0 HW nand controller, which is currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
4 years agobmips: bcm6362: add support for brcmnand
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:18 +0000 (19:12 +0200)]
bmips: bcm6362: add support for brcmnand

BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
4 years agobmips: bcm6328: add support for brcmnand
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:17 +0000 (19:12 +0200)]
bmips: bcm6328: add support for brcmnand

BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
4 years agobmips: bcm6368: add support for brcmnand
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:16 +0000 (19:12 +0200)]
bmips: bcm6368: add support for brcmnand

BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
4 years agonand: brcm: add BCM6368 support
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:15 +0000 (19:12 +0200)]
nand: brcm: add BCM6368 support

This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
4 years agoMIPS: add compile time definition of L2 cache size
Ramon Fried [Mon, 10 Jun 2019 18:05:26 +0000 (21:05 +0300)]
MIPS: add compile time definition of L2 cache size

If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.

Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
4 years agoMerge branch '2019-10-24-UFS-support'
Tom Rini [Thu, 24 Oct 2019 13:51:48 +0000 (09:51 -0400)]
Merge branch '2019-10-24-UFS-support'

- Add Universal Flash Storage (UFS) support

4 years agoehci-mx6: Update EHCI driver to support OTG0 on i.MX7ULP
Ye Li [Thu, 24 Oct 2019 13:29:32 +0000 (10:29 -0300)]
ehci-mx6: Update EHCI driver to support OTG0 on i.MX7ULP

The ULP has two USB controllers. These two controllers have similar NC
registers layout as i.MX7D. But OTG0 uses UTMI PHY simliar as i.MX6, not
the integrated PHY on i.MX7D. The OTG1 needs off-chip HSIC PHY or ULPI PHY
to work.

This patch only supports OTG0 with UTMI PHY.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
4 years agousb: ehci-mx6: Fix bus enumeration for iMX7 SoCs
Igor Opaniuk [Thu, 10 Oct 2019 13:09:35 +0000 (16:09 +0300)]
usb: ehci-mx6: Fix bus enumeration for iMX7 SoCs

This fixes the issues with calculation of controller indexes in
ehci_usb_bind() for iMX7, as USB controllers on iMX7 SoCs aren't
placed next to each other, and their addresses incremented by 0x10000.

Example of USB nodes for iMX7S/D:

usbotg1: usb@30b10000 {
    compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
    reg = <0x30b10000 0x200>;
           ^^^^^^^^^^
....
usbotg2: usb@30b20000 {
    compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
    reg = <0x30b20000 0x200>;
           ^^^^^^^^^^
....

usbh: usb@30b30000 {
    compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
    reg = <0x30b30000 0x200>;
           ^^^^^^^^^^
....

Which was leading to usb enumeration issues:
Colibri iMX7 # usb start
starting USB...
Bus usb@30b10000: USB EHCI 1.00
Bus usb@30b20000: probe failed, error -22
scanning bus usb@30b10000 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Fixes: 501547cec1("usb: ehci-mx6: Fix bus enumeration for DM case")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
4 years agomicroblaze: Fix tab indentation in start.S
Michal Simek [Mon, 21 Oct 2019 10:20:16 +0000 (12:20 +0200)]
microblaze: Fix tab indentation in start.S

Use tab instead of spaces.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agocommon: command: Fix manual relocation for repeatable command
Michal Simek [Mon, 21 Oct 2019 10:54:20 +0000 (12:54 +0200)]
common: command: Fix manual relocation for repeatable command

All platforms which are using MANUAL_RELOC are jumping back to origin
location when repeatable command is called. The reason is that cmd_rep link
is not updated properly. Issue can be reproduced by rewriting origin
U-Boot location through (for example) file download by tftp command.

Fixes: 80a48dd47e3b ("common: command: Rework the 'cmd is repeatable' logic")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agomicroblaze: Unify Linux bootm process
Michal Simek [Thu, 17 Oct 2019 11:16:56 +0000 (13:16 +0200)]
microblaze: Unify Linux bootm process

Record two bootstages and add "Starting kernel" message to have standard
handoff message between U-Boot and OS.
Also use debug() instead of #ifdef DEBUG to clean the code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agomicroblaze: Fix FDT message in boot_prep_linux()
Michal Simek [Thu, 17 Oct 2019 12:12:48 +0000 (14:12 +0200)]
microblaze: Fix FDT message in boot_prep_linux()

There is no need to show FDT message in regular flow that's why switch it
to debug level.

Fixes: 0905046050b0 ("microblaze: Switch to generic bootm implementation")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Add support for e-a2197-00 System Controller
Michal Simek [Tue, 15 Oct 2019 10:37:20 +0000 (12:37 +0200)]
arm64: zynqmp: Add support for e-a2197-00 System Controller

Add support for System Controller available on e-a2197-00 base board.
System is very similar to p-a2197-00 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Enables SPI_FLASH_BAR
Michal Simek [Tue, 15 Oct 2019 10:07:30 +0000 (12:07 +0200)]
arm64: zynqmp: Enables SPI_FLASH_BAR

Enable the SPI flash Bank/Extended address register support for all ZynqMP
boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: zynq: Disable fdt and evn exist for cse_qspi
Michal Simek [Tue, 15 Oct 2019 11:03:50 +0000 (13:03 +0200)]
ARM: zynq: Disable fdt and evn exist for cse_qspi

Mini u-boot should be really small that's why it is necessary to disable
all unneeded configs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: zynq: Remove unused board_early_init_f()
Michal Simek [Tue, 15 Oct 2019 11:06:32 +0000 (13:06 +0200)]
ARM: zynq: Remove unused board_early_init_f()

board_early_init_f added by commit e6cc3b25d721
("arm: zynq: Wire watchdog internals") is no longer needed that's why
remove it also with Kconfig enabling.

Fixes: ccd063e9812a ("watchdog: Move watchdog_dev to data section (BSS may not be cleared)")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: zynq: Dont use 4K sector size support for mini qspi configuration
Michal Simek [Tue, 15 Oct 2019 11:04:14 +0000 (13:04 +0200)]
ARM: zynq: Dont use 4K sector size support for mini qspi configuration

This patch removes 4K sector size support for Zynq mini qspi configuration
in favour of fast erase speed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Dont use 4K sector size support for mini qspi configuration
Siva Durga Prasad Paladugu [Mon, 22 Jul 2019 17:44:02 +0000 (23:14 +0530)]
arm64: zynqmp: Dont use 4K sector size support for mini qspi configuration

This patch removes 4K sector size support for ZynqMP mini qspi
configuration in favour of fast erase speed.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Enable Micrel phy support for xilinx zc1275 revB
Siva Durga Prasad Paladugu [Sat, 16 Mar 2019 12:21:26 +0000 (17:51 +0530)]
arm64: zynqmp: Enable Micrel phy support for xilinx zc1275 revB

This patch enables Micrel phy support for Xilinx ZynqMP zc1275
revB board.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: versal: Enable BDI for mini mtest configuration
Michal Simek [Mon, 27 May 2019 12:55:01 +0000 (14:55 +0200)]
arm64: versal: Enable BDI for mini mtest configuration

bdi is useful to see how memory is mapped.
Also enable 3 memory banks to be mapped.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Add support for zcu216
Michal Simek [Tue, 6 Aug 2019 10:07:10 +0000 (12:07 +0200)]
arm64: zynqmp: Add support for zcu216

zcu104/6 defconfig was used as source. Standard features are enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Add support for m-a2197-03
Michal Simek [Fri, 28 Jun 2019 11:53:45 +0000 (13:53 +0200)]
arm64: zynqmp: Add support for m-a2197-03

It is based on m-a2197-01 with some changes in i2c intrastructure.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Add support for m-a2197-02
Michal Simek [Fri, 28 Jun 2019 11:18:50 +0000 (13:18 +0200)]
arm64: zynqmp: Add support for m-a2197-02

It is based on m-a2197-01 with some changes in i2c intrastructure.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: List lpd watchdog in dtsi
Michal Simek [Wed, 18 Jul 2018 07:25:43 +0000 (09:25 +0200)]
arm64: zynqmp: List lpd watchdog in dtsi

There are use cases where lpd watchdog can be configured for APU use. By
design this IP should be listed in zynqmp.dtsi to make sure that node is
properly enabled by DTG.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Use power header in zynqmp.dtsi
Michal Simek [Mon, 14 Oct 2019 13:56:31 +0000 (15:56 +0200)]
arm64: zynqmp: Use power header in zynqmp.dtsi

Use power header and add power-domains property.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Use reset header in zynqmp.dtsi
Michal Simek [Mon, 14 Oct 2019 13:55:53 +0000 (15:55 +0200)]
arm64: zynqmp: Use reset header in zynqmp.dtsi

Wire reset-controller and use macros from reset header.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agodt-bindings: arm64: zynqmp: Add power and reset headers
Michal Simek [Tue, 19 Feb 2019 10:32:24 +0000 (11:32 +0100)]
dt-bindings: arm64: zynqmp: Add power and reset headers

Add power and reset headers to be sources by ZynqMP dtses.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Use backward compatible string for gem
Michal Simek [Tue, 27 Mar 2018 10:53:37 +0000 (12:53 +0200)]
arm64: zynqmp: Use backward compatible string for gem

Add backward compatible string for gem ("cdns,gem").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Switch to xlnx-zynqmp-clk header
Michal Simek [Mon, 14 Oct 2019 13:42:03 +0000 (15:42 +0200)]
arm64: zynqmp: Switch to xlnx-zynqmp-clk header

Use prepared header instead of hardcoded values.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agodt-bindings: clock: zynqmp: Add clk header
Rajan Vaja [Fri, 22 Feb 2019 12:16:24 +0000 (04:16 -0800)]
dt-bindings: clock: zynqmp: Add clk header

Add dt clock header which can be included by dtses. And also use zynqmp-clk
compatible string.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Update nand device tree node properties
Naga Sureshkumar Relli [Mon, 23 Jan 2017 10:50:37 +0000 (16:20 +0530)]
arm64: zynqmp: Update nand device tree node properties

This patch updates the nand device tree node properties as per
updated driver.

Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Fix DT style for ipi mailbox
Michal Simek [Mon, 14 Oct 2019 13:52:17 +0000 (15:52 +0200)]
arm64: zynqmp: Fix DT style for ipi mailbox

Remove additional empty space.

Fixes: 95497afada58 ("arm64: zynqmp: add firmware and mailbox node to DT")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agozynqmp: configs: Add single nand flash mini u-boot configuration
T Karthik Reddy [Fri, 26 Apr 2019 10:34:44 +0000 (16:04 +0530)]
zynqmp: configs: Add single nand flash mini u-boot configuration

This patch adds configuration for single nand flash mini u-boot.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agocommon: image-sig.c: Add manual relocation
T Karthik Reddy [Sat, 16 Mar 2019 09:53:03 +0000 (15:23 +0530)]
common: image-sig.c: Add manual relocation

This patch adds manual relocation for struct checksum_algo & struct
crypto_algo structures.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agodrivers: crypto: rsa_mod_exp: Add manual relocation for ops->mod_exp()
T Karthik Reddy [Sat, 16 Mar 2019 09:53:02 +0000 (15:23 +0530)]
drivers: crypto: rsa_mod_exp: Add manual relocation for ops->mod_exp()

This patch adds manual relocation for Modular Exponentiation if
CONFIG_NEEDS_MANUAL_RELOC is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agocommon: hash: Manually relocate struct hash_algo
T Karthik Reddy [Sat, 16 Mar 2019 09:53:01 +0000 (15:23 +0530)]
common: hash: Manually relocate struct hash_algo

This patch adds manual relocation for struct hash_algo if
CONFIG_NEEDS_MANUAL_RELOC is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoARM: dt: Also clean dtbo files
Michal Simek [Mon, 26 Aug 2019 10:25:30 +0000 (12:25 +0200)]
ARM: dt: Also clean dtbo files

dtbo files can be also generated that's why also clean them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Do not remove dpll_prog from psu_init
Michal Simek [Thu, 6 Jun 2019 11:39:53 +0000 (13:39 +0200)]
arm64: zynqmp: Do not remove dpll_prog from psu_init

dpll_prog is available in some psu_init files that's why this function
should stay there.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: versal: Fix sdhci node address for versal-mini-emmc1
Michal Simek [Tue, 1 Oct 2019 13:52:35 +0000 (15:52 +0200)]
arm64: versal: Fix sdhci node address for versal-mini-emmc1

Add missing trailing 0 to mach node name address with reg property.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agospi: zynqmp: Remove unused platform headers
Michal Simek [Mon, 14 Oct 2019 10:55:47 +0000 (12:55 +0200)]
spi: zynqmp: Remove unused platform headers

There is no reason to include clk.h and hardware.h headers.
Driver doesn't require them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: versal: Enable UHS support
Siva Durga Prasad Paladugu [Wed, 7 Aug 2019 07:33:18 +0000 (13:03 +0530)]
arm64: versal: Enable UHS support

This patch enables UHS support for Versal platforms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: versal: Enable bit stream loading support for versal platform.
Siva Durga Prasad Paladugu [Mon, 5 Aug 2019 10:25:00 +0000 (15:55 +0530)]
arm64: versal: Enable bit stream loading support for versal platform.

This patch enables bitstream loading support for Versal platform.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: versal: Update boot delay to perform autoboot
Siva Durga Prasad Paladugu [Sat, 27 Apr 2019 05:47:04 +0000 (11:17 +0530)]
arm64: versal: Update boot delay to perform autoboot

Update boot delay to 5 for performing autoboot.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>