Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx

diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c
index f7cd5fe1764c77b228eba9aa94bd890b9982ead9..40a505b1d4cb0aeb3f08097fd943fc4b787fbb1f 100644 (file)
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -36,7 +36,7 @@ int board_early_init_f(void)
        u32 spridr = in_be32(&immr->sysconf.spridr);
 
        /* we check only part num, and don't look for CPU revisions */
-       switch (spridr) {
+       switch (PARTID_NO_E(spridr)) {
        case SPR_8377:
                fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
                                 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);

diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index e054f4e44d143034acb58704cce9b6d472892098..f73fd5aa55c5b6dc6f40e6c23caf386c2e8f7302 100644 (file)
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -16,10 +16,10 @@
 #include <i2c.h>
 #include <asm/io.h>
 #include <asm/fsl_serdes.h>
+#include <fdt_support.h>
 #include <spd_sdram.h>
 #include <vsc7385.h>
 
-
 #if defined(CFG_DRAM_TEST)
 int
 testdram(void)

diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index 97ac7bb3d95a0f00bafe5745c9e8b4eb43ca72e0..70cd410298af240c4a440ad9c6bccd50a48f8987 100644 (file)
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -601,7 +601,7 @@ long int spd_sdram()
        debug("DDR:timing_cfg_2=0x%08x\n", ddr->timing_cfg_2);
 
        /* Check DIMM data bus width */
-       if (spd.dataw_lsb == 0x20) {
+       if (spd.dataw_lsb < 64) {
                if (spd.mem_type == SPD_MEMTYPE_DDR)
                        burstlen = 0x03; /* 32 bit data bus, burst len is 8 */
                else
@@ -763,7 +763,7 @@ long int spd_sdram()
                sdram_cfg |= SDRAM_CFG_RD_EN;
 
        /* The DIMM is 32bit width */
-       if (spd.dataw_lsb == 0x20) {
+       if (spd.dataw_lsb < 64) {
                if (spd.mem_type == SPD_MEMTYPE_DDR)
                        sdram_cfg |= SDRAM_CFG_32_BE | SDRAM_CFG_8_BE;
                if (spd.mem_type == SPD_MEMTYPE_DDR2)

diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 7c4e76e27324be72a7391bda98099991f617187c..7fc0f7ef8542b078bf4f4c7140e09a0c460fc056 100644 (file)
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -96,7 +96,7 @@
  */
 #define CFG_SCCR_TSEC1CM       1       /* CSB:eTSEC1 = 1:1 */
 #define CFG_SCCR_TSEC2CM       1       /* CSB:eTSEC2 = 1:1 */
-#define CFG_SCCR_SATACM                SCCR_SATACM_1   /* CSB:SATA[0:3] = 1:1 */
+#define CFG_SCCR_SATACM                SCCR_SATACM_2   /* CSB:SATA[0:3] = 2:1 */
 
 /*
  * System IO Config

diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index eaac525a35555c532886e50fd622298c30ab42f4..c698ff84c659b275512d89f2ecc6e0114cc0aa88 100644 (file)
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -108,7 +108,7 @@
 /* System Clock Configuration Register */
 #define CFG_SCCR_TSEC1CM       1               /* eTSEC1 clock mode (0-3) */
 #define CFG_SCCR_TSEC2CM       1               /* eTSEC2 clock mode (0-3) */
-#define CFG_SCCR_SATACM                SCCR_SATACM_1   /* SATA1-4 clock mode (0-3) */
+#define CFG_SCCR_SATACM                SCCR_SATACM_2   /* SATA1-4 clock mode (0-3) */
 
 /*
  * System IO Config