ARM STI
M: Patrice Chotard <patrice.chotard@st.com>
S: Maintained
+T: git https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git
F: arch/arm/mach-sti/
F: arch/arm/include/asm/arch-sti*/
+F: drivers/phy/sti_usb_phy.c
+F: drivers/pinctrl/pinctrl-sti.c
+F: drivers/mmc/sti_sdhci.c
+F: drivers/reset/sti-reset.c
+F: drivers/serial/serial_sti_asc.c
+F: drivers/sysreset/sysreset_sti.c
+F: drivers/timer/sti-timer.c
+F: drivers/usb/host/dwc3-sti-glue.c
+F: include/dwc3-sti-glue.h
+F: include/dt-bindings/clock/stih407-clks.h
+F: include/dt-bindings/clock/stih410-clks.h
+F: include/dt-bindings/reset/stih407-resets.h
ARM STM SPEAR
#M: Vipin Kumar <vipin.kumar@st.com>
S: Maintained
F: tools/binman/
+BTRFS
+M: Marek Behun <marek.behun@nic.cz>
+S: Maintained
+F: cmd/btrfs.c
+F: fs/btrfs/
+F: include/btrfs.h
+
BUILDMAN
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: drivers/usb/
F: common/usb.c
F: common/usb_kbd.c
+F: include/usb.h
USB xHCI
M: Bin Meng <bmeng.cn@gmail.com>
ALL-y += $(CONFIG_BUILD_TARGET:"%"=%)
endif
-ifdef CONFIG_INIT_SP_RELATIVE
+ifeq ($(CONFIG_INIT_SP_RELATIVE)$(CONFIG_OF_SEPARATE),yy)
ALL-y += init_sp_bss_offset_check
endif
fi \
fi
-ifdef CONFIG_INIT_SP_RELATIVE
+ifeq ($(CONFIG_INIT_SP_RELATIVE)$(CONFIG_OF_SEPARATE),yy)
ifneq ($(CONFIG_SYS_MALLOC_F_LEN),)
subtract_sys_malloc_f_len = space=$$(($${space} - $(CONFIG_SYS_MALLOC_F_LEN)))
else
isb();
}
-static void __secure clamp_release(void __maybe_unused *clamp)
+static void __secure clamp_release(u32 __maybe_unused *clamp)
{
#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
defined(CONFIG_MACH_SUN8I_H3) || \
#endif
}
-static void __secure clamp_set(void __maybe_unused *clamp)
+static void __secure clamp_set(u32 __maybe_unused *clamp)
{
#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
defined(CONFIG_MACH_SUN8I_H3) || \
#endif
}
-static void __secure sunxi_power_switch(void *clamp, void *pwroff_ptr, bool on,
+static void __secure sunxi_power_switch(u32 *clamp, u32 *pwroff, bool on,
int cpu)
{
- u32 pwroff;
-
- memcpy(&pwroff, pwroff_ptr, sizeof(u32));
-
if (on) {
/* Release power clamp */
clamp_release(clamp);
/* Clear power gating */
- clrbits_le32(&pwroff, BIT(cpu));
+ clrbits_le32(pwroff, BIT(cpu));
} else {
/* Set power gating */
- setbits_le32(&pwroff, BIT(cpu));
+ setbits_le32(pwroff, BIT(cpu));
/* Activate power clamp */
clamp_set(clamp);
}
-
- memcpy(pwroff_ptr, &pwroff, sizeof(u32));
}
#ifdef CONFIG_MACH_SUN8I_R40
};
&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2m0_xfer_pullup>;
status = "okay";
};
&usb20_otg {
status = "okay";
};
+
+&pinctrl {
+ uart2m0 {
+ uart2m0_xfer_pullup: uart2m0-xfer-pullup {
+ rockchip,pins = <2 RK_PD2 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <2 RK_PD1 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ };
+ };
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
+ */
+
+#include "rockchip-u-boot.dtsi"
config STM32_ETZPC
bool "STM32 Extended TrustZone Protection"
- depends on TARGET_STM32MP1
+ depends on STM32MP15x
default y
help
Say y to enable STM32 Extended TrustZone Protection
Stack memory is pre-allocated. U-Boot must therefore know the
maximum number of CPUs that may be present.
+config SBI
+ bool
+ default y if RISCV_SMODE || SPL_RISCV_SMODE
+
+config SBI_V01
+ bool "SBI v0.1 support"
+ default y
+ depends on SBI
+ help
+ This config allows kernel to use SBI v0.1 APIs. This will be
+ deprecated in future once legacy M-mode software are no longer in use.
+
config SBI_IPI
bool
+ depends on SBI
default y if RISCV_SMODE || SPL_RISCV_SMODE
depends on SMP
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2015 Regents of the University of California
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
*
* Taken from Linux arch/riscv/include/asm/sbi.h
*/
#include <linux/types.h>
-#define SBI_SET_TIMER 0
-#define SBI_CONSOLE_PUTCHAR 1
-#define SBI_CONSOLE_GETCHAR 2
-#define SBI_CLEAR_IPI 3
-#define SBI_SEND_IPI 4
-#define SBI_REMOTE_FENCE_I 5
-#define SBI_REMOTE_SFENCE_VMA 6
-#define SBI_REMOTE_SFENCE_VMA_ASID 7
-#define SBI_SHUTDOWN 8
+enum sbi_ext_id {
+#ifdef CONFIG_SBI_V01
+ SBI_EXT_0_1_SET_TIMER = 0x0,
+ SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
+ SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
+ SBI_EXT_0_1_CLEAR_IPI = 0x3,
+ SBI_EXT_0_1_SEND_IPI = 0x4,
+ SBI_EXT_0_1_REMOTE_FENCE_I = 0x5,
+ SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
+ SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
+ SBI_EXT_0_1_SHUTDOWN = 0x8,
+#endif
+ SBI_EXT_BASE = 0x10,
+ SBI_EXT_TIME = 0x54494D45,
+ SBI_EXT_IPI = 0x735049,
+ SBI_EXT_RFENCE = 0x52464E43,
+};
-#define SBI_CALL(which, arg0, arg1, arg2) ({ \
- register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
- register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
- register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
- register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \
- asm volatile ("ecall" \
- : "+r" (a0) \
- : "r" (a1), "r" (a2), "r" (a7) \
- : "memory"); \
- a0; \
-})
+enum sbi_ext_base_fid {
+ SBI_EXT_BASE_GET_SPEC_VERSION = 0,
+ SBI_EXT_BASE_GET_IMP_ID,
+ SBI_EXT_BASE_GET_IMP_VERSION,
+ SBI_EXT_BASE_PROBE_EXT,
+ SBI_EXT_BASE_GET_MVENDORID,
+ SBI_EXT_BASE_GET_MARCHID,
+ SBI_EXT_BASE_GET_MIMPID,
+};
-/* Lazy implementations until SBI is finalized */
-#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0)
-#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0)
-#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0)
+enum sbi_ext_time_fid {
+ SBI_EXT_TIME_SET_TIMER = 0,
+};
-static inline void sbi_console_putchar(int ch)
-{
- SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch);
-}
+enum sbi_ext_ipi_fid {
+ SBI_EXT_IPI_SEND_IPI = 0,
+};
-static inline int sbi_console_getchar(void)
-{
- return SBI_CALL_0(SBI_CONSOLE_GETCHAR);
-}
+enum sbi_ext_rfence_fid {
+ SBI_EXT_RFENCE_REMOTE_FENCE_I = 0,
+ SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
+ SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
+};
-static inline void sbi_set_timer(uint64_t stime_value)
-{
-#if __riscv_xlen == 32
- SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32);
+#ifdef CONFIG_SBI_V01
+#define SBI_EXT_SET_TIMER SBI_EXT_0_1_SET_TIMER
+#define SBI_FID_SET_TIMER 0
+#define SBI_EXT_SEND_IPI SBI_EXT_0_1_SEND_IPI
+#define SBI_FID_SEND_IPI 0
+#define SBI_EXT_REMOTE_FENCE_I SBI_EXT_0_1_REMOTE_FENCE_I
+#define SBI_FID_REMOTE_FENCE_I 0
+#define SBI_EXT_REMOTE_SFENCE_VMA SBI_EXT_0_1_REMOTE_SFENCE_VMA
+#define SBI_FID_REMOTE_SFENCE_VMA 0
+#define SBI_EXT_REMOTE_SFENCE_VMA_ASID SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID
+#define SBI_FID_REMOTE_SFENCE_VMA_ASID 0
#else
- SBI_CALL_1(SBI_SET_TIMER, stime_value);
+#define SBI_EXT_SET_TIMER SBI_EXT_TIME
+#define SBI_FID_SET_TIMER SBI_EXT_TIME_SET_TIMER
+#define SBI_EXT_SEND_IPI SBI_EXT_IPI
+#define SBI_FID_SEND_IPI SBI_EXT_IPI_SEND_IPI
+#define SBI_EXT_REMOTE_FENCE_I SBI_EXT_RFENCE
+#define SBI_FID_REMOTE_FENCE_I SBI_EXT_RFENCE_REMOTE_FENCE_I
+#define SBI_EXT_REMOTE_SFENCE_VMA SBI_EXT_RFENCE
+#define SBI_FID_REMOTE_SFENCE_VMA SBI_EXT_RFENCE_REMOTE_SFENCE_VMA
+#define SBI_EXT_REMOTE_SFENCE_VMA_ASID SBI_EXT_RFENCE
+#define SBI_FID_REMOTE_SFENCE_VMA_ASID SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID
#endif
-}
-static inline void sbi_shutdown(void)
-{
- SBI_CALL_0(SBI_SHUTDOWN);
-}
+#define SBI_SPEC_VERSION_DEFAULT 0x1
+#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
+#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
+#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff
-static inline void sbi_clear_ipi(void)
-{
- SBI_CALL_0(SBI_CLEAR_IPI);
-}
+/* SBI return error codes */
+#define SBI_SUCCESS 0
+#define SBI_ERR_FAILURE -1
+#define SBI_ERR_NOT_SUPPORTED -2
+#define SBI_ERR_INVALID_PARAM -3
+#define SBI_ERR_DENIED -4
+#define SBI_ERR_INVALID_ADDRESS -5
-static inline void sbi_send_ipi(const unsigned long *hart_mask)
-{
- SBI_CALL_1(SBI_SEND_IPI, hart_mask);
-}
+extern unsigned long sbi_spec_version;
+struct sbiret {
+ long error;
+ long value;
+};
-static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
-{
- SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask);
-}
+struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
+ unsigned long arg1, unsigned long arg2,
+ unsigned long arg3, unsigned long arg4,
+ unsigned long arg5);
-static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
- unsigned long start,
- unsigned long size)
-{
- SBI_CALL_1(SBI_REMOTE_SFENCE_VMA, hart_mask);
-}
+#ifdef CONFIG_SBI_V01
+void sbi_console_putchar(int ch);
+int sbi_console_getchar(void);
+void sbi_clear_ipi(void);
+void sbi_shutdown(void);
+#endif
+void sbi_set_timer(uint64_t stime_value);
+void sbi_send_ipi(const unsigned long *hart_mask);
+void sbi_remote_fence_i(const unsigned long *hart_mask);
+void sbi_remote_sfence_vma(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size);
+void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size,
+ unsigned long asid);
-static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
- unsigned long start,
- unsigned long size,
- unsigned long asid)
-{
- SBI_CALL_1(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask);
-}
+int sbi_probe_extension(int ext);
#endif
obj-$(CONFIG_ANDES_PLMT) += andes_plmt.o
else
obj-$(CONFIG_RISCV_RDTIME) += rdtime.o
+obj-$(CONFIG_SBI) += sbi.o
obj-$(CONFIG_SBI_IPI) += sbi_ipi.o
endif
obj-y += interrupts.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * SBI initialilization and all extension implementation.
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Taken from Linux arch/riscv/kernel/sbi.c
+ */
+
+#include <common.h>
+#include <asm/encoding.h>
+#include <asm/sbi.h>
+
+/* default SBI version is 0.1 */
+unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT;
+
+struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
+ unsigned long arg1, unsigned long arg2,
+ unsigned long arg3, unsigned long arg4,
+ unsigned long arg5)
+{
+ struct sbiret ret;
+
+ register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0);
+ register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1);
+ register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2);
+ register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3);
+ register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4);
+ register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5);
+ register uintptr_t a6 asm ("a6") = (uintptr_t)(fid);
+ register uintptr_t a7 asm ("a7") = (uintptr_t)(ext);
+ asm volatile ("ecall"
+ : "+r" (a0), "+r" (a1)
+ : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
+ : "memory");
+ ret.error = a0;
+ ret.value = a1;
+
+ return ret;
+}
+
+#ifdef CONFIG_SBI_V01
+
+/**
+ * sbi_console_putchar() - Writes given character to the console device.
+ * @ch: The data to be written to the console.
+ *
+ * Return: None
+ */
+void sbi_console_putchar(int ch)
+{
+ sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0, 0, 0);
+}
+
+/**
+ * sbi_console_getchar() - Reads a byte from console device.
+ *
+ * Returns the value read from console.
+ */
+int sbi_console_getchar(void)
+{
+ struct sbiret ret;
+
+ ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0, 0, 0);
+
+ return ret.error;
+}
+
+/**
+ * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
+ *
+ * Return: None
+ */
+void sbi_clear_ipi(void)
+{
+ sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
+}
+
+/**
+ * sbi_shutdown() - Remove all the harts from executing supervisor code.
+ *
+ * Return: None
+ */
+void sbi_shutdown(void)
+{
+ sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
+}
+
+#endif /* CONFIG_SBI_V01 */
+
+/**
+ * sbi_set_timer() - Program the timer for next timer event.
+ * @stime_value: The value after which next timer event should fire.
+ *
+ * Return: None
+ */
+void sbi_set_timer(uint64_t stime_value)
+{
+#if __riscv_xlen == 32
+ sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
+ stime_value >> 32, 0, 0, 0, 0);
+#else
+ sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
+ 0, 0, 0, 0, 0);
+#endif
+}
+
+/**
+ * sbi_send_ipi() - Send an IPI to any hart.
+ * @hart_mask: A cpu mask containing all the target harts.
+ *
+ * Return: None
+ */
+void sbi_send_ipi(const unsigned long *hart_mask)
+{
+ sbi_ecall(SBI_EXT_SEND_IPI, SBI_FID_SEND_IPI, (unsigned long)hart_mask,
+ 0, 0, 0, 0, 0);
+}
+
+/**
+ * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts.
+ * @hart_mask: A cpu mask containing all the target harts.
+ *
+ * Return: None
+ */
+void sbi_remote_fence_i(const unsigned long *hart_mask)
+{
+ sbi_ecall(SBI_EXT_REMOTE_FENCE_I, SBI_FID_REMOTE_FENCE_I,
+ (unsigned long)hart_mask, 0, 0, 0, 0, 0);
+}
+
+/**
+ * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote
+ * harts for the specified virtual address range.
+ * @hart_mask: A cpu mask containing all the target harts.
+ * @start: Start of the virtual address
+ * @size: Total size of the virtual address range.
+ *
+ * Return: None
+ */
+void sbi_remote_sfence_vma(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size)
+{
+ sbi_ecall(SBI_EXT_REMOTE_SFENCE_VMA, SBI_FID_REMOTE_SFENCE_VMA,
+ (unsigned long)hart_mask, start, size, 0, 0, 0);
+}
+
+/**
+ * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given
+ * remote harts for a virtual address range belonging to a specific ASID.
+ *
+ * @hart_mask: A cpu mask containing all the target harts.
+ * @start: Start of the virtual address
+ * @size: Total size of the virtual address range.
+ * @asid: The value of address space identifier (ASID).
+ *
+ * Return: None
+ */
+void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size,
+ unsigned long asid)
+{
+ sbi_ecall(SBI_EXT_REMOTE_SFENCE_VMA_ASID,
+ SBI_FID_REMOTE_SFENCE_VMA_ASID,
+ (unsigned long)hart_mask, start, size, asid, 0, 0);
+}
+
+/**
+ * sbi_probe_extension() - Check if an SBI extension ID is supported or not.
+ * @extid: The extension ID to be probed.
+ *
+ * Return: Extension specific nonzero value f yes, -ENOTSUPP otherwise.
+ */
+int sbi_probe_extension(int extid)
+{
+ struct sbiret ret;
+
+ ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, extid,
+ 0, 0, 0, 0, 0);
+ if (!ret.error)
+ if (ret.value)
+ return ret.value;
+
+ return -ENOTSUPP;
+}
*/
#include <common.h>
+#include <asm/encoding.h>
#include <asm/sbi.h>
int riscv_send_ipi(int hart)
int riscv_clear_ipi(int hart)
{
- sbi_clear_ipi();
+ csr_clear(CSR_SIP, SIP_SSIP);
return 0;
}
*/
#include <common.h>
+#include <syscon.h>
#include <asm/io.h>
-#include <fdtdec.h>
+#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/grf_rv1108.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/gpio.h>
int mach_cpu_init(void)
{
- int node;
struct rv1108_grf *grf;
enum {
GPIO3C3_SHIFT = 6,
GPIO2D1_UART2_SIN_M0,
};
- node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rv1108-grf");
- grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
/* Elgin board use UART2 m0 for debug*/
rk_clrsetreg(&grf->gpio2d_iomux,
#define MODEM_ENABLE_GPIO 111
-int board_early_init_f(void)
+int rk_board_late_init(void)
{
gpio_request(MODEM_ENABLE_GPIO, "modem_enable");
gpio_direction_output(MODEM_ENABLE_GPIO, 0);
*/
#include <common.h>
+#include <syscon.h>
#include <asm/io.h>
-#include <fdtdec.h>
+#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/grf_rv1108.h>
#include <asm/arch-rockchip/hardware.h>
int mach_cpu_init(void)
{
- int node;
struct rv1108_grf *grf;
enum {
GPIO3C3_SHIFT = 6,
GPIO2D1_UART2_SIN_M0,
};
- node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rv1108-grf");
- grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
/*evb board use UART2 m0 for debug*/
rk_clrsetreg(&grf->gpio2d_iomux,
return ret;
}
+static void efi_reserve_memory(u64 addr, u64 size)
+{
+ u64 pages;
+
+ /* Convert from sandbox address space. */
+ addr = (uintptr_t)map_sysmem(addr, 0);
+ pages = efi_size_in_pages(size + (addr & EFI_PAGE_MASK));
+ addr &= ~EFI_PAGE_MASK;
+ if (efi_add_memory_map(addr, pages, EFI_RESERVED_MEMORY_TYPE,
+ false) != EFI_SUCCESS)
+ printf("Reserved memory mapping failed addr %llx size %llx\n",
+ addr, size);
+}
+
/**
* efi_carve_out_dt_rsv() - Carve out DT reserved memory ranges
*
static void efi_carve_out_dt_rsv(void *fdt)
{
int nr_rsv, i;
- uint64_t addr, size, pages;
+ u64 addr, size;
+ int nodeoffset, subnode;
nr_rsv = fdt_num_mem_rsv(fdt);
for (i = 0; i < nr_rsv; i++) {
if (fdt_get_mem_rsv(fdt, i, &addr, &size) != 0)
continue;
+ efi_reserve_memory(addr, size);
+ }
- /* Convert from sandbox address space. */
- addr = (uintptr_t)map_sysmem(addr, 0);
-
- pages = efi_size_in_pages(size + (addr & EFI_PAGE_MASK));
- addr &= ~EFI_PAGE_MASK;
- if (efi_add_memory_map(addr, pages, EFI_RESERVED_MEMORY_TYPE,
- false) != EFI_SUCCESS)
- printf("FDT memrsv map %d: Failed to add to map\n", i);
+ /* process reserved-memory */
+ nodeoffset = fdt_subnode_offset(fdt, 0, "reserved-memory");
+ if (nodeoffset >= 0) {
+ subnode = fdt_first_subnode(fdt, nodeoffset);
+ while (subnode >= 0) {
+ /* check if this subnode has a reg property */
+ addr = fdtdec_get_addr_size(fdt, subnode, "reg",
+ (fdt_size_t *)&size);
+ /*
+ * The /reserved-memory node may have children with
+ * a size instead of a reg property.
+ */
+ if (addr != FDT_ADDR_T_NONE)
+ efi_reserve_memory(addr, size);
+ subnode = fdt_next_subnode(fdt, subnode);
+ }
}
}
return EFI_LOAD_ERROR;
}
- /* Create memory reservations as indicated by the device tree */
- efi_carve_out_dt_rsv(fdt);
-
/* Prepare device tree for payload */
ret = copy_fdt(&fdt);
if (ret) {
return EFI_LOAD_ERROR;
}
+ /* Create memory reservations as indicated by the device tree */
+ efi_carve_out_dt_rsv(fdt);
+
/* Install device tree as UEFI table */
ret = efi_install_configuration_table(&efi_guid_fdt, fdt);
if (ret != EFI_SUCCESS) {
#include <exports.h>
#include <hexdump.h>
#include <malloc.h>
+#include <mapmem.h>
#include <search.h>
#include <linux/ctype.h>
printf("%-16s %.*llx-%.*llx", type,
EFI_PHYS_ADDR_WIDTH,
- map->physical_start,
+ (u64)map_to_sysmem((void *)map->physical_start),
EFI_PHYS_ADDR_WIDTH,
- map->physical_start + map->num_pages * EFI_PAGE_SIZE);
+ (u64)map_to_sysmem((void *)map->physical_start +
+ map->num_pages * EFI_PAGE_SIZE));
print_memory_attributes(map->attribute);
putc('\n');
int id, i;
char *endp;
char var_name[9];
- u16 var_name16[9];
+ u16 var_name16[9], *p;
efi_status_t ret;
if (argc == 1)
return CMD_RET_FAILURE;
sprintf(var_name, "Boot%04X", id);
- utf8_utf16_strncpy((u16 **)&var_name16, var_name, 9);
+ p = var_name16;
+ utf8_utf16_strncpy(&p, var_name, 9);
ret = EFI_CALL(RT->set_variable(var_name16, &guid, 0, 0, NULL));
if (ret) {
- printf("Cannot remove Boot%04X", id);
+ printf("Cannot remove %ls\n", var_name16);
return CMD_RET_FAILURE;
}
}
if (ret != -EBUSY)
gpio_free(gpio);
- return CMD_RET_SUCCESS;
+ /*
+ * Whilst wrong, the legacy gpio input command returns the pin
+ * value, or CMD_RET_FAILURE (which is indistinguishable from a
+ * valid pin value).
+ */
+ return (sub_cmd == GPIOC_INPUT) ? value : CMD_RET_SUCCESS;
err:
if (ret != -EBUSY)
if (external_data) {
debug("External Data\n");
ret = fit_image_get_data_size(fit, noffset, &len);
- *data = fit + offset;
- *size = len;
+ if (!ret) {
+ *data = fit + offset;
+ *size = len;
+ }
} else {
ret = fit_image_get_data(fit, noffset, data, size);
}
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ROCKCHIP_RV1108=y
CONFIG_TARGET_ELGIN_RV1108=y
+CONFIG_ROCKCHIP_BOOT_MODE_REG=0
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0x10210000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_DEFAULT_FDT_FILE="rv1108-elgin-r1.dtb"
+CONFIG_BOARD_LATE_INIT=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_CMD_GPIO=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_KEYBOARD=y
CONFIG_DM_VIDEO=y
# CONFIG_VIDEO_BPP8 is not set
CONFIG_DISPLAY=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
CONFIG_ROCKCHIP_USB2_PHY=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_KEYBOARD=y
CONFIG_DM_VIDEO=y
# CONFIG_VIDEO_BPP8 is not set
CONFIG_DISPLAY=y
CONFIG_DM_RESET=y
CONFIG_SANDBOX_RESET=y
CONFIG_DM_RNG=y
-CONFIG_RNG_SANDBOX=y
CONFIG_DM_RTC=y
CONFIG_RTC_RV8803=y
CONFIG_SANDBOX_SERIAL=y
CONFIG_DM_RESET=y
CONFIG_SANDBOX_RESET=y
CONFIG_DM_RNG=y
-CONFIG_RNG_SANDBOX=y
CONFIG_DM_RTC=y
CONFIG_RTC_RV8803=y
CONFIG_DEBUG_UART_SANDBOX=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_KEYBOARD=y
CONFIG_DM_VIDEO=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_KEYBOARD=y
CONFIG_DM_VIDEO=y
# CONFIG_VIDEO_BPP8 is not set
CONFIG_DISPLAY=y
This interface is used to initialise the rng device and to
read the random seed from the device.
+if DM_RNG
+
+config RNG_MESON
+ bool "Amlogic Meson Random Number Generator support"
+ depends on ARCH_MESON
+ default y
+ help
+ Enable support for hardware random number generator
+ of Amlogic Meson SoCs.
+
config RNG_SANDBOX
bool "Sandbox random number generator"
- depends on SANDBOX && DM_RNG
+ depends on SANDBOX
+ default y
help
Enable random number generator for sandbox. This is an
emulation of a rng device.
config RNG_STM32MP1
bool "Enable random number generator for STM32MP1"
- depends on ARCH_STM32MP && DM_RNG
+ depends on ARCH_STM32MP
default n
help
Enable STM32MP1 rng driver.
+
+endif
#
obj-$(CONFIG_DM_RNG) += rng-uclass.o
+obj-$(CONFIG_RNG_MESON) += meson-rng.o
obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o
obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright 2020, Heinrich Schuchardt <xypron.glpk@gmx.de>
+ *
+ * Driver for Amlogic hardware random number generator
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <rng.h>
+#include <asm/io.h>
+
+struct meson_rng_platdata {
+ fdt_addr_t base;
+ struct clk clk;
+};
+
+/**
+ * meson_rng_read() - fill buffer with random bytes
+ *
+ * @buffer: buffer to receive data
+ * @size: size of buffer
+ *
+ * Return: 0
+ */
+static int meson_rng_read(struct udevice *dev, void *data, size_t len)
+{
+ struct meson_rng_platdata *pdata = dev_get_platdata(dev);
+ char *buffer = (char *)data;
+
+ while (len) {
+ u32 rand = readl(pdata->base);
+ size_t step;
+
+ if (len >= 4)
+ step = 4;
+ else
+ step = len;
+ memcpy(buffer, &rand, step);
+ buffer += step;
+ len -= step;
+ }
+ return 0;
+}
+
+/**
+ * meson_rng_probe() - probe rng device
+ *
+ * @dev: device
+ * Return: 0 if ok
+ */
+static int meson_rng_probe(struct udevice *dev)
+{
+ struct meson_rng_platdata *pdata = dev_get_platdata(dev);
+ int err;
+
+ err = clk_enable(&pdata->clk);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+/**
+ * meson_rng_remove() - deinitialize rng device
+ *
+ * @dev: device
+ * Return: 0 if ok
+ */
+static int meson_rng_remove(struct udevice *dev)
+{
+ struct meson_rng_platdata *pdata = dev_get_platdata(dev);
+
+ return clk_disable(&pdata->clk);
+}
+
+/**
+ * meson_rng_ofdata_to_platdata() - transfer device tree data to plaform data
+ *
+ * @dev: device
+ * Return: 0 if ok
+ */
+static int meson_rng_ofdata_to_platdata(struct udevice *dev)
+{
+ struct meson_rng_platdata *pdata = dev_get_platdata(dev);
+ int err;
+
+ pdata->base = dev_read_addr(dev);
+ if (!pdata->base)
+ return -ENODEV;
+
+ err = clk_get_by_name(dev, "core", &pdata->clk);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static const struct dm_rng_ops meson_rng_ops = {
+ .read = meson_rng_read,
+};
+
+static const struct udevice_id meson_rng_match[] = {
+ {
+ .compatible = "amlogic,meson-rng",
+ },
+ {},
+};
+
+U_BOOT_DRIVER(meson_rng) = {
+ .name = "meson-rng",
+ .id = UCLASS_RNG,
+ .of_match = meson_rng_match,
+ .ops = &meson_rng_ops,
+ .probe = meson_rng_probe,
+ .remove = meson_rng_remove,
+ .platdata_auto_alloc_size = sizeof(struct meson_rng_platdata),
+ .ofdata_to_platdata = meson_rng_ofdata_to_platdata,
+};
obj-$(CONFIG_CORTINA_UART) += serial_cortina.o
obj-$(CONFIG_EFI_APP) += serial_efi.o
obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
-obj-$(CONFIG_MCFUART) += mcfuart.o
+obj-$(CONFIG_MCFUART) += serial_mcf.o
obj-$(CONFIG_SYS_NS16550) += ns16550.o
obj-$(CONFIG_S5P) += serial_s5p.o
obj-$(CONFIG_MXC_UART) += serial_mxc.o
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2004-2007 Freescale Semiconductor, Inc.
- * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
- *
- * Modified to add device model (DM) support
- * (C) Copyright 2015 Angelo Dureghello <angelo@sysam.it>
- *
- * Modified to add DM and fdt support, removed non DM code
- * (C) Copyright 2018 Angelo Dureghello <angelo@sysam.it>
- */
-
-/*
- * Minimal serial functions needed to use one of the uart ports
- * as serial console interface.
- */
-
-#include <common.h>
-#include <dm.h>
-#include <dm/platform_data/serial_coldfire.h>
-#include <serial.h>
-#include <linux/compiler.h>
-#include <asm/immap.h>
-#include <asm/uart.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-extern void uart_port_conf(int port);
-
-static int mcf_serial_init_common(uart_t *uart, int port_idx, int baudrate)
-{
- u32 counter;
-
- uart_port_conf(port_idx);
-
- /* write to SICR: SIM2 = uart mode,dcd does not affect rx */
- writeb(UART_UCR_RESET_RX, &uart->ucr);
- writeb(UART_UCR_RESET_TX, &uart->ucr);
- writeb(UART_UCR_RESET_ERROR, &uart->ucr);
- writeb(UART_UCR_RESET_MR, &uart->ucr);
- __asm__("nop");
-
- writeb(0, &uart->uimr);
-
- /* write to CSR: RX/TX baud rate from timers */
- writeb(UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK, &uart->ucsr);
-
- writeb(UART_UMR_BC_8 | UART_UMR_PM_NONE, &uart->umr);
- writeb(UART_UMR_SB_STOP_BITS_1, &uart->umr);
-
- /* Setting up BaudRate */
- counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2));
- counter = counter / baudrate;
-
- /* write to CTUR: divide counter upper byte */
- writeb((u8)((counter & 0xff00) >> 8), &uart->ubg1);
- /* write to CTLR: divide counter lower byte */
- writeb((u8)(counter & 0x00ff), &uart->ubg2);
-
- writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr);
-
- return (0);
-}
-
-static void mcf_serial_setbrg_common(uart_t *uart, int baudrate)
-{
- u32 counter;
-
- /* Setting up BaudRate */
- counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2));
- counter = counter / baudrate;
-
- /* write to CTUR: divide counter upper byte */
- writeb(((counter & 0xff00) >> 8), &uart->ubg1);
- /* write to CTLR: divide counter lower byte */
- writeb((counter & 0x00ff), &uart->ubg2);
-
- writeb(UART_UCR_RESET_RX, &uart->ucr);
- writeb(UART_UCR_RESET_TX, &uart->ucr);
-
- writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr);
-}
-
-static int coldfire_serial_probe(struct udevice *dev)
-{
- struct coldfire_serial_platdata *plat = dev->platdata;
-
- return mcf_serial_init_common((uart_t *)plat->base,
- plat->port, plat->baudrate);
-}
-
-static int coldfire_serial_putc(struct udevice *dev, const char ch)
-{
- struct coldfire_serial_platdata *plat = dev->platdata;
- uart_t *uart = (uart_t *)plat->base;
-
- /* Wait for last character to go. */
- if (!(readb(&uart->usr) & UART_USR_TXRDY))
- return -EAGAIN;
-
- writeb(ch, &uart->utb);
-
- return 0;
-}
-
-static int coldfire_serial_getc(struct udevice *dev)
-{
- struct coldfire_serial_platdata *plat = dev->platdata;
- uart_t *uart = (uart_t *)(plat->base);
-
- /* Wait for a character to arrive. */
- if (!(readb(&uart->usr) & UART_USR_RXRDY))
- return -EAGAIN;
-
- return readb(&uart->urb);
-}
-
-int coldfire_serial_setbrg(struct udevice *dev, int baudrate)
-{
- struct coldfire_serial_platdata *plat = dev->platdata;
- uart_t *uart = (uart_t *)(plat->base);
-
- mcf_serial_setbrg_common(uart, baudrate);
-
- return 0;
-}
-
-static int coldfire_serial_pending(struct udevice *dev, bool input)
-{
- struct coldfire_serial_platdata *plat = dev->platdata;
- uart_t *uart = (uart_t *)(plat->base);
-
- if (input)
- return readb(&uart->usr) & UART_USR_RXRDY ? 1 : 0;
- else
- return readb(&uart->usr) & UART_USR_TXRDY ? 0 : 1;
-
- return 0;
-}
-
-static int coldfire_ofdata_to_platdata(struct udevice *dev)
-{
- struct coldfire_serial_platdata *plat = dev_get_platdata(dev);
- fdt_addr_t addr_base;
-
- addr_base = devfdt_get_addr(dev);
- if (addr_base == FDT_ADDR_T_NONE)
- return -ENODEV;
-
- plat->base = (uint32_t)addr_base;
-
- plat->port = dev->seq;
- plat->baudrate = gd->baudrate;
-
- return 0;
-}
-
-static const struct dm_serial_ops coldfire_serial_ops = {
- .putc = coldfire_serial_putc,
- .pending = coldfire_serial_pending,
- .getc = coldfire_serial_getc,
- .setbrg = coldfire_serial_setbrg,
-};
-
-static const struct udevice_id coldfire_serial_ids[] = {
- { .compatible = "fsl,mcf-uart" },
- { }
-};
-
-U_BOOT_DRIVER(serial_coldfire) = {
- .name = "serial_coldfire",
- .id = UCLASS_SERIAL,
- .of_match = coldfire_serial_ids,
- .ofdata_to_platdata = coldfire_ofdata_to_platdata,
- .platdata_auto_alloc_size = sizeof(struct coldfire_serial_platdata),
- .probe = coldfire_serial_probe,
- .ops = &coldfire_serial_ops,
- .flags = DM_FLAG_PRE_RELOC,
-};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
+ *
+ * Modified to add device model (DM) support
+ * (C) Copyright 2015 Angelo Dureghello <angelo@sysam.it>
+ *
+ * Modified to add DM and fdt support, removed non DM code
+ * (C) Copyright 2018 Angelo Dureghello <angelo@sysam.it>
+ */
+
+/*
+ * Minimal serial functions needed to use one of the uart ports
+ * as serial console interface.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/platform_data/serial_coldfire.h>
+#include <serial.h>
+#include <linux/compiler.h>
+#include <asm/immap.h>
+#include <asm/uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void uart_port_conf(int port);
+
+static int mcf_serial_init_common(uart_t *uart, int port_idx, int baudrate)
+{
+ u32 counter;
+
+ uart_port_conf(port_idx);
+
+ /* write to SICR: SIM2 = uart mode,dcd does not affect rx */
+ writeb(UART_UCR_RESET_RX, &uart->ucr);
+ writeb(UART_UCR_RESET_TX, &uart->ucr);
+ writeb(UART_UCR_RESET_ERROR, &uart->ucr);
+ writeb(UART_UCR_RESET_MR, &uart->ucr);
+ __asm__("nop");
+
+ writeb(0, &uart->uimr);
+
+ /* write to CSR: RX/TX baud rate from timers */
+ writeb(UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK, &uart->ucsr);
+
+ writeb(UART_UMR_BC_8 | UART_UMR_PM_NONE, &uart->umr);
+ writeb(UART_UMR_SB_STOP_BITS_1, &uart->umr);
+
+ /* Setting up BaudRate */
+ counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2));
+ counter = counter / baudrate;
+
+ /* write to CTUR: divide counter upper byte */
+ writeb((u8)((counter & 0xff00) >> 8), &uart->ubg1);
+ /* write to CTLR: divide counter lower byte */
+ writeb((u8)(counter & 0x00ff), &uart->ubg2);
+
+ writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr);
+
+ return (0);
+}
+
+static void mcf_serial_setbrg_common(uart_t *uart, int baudrate)
+{
+ u32 counter;
+
+ /* Setting up BaudRate */
+ counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2));
+ counter = counter / baudrate;
+
+ /* write to CTUR: divide counter upper byte */
+ writeb(((counter & 0xff00) >> 8), &uart->ubg1);
+ /* write to CTLR: divide counter lower byte */
+ writeb((counter & 0x00ff), &uart->ubg2);
+
+ writeb(UART_UCR_RESET_RX, &uart->ucr);
+ writeb(UART_UCR_RESET_TX, &uart->ucr);
+
+ writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr);
+}
+
+static int coldfire_serial_probe(struct udevice *dev)
+{
+ struct coldfire_serial_platdata *plat = dev->platdata;
+
+ plat->port = dev->seq;
+
+ return mcf_serial_init_common((uart_t *)plat->base,
+ plat->port, plat->baudrate);
+}
+
+static int coldfire_serial_putc(struct udevice *dev, const char ch)
+{
+ struct coldfire_serial_platdata *plat = dev->platdata;
+ uart_t *uart = (uart_t *)plat->base;
+
+ /* Wait for last character to go. */
+ if (!(readb(&uart->usr) & UART_USR_TXRDY))
+ return -EAGAIN;
+
+ writeb(ch, &uart->utb);
+
+ return 0;
+}
+
+static int coldfire_serial_getc(struct udevice *dev)
+{
+ struct coldfire_serial_platdata *plat = dev->platdata;
+ uart_t *uart = (uart_t *)(plat->base);
+
+ /* Wait for a character to arrive. */
+ if (!(readb(&uart->usr) & UART_USR_RXRDY))
+ return -EAGAIN;
+
+ return readb(&uart->urb);
+}
+
+int coldfire_serial_setbrg(struct udevice *dev, int baudrate)
+{
+ struct coldfire_serial_platdata *plat = dev->platdata;
+ uart_t *uart = (uart_t *)(plat->base);
+
+ mcf_serial_setbrg_common(uart, baudrate);
+
+ return 0;
+}
+
+static int coldfire_serial_pending(struct udevice *dev, bool input)
+{
+ struct coldfire_serial_platdata *plat = dev->platdata;
+ uart_t *uart = (uart_t *)(plat->base);
+
+ if (input)
+ return readb(&uart->usr) & UART_USR_RXRDY ? 1 : 0;
+ else
+ return readb(&uart->usr) & UART_USR_TXRDY ? 0 : 1;
+
+ return 0;
+}
+
+static int coldfire_ofdata_to_platdata(struct udevice *dev)
+{
+ struct coldfire_serial_platdata *plat = dev_get_platdata(dev);
+ fdt_addr_t addr_base;
+
+ addr_base = devfdt_get_addr(dev);
+ if (addr_base == FDT_ADDR_T_NONE)
+ return -ENODEV;
+
+ plat->base = (uint32_t)addr_base;
+ plat->baudrate = gd->baudrate;
+
+ return 0;
+}
+
+static const struct dm_serial_ops coldfire_serial_ops = {
+ .putc = coldfire_serial_putc,
+ .pending = coldfire_serial_pending,
+ .getc = coldfire_serial_getc,
+ .setbrg = coldfire_serial_setbrg,
+};
+
+static const struct udevice_id coldfire_serial_ids[] = {
+ { .compatible = "fsl,mcf-uart" },
+ { }
+};
+
+U_BOOT_DRIVER(serial_coldfire) = {
+ .name = "serial_coldfire",
+ .id = UCLASS_SERIAL,
+ .of_match = coldfire_serial_ids,
+ .ofdata_to_platdata = coldfire_ofdata_to_platdata,
+ .platdata_auto_alloc_size = sizeof(struct coldfire_serial_platdata),
+ .probe = coldfire_serial_probe,
+ .ops = &coldfire_serial_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
enum usb_dr_mode dr_mode;
int ret = 0;
- dr_mode = usb_get_dr_mode(dev_of_offset(dev));
+ dr_mode = usb_get_dr_mode(dev->node);
cdns->role = USB_ROLE_NONE;
/*
int cdns3_bind(struct udevice *parent)
{
- int from = dev_of_offset(parent);
- const void *fdt = gd->fdt_blob;
enum usb_dr_mode dr_mode;
struct udevice *dev;
const char *driver;
const char *name;
- int node;
+ ofnode node;
int ret;
- node = fdt_node_offset_by_compatible(fdt, from, "cdns,usb3");
- if (node < 0) {
+ node = ofnode_by_compatible(parent->node, "cdns,usb3");
+ if (!ofnode_valid(node)) {
ret = -ENODEV;
goto fail;
}
- name = fdt_get_name(fdt, node, NULL);
+ name = ofnode_get_name(node);
dr_mode = usb_get_dr_mode(node);
switch (dr_mode) {
goto fail;
};
- ret = device_bind_driver_to_node(parent, driver, name,
- offset_to_ofnode(node), &dev);
+ ret = device_bind_driver_to_node(parent, driver, name, node, &dev);
if (ret) {
printf("%s: not able to bind usb device mode\n",
__func__);
if (!priv_dev->onchip_buffers)
priv_dev->onchip_buffers = 256;
- max_speed = usb_get_maximum_speed(dev_of_offset(cdns->dev));
+ max_speed = usb_get_maximum_speed(dev_ofnode(cdns->dev));
/* Check the maximum_speed parameter */
switch (max_speed) {
*/
#include <common.h>
-#include <linux/libfdt.h>
+#include <dm.h>
#include <linux/usb/otg.h>
#include <linux/usb/ch9.h>
[USB_DR_MODE_OTG] = "otg",
};
-enum usb_dr_mode usb_get_dr_mode(int node)
+enum usb_dr_mode usb_get_dr_mode(ofnode node)
{
- const void *fdt = gd->fdt_blob;
const char *dr_mode;
int i;
- dr_mode = fdt_getprop(fdt, node, "dr_mode", NULL);
+ dr_mode = ofnode_read_string(node, "dr_mode");
if (!dr_mode) {
pr_err("usb dr_mode not found\n");
return USB_DR_MODE_UNKNOWN;
[USB_SPEED_SUPER] = "super-speed",
};
-enum usb_device_speed usb_get_maximum_speed(int node)
+enum usb_device_speed usb_get_maximum_speed(ofnode node)
{
- const void *fdt = gd->fdt_blob;
const char *max_speed;
int i;
- max_speed = fdt_getprop(fdt, node, "maximum-speed", NULL);
+ max_speed = ofnode_read_string(node, "maximum-speed");
if (!max_speed) {
pr_err("usb maximum-speed not found\n");
return USB_SPEED_UNKNOWN;
static int dwc3_generic_ofdata_to_platdata(struct udevice *dev)
{
struct dwc3_generic_plat *plat = dev_get_platdata(dev);
- int node = dev_of_offset(dev);
+ ofnode node = dev->node;
- plat->base = devfdt_get_addr(dev);
+ plat->base = dev_read_addr(dev);
plat->maximum_speed = usb_get_maximum_speed(node);
if (plat->maximum_speed == USB_SPEED_UNKNOWN) {
static int dwc3_glue_bind(struct udevice *parent)
{
- const void *fdt = gd->fdt_blob;
- int node;
+ ofnode node;
int ret;
- for (node = fdt_first_subnode(fdt, dev_of_offset(parent)); node > 0;
- node = fdt_next_subnode(fdt, node)) {
- const char *name = fdt_get_name(fdt, node, NULL);
+ ofnode_for_each_subnode(node, parent->node) {
+ const char *name = ofnode_get_name(node);
enum usb_dr_mode dr_mode;
struct udevice *dev;
const char *driver = NULL;
continue;
ret = device_bind_driver_to_node(parent, driver, name,
- offset_to_ofnode(node), &dev);
+ node, &dev);
if (ret) {
debug("%s: not able to bind usb device mode\n",
__func__);
while (child) {
enum usb_dr_mode dr_mode;
- dr_mode = usb_get_dr_mode(dev_of_offset(child));
+ dr_mode = usb_get_dr_mode(child->node);
device_find_next_child(&child);
if (ops && ops->select_dr_mode)
ops->select_dr_mode(dev, index, dr_mode);
}
#endif
- priv->otg_mode = usb_get_dr_mode(dev_of_offset(dev));
+ priv->otg_mode = usb_get_dr_mode(dev->node);
ret = dwc3_meson_g12a_usb_init(priv);
if (ret)
static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
{
struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
- int node = dev_of_offset(dev);
ulong drvdata;
void (*set_params)(struct dwc2_plat_otg_data *data);
int ret;
- if (usb_get_dr_mode(node) != USB_DR_MODE_PERIPHERAL &&
- usb_get_dr_mode(node) != USB_DR_MODE_OTG) {
+ if (usb_get_dr_mode(dev->node) != USB_DR_MODE_PERIPHERAL &&
+ usb_get_dr_mode(dev->node) != USB_DR_MODE_OTG) {
dev_dbg(dev, "Invalid mode\n");
return -ENODEV;
}
#include <common.h>
#include <dm.h>
-#include <fdtdec.h>
#include <reset.h>
#include <clk.h>
#include <asm/io.h>
#include <dm.h>
#include <errno.h>
-#include <fdtdec.h>
-#include <linux/libfdt.h>
#include <dm/lists.h>
#include <regmap.h>
#include <reset-uclass.h>
int ret;
u32 reg[4];
- ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
- "reg", reg, ARRAY_SIZE(reg));
+ ret = ofnode_read_u32_array(dev->node, "reg", reg, ARRAY_SIZE(reg));
if (ret) {
pr_err("unable to find st,stih407-dwc3 reg property(%d)\n", ret);
return ret;
static int sti_dwc3_glue_bind(struct udevice *dev)
{
struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
- int dwc3_node;
+ ofnode node, dwc3_node;
- /* check if one subnode is present */
- dwc3_node = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
- if (dwc3_node <= 0) {
- pr_err("Can't find subnode for %s\n", dev->name);
- return -ENODEV;
+ /* Find snps,dwc3 node from subnode */
+ ofnode_for_each_subnode(node, dev->node) {
+ if (ofnode_device_is_compatible(node, "snps,dwc3"))
+ dwc3_node = node;
}
- /* check if the subnode compatible string is the dwc3 one*/
- if (fdt_node_check_compatible(gd->fdt_blob, dwc3_node,
- "snps,dwc3") != 0) {
+ if (!ofnode_valid(node)) {
pr_err("Can't find dwc3 subnode for %s\n", dev->name);
return -ENODEV;
}
#include <common.h>
#include <dm.h>
#include <errno.h>
-#include <fdtdec.h>
-#include <linux/libfdt.h>
#include <usb.h>
#include <usb/ehci-ci.h>
#include <usb/ulpi.h>
struct msm_ehci_priv *priv = dev_get_priv(dev);
priv->ulpi_vp.port_num = 0;
- priv->ehci = (void *)devfdt_get_addr(dev);
+ priv->ehci = dev_read_addr_ptr(dev);
if (priv->ehci == (void *)FDT_ADDR_T_NONE)
return -EINVAL;
struct usb_platdata *plat = dev_get_platdata(dev);
enum usb_dr_mode dr_mode;
- dr_mode = usb_get_dr_mode(dev_of_offset(dev));
+ dr_mode = usb_get_dr_mode(dev->node);
switch (dr_mode) {
case USB_DR_MODE_HOST:
#include <common.h>
#include <dm.h>
-#include <fdtdec.h>
#include <generic-phy.h>
#include <usb.h>
#include <dwc3-uboot.h>
writel(reg, &dwc3_reg->g_usb2phycfg[0]);
- dr_mode = usb_get_dr_mode(dev_of_offset(dev));
+ dr_mode = usb_get_dr_mode(dev->node);
if (dr_mode == USB_DR_MODE_UNKNOWN)
/* by default set dual role mode to HOST */
dr_mode = USB_DR_MODE_HOST;
#if CONFIG_IS_ENABLED(OF_CONTROL)
static int ti_musb_wrapper_bind(struct udevice *parent)
{
- const void *fdt = gd->fdt_blob;
- int node;
+ ofnode node;
int ret;
- for (node = fdt_first_subnode(fdt, dev_of_offset(parent)); node > 0;
- node = fdt_next_subnode(fdt, node)) {
+ ofnode_for_each_subnode(node, parent->node) {
struct udevice *dev;
- const char *name = fdt_get_name(fdt, node, NULL);
+ const char *name = ofnode_get_name(node);
enum usb_dr_mode dr_mode;
struct driver *drv;
ret = device_bind_driver_to_node(parent,
"ti-musb-peripheral",
name,
- offset_to_ofnode(node),
+ node,
&dev);
if (ret)
pr_err("musb - not able to bind usb peripheral node\n");
ret = device_bind_driver_to_node(parent,
"ti-musb-host",
name,
- offset_to_ofnode(node),
+ node,
&dev);
if (ret)
pr_err("musb - not able to bind usb host node\n");
config WATCHDOG_RESET_DISABLE
bool "Disable reset watchdog"
help
- Disable reset watchdog, which can let WATCHDOG_RESET invalid, so
- that the watchdog will not be fed in u-boot.
+ Disable reset watchdog, which can let WATCHDOG_RESET invalid, so
+ that the watchdog will not be fed in u-boot.
config IMX_WATCHDOG
bool "Enable Watchdog Timer support for IMX and LSCH2 of NXP"
select HW_WATCHDOG if !WDT
help
- Select this to enable the IMX and LSCH2 of Layerscape watchdog
- driver.
+ Select this to enable the IMX and LSCH2 of Layerscape watchdog
+ driver.
config OMAP_WATCHDOG
bool "TI OMAP watchdog driver"
bool "Designware watchdog timer support"
select HW_WATCHDOG if !WDT
help
- Enable this to support Designware Watchdog Timer IP, present e.g.
- on Altera SoCFPGA SoCs.
+ Enable this to support Designware Watchdog Timer IP, present e.g.
+ on Altera SoCFPGA SoCs.
config WDT
bool "Enable driver model for watchdog timer drivers"
bool "Marvell Armada 37xx watchdog timer support"
depends on WDT && ARMADA_3700
help
- Enable this to support Watchdog Timer on Marvell Armada 37xx SoC.
- There are 4 possible clocks which can be used on these SoCs. This
- driver uses the second clock (ID 1), assuming that so will also
- Linux's driver.
+ Enable this to support Watchdog Timer on Marvell Armada 37xx SoC.
+ There are 4 possible clocks which can be used on these SoCs. This
+ driver uses the second clock (ID 1), assuming that so will also
+ Linux's driver.
config WDT_ASPEED
bool "Aspeed ast2400/ast2500 watchdog timer support"
bool "AT91 watchdog timer support"
depends on WDT
help
- Select this to enable Microchip watchdog timer, which can be found on
- some AT91 devices.
+ Select this to enable Microchip watchdog timer, which can be found on
+ some AT91 devices.
config WDT_BCM6345
bool "BCM6345 watchdog timer support"
depends on WDT
imply WATCHDOG
help
- Select this to enable Cadence watchdog timer, which can be found on some
- Xilinx Microzed Platform.
+ Select this to enable Cadence watchdog timer, which can be found on some
+ Xilinx Microzed Platform.
config WDT_CORTINA
bool "Cortina Access CAxxxx watchdog timer support"
help
Cortina Access CAxxxx watchdog timer support.
This driver support all CPU ISAs supported by Cortina
- Access CAxxxx SoCs.
+ Access CAxxxx SoCs.
config WDT_MPC8xx
bool "MPC8xx watchdog timer support"
depends on WDT && MPC8xx
select HW_WATCHDOG
help
- Select this to enable mpc8xx watchdog timer
+ Select this to enable mpc8xx watchdog timer
config WDT_MT7621
bool "MediaTek MT7621 watchdog timer support"
depends on WDT && SOC_MT7628
help
- Select this to enable Ralink / Mediatek watchdog timer,
- which can be found on some MediaTek chips.
+ Select this to enable Ralink / Mediatek watchdog timer,
+ which can be found on some MediaTek chips.
config WDT_MTK
bool "MediaTek watchdog timer support"
It performs full SoC reset.
config WDT_OMAP3
- bool "TI OMAP watchdog timer support"
- depends on WDT && ARCH_OMAP2PLUS
- default y if AM33XX
- help
+ bool "TI OMAP watchdog timer support"
+ depends on WDT && ARCH_OMAP2PLUS
+ default y if AM33XX
+ help
This enables OMAP3+ watchdog timer driver, which can be
found on some TI chipsets and inline with driver model.
depends on WDT
select CLK
help
- Select this to enable Orion watchdog timer, which can be found on some
- Marvell Armada chips.
+ Select this to enable Orion watchdog timer, which can be found on some
+ Marvell Armada chips.
config WDT_SANDBOX
bool "Enable Watchdog Timer support for Sandbox"
bool "SP805 watchdog timer support"
depends on WDT
help
- Select this to enable SP805 watchdog timer, which can be found on some
- nxp layerscape chips.
+ Select this to enable SP805 watchdog timer, which can be found on some
+ nxp layerscape chips.
config WDT_STM32MP
bool "IWDG watchdog driver for STM32 MP's family"
depends on WDT
imply WATCHDOG
help
- Select this to enable Xilinx Axi watchdog timer, which can be found on some
- Xilinx Microblaze Platforms.
+ Select this to enable Xilinx Axi watchdog timer, which can be found on some
+ Xilinx Microblaze Platforms.
config WDT_TANGIER
bool "Intel Tangier watchdog timer support"
#include <dm.h>
#include <errno.h>
#include <hang.h>
+#include <time.h>
#include <wdt.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
/* Do not reset the watchdog too often */
now = get_timer(0);
- if (now > next_reset) {
+ if (time_after(now, next_reset)) {
next_reset = now + 1000; /* reset every 1000ms */
wdt_reset(gd->watchdog_dev);
}
if (cache->buf && cache->block == block && cache->size == size)
return 1;
ext_cache_fini(cache);
- cache->buf = malloc(size);
+ cache->buf = memalign(ARCH_DMA_MINALIGN, size);
if (!cache->buf)
return 0;
if (!ext4fs_devread(block, 0, size, cache->buf)) {
#define __CONFIG_H
#define ROCKCHIP_DEVICE_SETTINGS \
- "stdin=serial,cros-ec-keyb\0" \
+ "stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#define __ROC_PC_RK3399_H
#define ROCKCHIP_DEVICE_SETTINGS \
- "stdin=serial,cros-ec-keyb\0" \
+ "stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#define __CONFIG_H
#define ROCKCHIP_DEVICE_SETTINGS \
- "stdin=serial,cros-ec-keyb\0" \
+ "stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#define __CONFIG_H
#define ROCKCHIP_DEVICE_SETTINGS \
- "stdin=serial,cros-ec-keyb\0" \
+ "stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#define __CONFIG_H
#define ROCKCHIP_DEVICE_SETTINGS \
- "stdin=serial,cros-ec-keyb\0" \
+ "stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
struct efi_event;
+/* OsIndicationsSupported flags */
+#define EFI_OS_INDICATIONS_BOOT_TO_FW_UI 0x0000000000000001
+#define EFI_OS_INDICATIONS_TIMESTAMP_REVOCATION 0x0000000000000002
+#define EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED 0x0000000000000004
+#define EFI_OS_INDICATIONS_FMP_CAPSULE_SUPPORTED 0x0000000000000008
+#define EFI_OS_INDICATIONS_CAPSULE_RESULT_VAR_SUPPORTED 0x0000000000000010
+#define EFI_OS_INDICATIONS_START_OS_RECOVERY 0x0000000000000020
+#define EFI_OS_INDICATIONS_START_PLATFORM_RECOVERY 0x0000000000000040
+#define EFI_OS_INDICATIONS_JSON_CONFIG_DATA_REFRESH 0x0000000000000080
+
/* EFI Boot Services table */
#define EFI_BOOT_SERVICES_SIGNATURE 0x56524553544f4f42
struct efi_boot_services {
#define CAPSULE_FLAGS_INITIATE_RESET 0x00040000
struct efi_capsule_header {
- efi_guid_t *capsule_guid;
+ efi_guid_t capsule_guid;
u32 header_size;
u32 flags;
u32 capsule_image_size;
-};
+} __packed;
#define EFI_RT_SUPPORTED_GET_TIME 0x0001
#define EFI_RT_SUPPORTED_SET_TIME 0x0002
efi_uintn_t *data_size, void *data);
efi_status_t (EFIAPI *get_next_variable_name)(
efi_uintn_t *variable_name_size,
- u16 *variable_name, const efi_guid_t *vendor);
+ u16 *variable_name, efi_guid_t *vendor);
efi_status_t (EFIAPI *set_variable)(u16 *variable_name,
const efi_guid_t *vendor,
u32 attributes,
#define LOAD_OPTION_CATEGORY_BOOT 0x00000000
#define LOAD_OPTION_CATEGORY_APP 0x00000100
+/*
+ * System Resource Table
+ */
+/* Firmware Type Definitions */
+#define ESRT_FW_TYPE_UNKNOWN 0x00000000
+#define ESRT_FW_TYPE_SYSTEMFIRMWARE 0x00000001
+#define ESRT_FW_TYPE_DEVICEFIRMWARE 0x00000002
+#define ESRT_FW_TYPE_UEFIDRIVER 0x00000003
+
+/* Last Attempt Status Values */
+#define LAST_ATTEMPT_STATUS_SUCCESS 0x00000000
+#define LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL 0x00000001
+#define LAST_ATTEMPT_STATUS_ERROR_INSUFFICIENT_RESOURCES 0x00000002
+#define LAST_ATTEMPT_STATUS_ERROR_INCORRECT_VERSION 0x00000003
+#define LAST_ATTEMPT_STATUS_ERROR_INVALID_FORMAT 0x00000004
+#define LAST_ATTEMPT_STATUS_ERROR_AUTH_ERROR 0x00000005
+#define LAST_ATTEMPT_STATUS_ERROR_PWR_EVT_AC 0x00000006
+#define LAST_ATTEMPT_STATUS_ERROR_PWR_EVT_BATT 0x00000007
+#define LAST_ATTEMPT_STATUS_ERROR_UNSATISFIED_DEPENDENCIES 0x00000008
+
+/*
+ * The LastAttemptStatus values of 0x1000 - 0x4000 are reserved for vendor
+ * usage.
+ */
+#define LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL_VENDOR_RANGE_MIN 0x00001000
+#define LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL_VENDOR_RANGE_MAX 0x00004000
+
#endif
/* Install multiple protocol interfaces */
efi_status_t EFIAPI efi_install_multiple_protocol_interfaces
(efi_handle_t *handle, ...);
+/* Get handles that support a given protocol */
+efi_status_t EFIAPI efi_locate_handle_buffer(
+ enum efi_locate_search_type search_type,
+ const efi_guid_t *protocol, void *search_key,
+ efi_uintn_t *no_handles, efi_handle_t **buffer);
+/* Close an previously opened protocol interface */
+efi_status_t EFIAPI efi_close_protocol(efi_handle_t handle,
+ const efi_guid_t *protocol,
+ efi_handle_t agent_handle,
+ efi_handle_t controller_handle);
+/* Open a protocol interface */
+efi_status_t EFIAPI efi_handle_protocol(efi_handle_t handle,
+ const efi_guid_t *protocol,
+ void **protocol_interface);
/* Call this to create an event */
efi_status_t efi_create_event(uint32_t type, efi_uintn_t notify_tpl,
void (EFIAPI *notify_function) (
efi_uintn_t *data_size, void *data);
efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size,
u16 *variable_name,
- const efi_guid_t *vendor);
+ efi_guid_t *vendor);
efi_status_t EFIAPI efi_set_variable(u16 *variable_name,
const efi_guid_t *vendor, u32 attributes,
efi_uintn_t data_size, const void *data);
#ifndef __LINUX_USB_OTG_H
#define __LINUX_USB_OTG_H
+#include <dm/ofnode.h>
+
enum usb_dr_mode {
USB_DR_MODE_UNKNOWN,
USB_DR_MODE_HOST,
/**
* usb_get_dr_mode() - Get dual role mode for given device
- * @node: Node offset to the given device
+ * @node: ofnode of the given device
*
* The function gets phy interface string from property 'dr_mode',
* and returns the correspondig enum usb_dr_mode
*/
-enum usb_dr_mode usb_get_dr_mode(int node);
+enum usb_dr_mode usb_get_dr_mode(ofnode node);
/**
* usb_get_maximum_speed() - Get maximum speed for given device
- * @node: Node offset to the given device
+ * @node: ofnode of the given device
*
* The function gets phy interface string from property 'maximum-speed',
* and returns the correspondig enum usb_device_speed
*/
-enum usb_device_speed usb_get_maximum_speed(int node);
+enum usb_device_speed usb_get_maximum_speed(ofnode node);
#endif /* __LINUX_USB_OTG_H */
}
}
- if (CONFIG_IS_ENABLED(OF_CONTROL)) {
+ if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) {
timeout = dev_read_u32_default(gd->watchdog_dev, "timeout-sec",
WATCHDOG_TIMEOUT_SECS);
}
-
wdt_start(gd->watchdog_dev, timeout * 1000, 0);
gd->flags |= GD_FLG_WDT_READY;
printf("WDT: Started with%s servicing (%ds timeout)\n",
*/
static void efi_queue_event(struct efi_event *event)
{
- struct efi_event *item = NULL;
+ struct efi_event *item;
if (!event->notify_function)
return;
*
* Return: status code
*/
-static efi_status_t EFIAPI efi_close_protocol(efi_handle_t handle,
- const efi_guid_t *protocol,
- efi_handle_t agent_handle,
- efi_handle_t controller_handle)
+efi_status_t EFIAPI efi_close_protocol(efi_handle_t handle,
+ const efi_guid_t *protocol,
+ efi_handle_t agent_handle,
+ efi_handle_t controller_handle)
{
struct efi_handler *handler;
struct efi_open_protocol_info_item *item;
*
* Return: status code
*/
-static efi_status_t EFIAPI efi_locate_handle_buffer(
+efi_status_t EFIAPI efi_locate_handle_buffer(
enum efi_locate_search_type search_type,
const efi_guid_t *protocol, void *search_key,
efi_uintn_t *no_handles, efi_handle_t **buffer)
*
* Return: status code
*/
-static efi_status_t EFIAPI efi_handle_protocol(efi_handle_t handle,
- const efi_guid_t *protocol,
- void **protocol_interface)
+efi_status_t EFIAPI efi_handle_protocol(efi_handle_t handle,
+ const efi_guid_t *protocol,
+ void **protocol_interface)
{
return efi_open_protocol(handle, protocol, protocol_interface, efi_root,
NULL, EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL);
.flush_blocks = &efi_disk_flush_blocks,
};
-/*
- * Get the simple file system protocol for a file device path.
+/**
+ * efi_fs_from_path() - retrieve simple file system protocol
+ *
+ * Gets the simple file system protocol for a file device path.
*
* The full path provided is split into device part and into a file
* part. The device part is used to find the handle on which the
* simple file system protocol is installed.
*
- * @full_path device path including device and file
- * @return simple file system protocol
+ * @full_path: device path including device and file
+ * Return: simple file system protocol
*/
struct efi_simple_file_system_protocol *
efi_fs_from_path(struct efi_device_path *full_path)
}
/*
- * Create a handle for a partition or disk
+ * efi_disk_add_dev() - create a handle for a partition or disk
*
- * @parent parent handle
- * @dp_parent parent device path
- * @if_typename interface name for block device
- * @desc internal block device
- * @dev_index device index for block device
- * @offset offset into disk for simple partitions
- * @return disk object
+ * @parent: parent handle
+ * @dp_parent: parent device path
+ * @if_typename: interface name for block device
+ * @desc: internal block device
+ * @dev_index: device index for block device
+ * @offset: offset into disk for simple partitions
+ * Return: disk object
*/
static efi_status_t efi_disk_add_dev(
efi_handle_t parent,
diskobj->media.block_size = desc->blksz;
diskobj->media.io_align = desc->blksz;
diskobj->media.last_block = desc->lba - offset;
- if (part != 0)
+ if (part)
diskobj->media.logical_partition = 1;
diskobj->ops.media = &diskobj->media;
if (disk)
return EFI_SUCCESS;
}
-/*
- * Create handles and protocols for the partitions of a block device
+/**
+ * efi_disk_create_partitions() - create handles and protocols for partitions
*
- * @parent handle of the parent disk
- * @blk_desc block device
- * @if_typename interface type
- * @diskid device number
- * @pdevname device name
- * @return number of partitions created
+ * Create handles and protocols for the partitions of a block device.
+ *
+ * @parent: handle of the parent disk
+ * @blk_desc: block device
+ * @if_typename: interface type
+ * @diskid: device number
+ * @pdevname: device name
+ * Return: number of partitions created
*/
int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc,
const char *if_typename, int diskid,
return disks;
}
-/*
+/**
+ * efi_disk_register() - register block devices
+ *
* U-Boot doesn't have a list of all online disk devices. So when running our
* EFI payload, we scan through all of the potentially available ones and
* store them in our object pool.
*
+ * This function is called in efi_init_obj_list().
+ *
* TODO(sjg@chromium.org): Actually with CONFIG_BLK, U-Boot does have this.
* Consider converting the code to look up devices as needed. The EFI device
* could be a child of the UCLASS_BLK block device, perhaps.
*
- * This gets called from do_bootefi_exec().
+ * Return: status code
*/
efi_status_t efi_disk_register(void)
{
u8 *d = dest;
const u8 *s = src;
- if (d >= s) {
+ if (d <= s) {
for (; n; --n)
*d++ = *s++;
} else {
*memory_map_size = map_size;
- if (provided_map_size < map_size)
- return EFI_BUFFER_TOO_SMALL;
-
- if (!memory_map)
- return EFI_INVALID_PARAMETER;
-
if (descriptor_size)
*descriptor_size = sizeof(struct efi_mem_desc);
if (descriptor_version)
*descriptor_version = EFI_MEMORY_DESCRIPTOR_VERSION;
+ if (provided_map_size < map_size)
+ return EFI_BUFFER_TOO_SMALL;
+
+ if (!memory_map)
+ return EFI_INVALID_PARAMETER;
+
/* Copy list into array */
/* Return the list in ascending order */
memory_map = &memory_map[map_entries - 1];
}
/**
- * efi_convert_pointer_runtime() - convert from physical to virtual pointer
+ * efi_convert_pointer() - convert from physical to virtual pointer
*
* This function implements the ConvertPointer() runtime service until
* the first call to SetVirtualAddressMap().
*
* @debug_disposition: indicates if pointer may be converted to NULL
* @address: pointer to be converted
- * Return: status code EFI_UNSUPPORTED
+ * Return: status code
*/
static __efi_runtime efi_status_t EFIAPI efi_convert_pointer(
efi_uintn_t debug_disposition, void **address)
// SPDX-License-Identifier: GPL-2.0+
/*
- * EFI utils
+ * UEFI runtime variable services
*
- * Copyright (c) 2017 Rob Clark
+ * Copyright (c) 2017 Rob Clark
*/
#include <common.h>
u32 *attributes)
{
char *guid, *name, *end, c;
- unsigned long name_len;
+ size_t name_len;
+ efi_uintn_t old_variable_name_size;
u16 *p;
guid = strchr(variable, '_');
return EFI_INVALID_PARAMETER;
name_len = end - name;
- if (*variable_name_size < (name_len + 1)) {
- *variable_name_size = name_len + 1;
+ old_variable_name_size = *variable_name_size;
+ *variable_name_size = sizeof(u16) * (name_len + 1);
+ if (old_variable_name_size < *variable_name_size)
return EFI_BUFFER_TOO_SMALL;
- }
+
end++; /* point to value */
/* variable name */
p = variable_name;
utf8_utf16_strncpy(&p, name, name_len);
variable_name[name_len] = 0;
- *variable_name_size = name_len + 1;
/* guid */
c = *(name - 1);
*/
efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size,
u16 *variable_name,
- const efi_guid_t *vendor)
+ efi_guid_t *vendor)
{
char *native_name, *variable;
ssize_t name_len, list_len;
*/
static efi_status_t __efi_runtime EFIAPI
efi_get_next_variable_name_runtime(efi_uintn_t *variable_name_size,
- u16 *variable_name, const efi_guid_t *vendor)
+ u16 *variable_name, efi_guid_t *vendor)
{
return EFI_UNSUPPORTED;
}
efi_selftest_gop.o \
efi_selftest_loaded_image.o \
efi_selftest_manageprotocols.o \
+efi_selftest_mem.o \
efi_selftest_memory.o \
efi_selftest_open_protocol.o \
efi_selftest_register_notify.o \
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * efi_selftest_memory
+ *
+ * Copyright (c) 2018 Heinrich Schuchardt <xypron.glpk@gmx.de>
+ *
+ * This unit test checks the following boottime services:
+ * CopyMem, SetMem, CalculateCrc32
+ *
+ * The memory type used for the device tree is checked.
+ */
+
+#include <efi_selftest.h>
+
+static struct efi_boot_services *boottime;
+
+/**
+ * setup() - setup unit test
+ *
+ * @handle: handle of the loaded image
+ * @systable: system table
+ * Return: EFI_ST_SUCCESS for success
+ */
+static int setup(const efi_handle_t handle,
+ const struct efi_system_table *systable)
+{
+ boottime = systable->boottime;
+
+ return EFI_ST_SUCCESS;
+}
+
+/*
+ * execute() - execute unit test
+ *
+ * Return: EFI_ST_SUCCESS for success
+ */
+static int execute(void)
+{
+ u8 c1[] = "abcdefghijklmnop";
+ u8 c2[] = "abcdefghijklmnop";
+ u32 crc32;
+ efi_status_t ret;
+
+ ret = boottime->calculate_crc32(c1, 16, &crc32);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("CalculateCrc32 failed\n");
+ return EFI_ST_FAILURE;
+ }
+ if (crc32 != 0x943ac093) {
+ efi_st_error("CalculateCrc32 returned wrong value\n");
+ return EFI_ST_FAILURE;
+ }
+ boottime->copy_mem(&c1[5], &c1[3], 8);
+ if (memcmp(c1, "abcdedefghijknop", 16)) {
+ efi_st_error("CopyMem forward copy failed: %s\n", c1);
+ return EFI_ST_FAILURE;
+ }
+ boottime->copy_mem(&c2[3], &c2[5], 8);
+ if (memcmp(c2, "abcfghijklmlmnop", 16)) {
+ efi_st_error("CopyMem backward copy failed: %s\n", c2);
+ return EFI_ST_FAILURE;
+ }
+ boottime->set_mem(&c1[3], 8, 'x');
+ if (memcmp(c1, "abcxxxxxxxxjknop", 16)) {
+ efi_st_error("SetMem failed: %s\n", c1);
+ return EFI_ST_FAILURE;
+ }
+
+ return EFI_ST_SUCCESS;
+}
+
+EFI_UNIT_TEST(mem) = {
+ .name = "mem",
+ .phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT,
+ .setup = setup,
+ .execute = execute,
+};
#include <efi_selftest.h>
#define EFI_ST_MAX_DATA_SIZE 16
-#define EFI_ST_MAX_VARNAME_SIZE 40
+#define EFI_ST_MAX_VARNAME_SIZE 80
static struct efi_boot_services *boottime;
static struct efi_runtime_services *runtime;
return EFI_ST_FAILURE;
}
if (!memcmp(&guid, &guid_vendor0, sizeof(efi_guid_t)) &&
- !efi_st_strcmp_16_8(varname, "efi_st_var0"))
+ !efi_st_strcmp_16_8(varname, "efi_st_var0")) {
flag |= 1;
+ if (len != 24) {
+ efi_st_error("GetNextVariableName report wrong length %u, expected 24\n",
+ (unsigned int)len);
+ return EFI_ST_FAILURE;
+ }
+ }
if (!memcmp(&guid, &guid_vendor1, sizeof(efi_guid_t)) &&
!efi_st_strcmp_16_8(varname, "efi_st_var1"))
flag |= 2;
}
/**
- * run_bootm_test() - Run tests on the bootm decopmression function
+ * run_bootm_test() - Run tests on the bootm decompression function
*
* @comp_type: Compression type to test
* @compress: Our function to compress data
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0+
+
+import pytest
+
+@pytest.mark.boardspec('sandbox')
+@pytest.mark.buildconfigspec('cmd_gpio')
+def test_gpio_input(u_boot_console):
+ """Test that gpio input correctly returns the value of a gpio pin."""
+
+ response = u_boot_console.run_command('gpio input 0; echo rc:$?')
+ expected_response = 'rc:0'
+ assert(expected_response in response)
+ response = u_boot_console.run_command('gpio toggle 0; gpio input 0; echo rc:$?')
+ expected_response = 'rc:1'
+ assert(expected_response in response)
+
+@pytest.mark.boardspec('sandbox')
+@pytest.mark.buildconfigspec('cmd_gpio')
+def test_gpio_exit_statuses(u_boot_console):
+ """Test that non-input gpio commands correctly return the command
+ success/failure status."""
+
+ expected_response = 'rc:0'
+ response = u_boot_console.run_command('gpio clear 0; echo rc:$?')
+ assert(expected_response in response)
+ response = u_boot_console.run_command('gpio set 0; echo rc:$?')
+ assert(expected_response in response)
+ response = u_boot_console.run_command('gpio toggle 0; echo rc:$?')
+ assert(expected_response in response)
+ response = u_boot_console.run_command('gpio status -a; echo rc:$?')
+ assert(expected_response in response)
+
+ expected_response = 'rc:1'
+ response = u_boot_console.run_command('gpio nonexistent-command; echo rc:$?')
+ assert(expected_response in response)
+ response = u_boot_console.run_command('gpio input 200; echo rc:$?')
+ assert(expected_response in response)
'info_mode': ???,
'info_buswidth': ???.
},
-}
+)
# Configuration data for test_mmc_rd; defines regions of the MMC (entire
# devices, or ranges of sectors) which can be read:
assert good_response in response
good_response = "Bus Speed: %s" % info_speed
assert good_response in response
- good_response = "Mode : %s" % info_mode
+ good_response = "Mode: %s" % info_mode
assert good_response in response
good_response = "Bus Width: %s" % info_buswidth
assert good_response in response
rkcommon_offset_to_spi(hdr1_offset));
for (i = 0; i < ARRAY_SIZE(spl_infos); i++) {
- if (!memcmp(&hdr1_sdmmc->magic, spl_infos[i].spl_hdr, 4)) {
+ if (!memcmp(&hdr1_sdmmc->magic, spl_infos[i].spl_hdr,
+ RK_SPL_HDR_SIZE)) {
if (spl_info)
*spl_info = &spl_infos[i];
return IH_TYPE_RKSD;
- } else if (!memcmp(&hdr1_spi->magic, spl_infos[i].spl_hdr, 4)) {
+ } else if (!memcmp(&hdr1_spi->magic, spl_infos[i].spl_hdr,
+ RK_SPL_HDR_SIZE)) {
if (spl_info)
*spl_info = &spl_infos[i];
return IH_TYPE_RKSPI;
projects / oweals / u-boot.git / commitdiff