board/rockchip/evb_rv1108/evb_rv1108.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C)Copyright 2016 Rockchip Electronics Co., Ltd
   4  * Authors: Andy Yan <andy.yan@rock-chips.com>
   5  */
   6
   7 #include <common.h>
   8 #include <syscon.h>
   9 #include <asm/io.h>
  10 #include <asm/arch-rockchip/clock.h>
  11 #include <asm/arch-rockchip/grf_rv1108.h>
  12 #include <asm/arch-rockchip/hardware.h>
  13
  14 DECLARE_GLOBAL_DATA_PTR;
  15
  16 int mach_cpu_init(void)
  17 {
  18         struct rv1108_grf *grf;
  19         enum {
  20                 GPIO3C3_SHIFT           = 6,
  21                 GPIO3C3_MASK            = 3 << GPIO3C3_SHIFT,
  22
  23                 GPIO3C2_SHIFT           = 4,
  24                 GPIO3C2_MASK            = 3 << GPIO3C2_SHIFT,
  25
  26                 GPIO2D2_SHIFT           = 4,
  27                 GPIO2D2_MASK            = 3 << GPIO2D2_SHIFT,
  28                 GPIO2D2_GPIO            = 0,
  29                 GPIO2D2_UART2_SOUT_M0,
  30
  31                 GPIO2D1_SHIFT           = 2,
  32                 GPIO2D1_MASK            = 3 << GPIO2D1_SHIFT,
  33                 GPIO2D1_GPIO            = 0,
  34                 GPIO2D1_UART2_SIN_M0,
  35         };
  36
  37         grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
  38
  39         /*evb board use UART2 m0 for debug*/
  40         rk_clrsetreg(&grf->gpio2d_iomux,
  41                      GPIO2D2_MASK | GPIO2D1_MASK,
  42                      GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |
  43                      GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT);
  44         rk_clrreg(&grf->gpio3c_iomux, GPIO3C3_MASK | GPIO3C2_MASK);
  45
  46         return 0;
  47 }
  48
  49 int dram_init(void)
  50 {
  51         gd->ram_size = 0x8000000;
  52
  53         return 0;
  54 }