ARM: dts: k3-j721e: Add OSPI DT nodes
authorVignesh Raghavendra <vigneshr@ti.com>
Tue, 4 Feb 2020 05:39:52 +0000 (11:09 +0530)
committerLokesh Vutla <lokeshvutla@ti.com>
Tue, 3 Mar 2020 07:38:13 +0000 (13:08 +0530)
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support
OSPI boot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
arch/arm/dts/k3-j721e-common-proc-board.dts
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
arch/arm/dts/k3-j721e-r5-common-proc-board.dts
arch/arm/dts/k3-j721e-som-p0.dtsi
arch/arm/dts/k3-j721e.dtsi

index a3a81932168e76c9a01d4c7c9fe99b6a218ebd45..d422100d42c5bcaa35a58aa2b583347014f2750b 100644 (file)
 &exp2 {
        u-boot,dm-spl;
 };
+
+&mcu_fss0_ospi0_pins_default {
+       u-boot,dm-spl;
+};
+
+&fss {
+       u-boot,dm-spl;
+};
+
+&ospi0 {
+       u-boot,dm-spl;
+
+       flash@0 {
+               u-boot,dm-spl;
+       };
+};
index d216b707fd2cbc144c8002f4450a47d19dbb1910..496a15e1d1acbcc10f5c0091b71dc98864378ac5 100644 (file)
                        J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
                >;
        };
+
+       mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
+               pinctrl-single,pins = <
+                       J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
+                       J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
+                       J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
+                       J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
+                       J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
+                       J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
+                       J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
+                       J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
+               >;
+       };
 };
 
 &usbss0 {
                #gpio-cells = <2>;
        };
 };
+
+&ospi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
+
+       flash@0{
+               compatible = "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <40000000>;
+               cdns,tshsl-ns = <60>;
+               cdns,tsd2d-ns = <60>;
+               cdns,tchsh-ns = <60>;
+               cdns,tslch-ns = <60>;
+               cdns,read-delay = <2>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+       };
+};
index fe52fd1b2f9f07fde90abd79b48d1376b1f59d7d..a9e97f219bd0d7d6f43794d69deeef4556a1a8f6 100644 (file)
                        assigned-clocks = <&k3_clks 102 0>;
                        assigned-clock-rates = <250000000>;
                };
+
+               ospi0: spi@47040000 {
+                       compatible = "ti,am654-ospi";
+                       reg = <0x0 0x47040000 0x0 0x100>,
+                               <0x5 0x00000000 0x1 0x0000000>;
+                       interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
+                       cdns,fifo-depth = <256>;
+                       cdns,fifo-width = <4>;
+                       cdns,trigger-address = <0x0>;
+                       clocks = <&k3_clks 103 0>;
+                       assigned-clocks = <&k3_clks 103 0>;
+                       assigned-clock-parents = <&k3_clks 103 2>;
+                       assigned-clock-rates = <166666666>;
+                       power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               ospi1: spi@47050000 {
+                       compatible = "ti,am654-ospi";
+                       reg = <0x0 0x47050000 0x0 0x100>,
+                               <0x7 0x00000000 0x1 0x00000000>;
+                       interrupts = <GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH>;
+                       cdns,fifo-depth = <256>;
+                       cdns,fifo-width = <4>;
+                       cdns,trigger-address = <0x0>;
+                       clocks = <&k3_clks 104 0>;
+                       power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
        };
 
        mcu_i2c0: i2c@40b00000 {
index eb577cdbc64b065960bc03cbd2d7347b3c4b68d6..42251062d8357b218f2c1aa7592719e6e2c45316 100644 (file)
                        J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
                >;
        };
+
+       mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
+               pinctrl-single,pins = <
+                       J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */
+                       J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0)  /* MCU_OSPI0_DQS */
+                       J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* MCU_OSPI0_D0 */
+                       J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* MCU_OSPI0_D1 */
+                       J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* MCU_OSPI0_D2 */
+                       J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* MCU_OSPI0_D3 */
+                       J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* MCU_OSPI0_D4 */
+                       J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* MCU_OSPI0_D5 */
+                       J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* MCU_OSPI0_D6 */
+                       J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* MCU_OSPI0_D7 */
+                       J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
+               >;
+       };
 };
 
 &main_pmx0 {
        };
 };
 
+&ospi0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
+
+       reg = <0x0 0x47040000 0x0 0x100>,
+             <0x0 0x50000000 0x0 0x8000000>;
+
+       flash@0{
+               compatible = "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <8>;
+               spi-max-frequency = <40000000>;
+               cdns,tshsl-ns = <60>;
+               cdns,tsd2d-ns = <60>;
+               cdns,tchsh-ns = <60>;
+               cdns,tslch-ns = <60>;
+               cdns,read-delay = <0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+       };
+};
+
 #include "k3-j721e-common-proc-board-u-boot.dtsi"
index 1e1519f1c900219d308fb57dab75170480f647ff..8497ff3e3e12cc5395a8fd0086776d88cdccf5f8 100644 (file)
                        J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (G21) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
                >;
        };
+
+       mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
+               pinctrl-single,pins = <
+                       J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */
+                       J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0)  /* MCU_OSPI0_DQS */
+                       J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* MCU_OSPI0_D0 */
+                       J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* MCU_OSPI0_D1 */
+                       J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* MCU_OSPI0_D2 */
+                       J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* MCU_OSPI0_D3 */
+                       J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* MCU_OSPI0_D4 */
+                       J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* MCU_OSPI0_D5 */
+                       J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* MCU_OSPI0_D6 */
+                       J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* MCU_OSPI0_D7 */
+                       J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
+               >;
+       };
 };
 
 &hbmc {
                reg = <0x0 0x0 0x4000000>;
        };
 };
+
+&ospi0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
+
+       flash@0{
+               compatible = "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <8>;
+               spi-max-frequency = <40000000>;
+               cdns,tshsl-ns = <60>;
+               cdns,tsd2d-ns = <60>;
+               cdns,tchsh-ns = <60>;
+               cdns,tslch-ns = <60>;
+               cdns,read-delay = <0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+       };
+};
index 68ba517e50098afd17850e534883f658cab420f4..04137b99486cb27143b7fd2157b3ef7555d3d7e7 100644 (file)
@@ -40,6 +40,8 @@
                i2c7 = &main_i2c4;
                i2c8 = &main_i2c5;
                i2c9 = &main_i2c6;
+               spi0 = &ospi0;
+               spi1 = &ospi1;
        };
 
        chosen { };