oweals/u-boot.git
5 years agofit: Support compression for non-kernel components (e.g. FDT)
Julius Werner [Thu, 25 Jul 2019 02:37:55 +0000 (19:37 -0700)]
fit: Support compression for non-kernel components (e.g. FDT)

This patch adds support for compressing non-kernel image nodes in a FIT
image (kernel nodes could already be compressed previously). This can
reduce the size of FIT images and therefore improve boot times
(especially when an image bundles many different kernel FDTs). The
images will automatically be decompressed on load.

This patch does not support extracting compatible strings from
compressed FDTs, so it's not very helpful in conjunction with
CONFIG_FIT_BEST_MATCH yet, but it can already be used in environments
that select the configuration to load explicitly.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
5 years agocommon: Move bootm_decomp_image() to image.c (as image_decomp())
Julius Werner [Thu, 25 Jul 2019 02:37:54 +0000 (19:37 -0700)]
common: Move bootm_decomp_image() to image.c (as image_decomp())

Upcoming patches want to add decompression to use cases that are no
longer directly related to booting. It makes sense to retain a single
decompression routine, but it should no longer be in bootm.c (which is
not compiled for all configurations). This patch moves
bootm_decomp_image() to image.c and renames it to image_decomp() in
preparation of those upcoming patches.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
[trini: Fix warning around handle_decomp_error being unused]
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoMerge branch '2019-07-26-ti-imports'
Tom Rini [Sat, 27 Jul 2019 23:50:52 +0000 (19:50 -0400)]
Merge branch '2019-07-26-ti-imports'

- Bring in the rest of the J271E platform
- Various OMAP3/AM3517, DA850 fixes

5 years agoenv: ti: boot: Use ttyS2 instead of ttyO2
Sam Protsenko [Fri, 12 Jul 2019 17:38:12 +0000 (20:38 +0300)]
env: ti: boot: Use ttyS2 instead of ttyO2

ttyO2 console enables legacy CONFIG_SERIAL_OMAP driver in kernel.
Nowadays it's preferred to use the generic CONFIG_SERIAL_8250_OMAP
driver, which being enabled via ttyS2 console. Both drivers are enabled
in multi_v7_defconfig and in omap2plus_defconfig, for compatibility
reasons. Let's switch to ttyS2 console, to be sure that standard 8250
serial driver is used.

Similar behavior can be also achieved by enabling
CONFIG_SERIAL_8250_OMAP_TTYO_FIXUP option in kernel, but it's better not
to rely on that, as it can be disabled or removed after transitional
period.

Right now on DRA7/AM57x platforms the 8250-omap driver is being probed
first, and omap-serial driver is only probed if the first one failed.
It can be seen from uart3 definition in arch/arm/boot/dts/dra7-l4.dtsi:

    compatible = "ti,dra742-uart", "ti,omap4-uart";

So the kernel already uses 8250 driver. This change basically allows
kernel developers to throw away the omap-serial driver and associated
compatibility options. Similar discussions [1,2] have started several
years ago, so it should be safe to do that now.

[1] https://patchwork.kernel.org/patch/6198471/
[2] http://processors.wiki.ti.com/index.php/Sitara_Linux_UART_-_Switching_to_8250_Driver

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Andrew F. Davis <afd@ti.com>
[trini: Update omap5_uevm]
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoarm: am57xx: Allow bootm to load larger kernels
Sam Protsenko [Tue, 2 Jul 2019 17:56:09 +0000 (20:56 +0300)]
arm: am57xx: Allow bootm to load larger kernels

linux-mainline with multi_v7_defconfig + Android configs takes more
space than regular TI Android kernel and bootm will fail to load it.
Let's increase max kernel size up to 64 MiB to make it possible to run
such kernel.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoARM: da850-evm: Remove dead/unneeded code
Adam Ford [Fri, 19 Jul 2019 21:24:50 +0000 (16:24 -0500)]
ARM: da850-evm: Remove dead/unneeded code

The DA8850-evm supports DM_I2C and boots with SPL_DM, so we can
drop some of the code which disables DM_I2C in SPL.  This
patch removes some #undef's now rendered obsolete.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: omap3/omap35_logic: Fix broken Logic PD Torpedo booting
Adam Ford [Wed, 17 Jul 2019 14:35:27 +0000 (09:35 -0500)]
ARM: omap3/omap35_logic: Fix broken Logic PD Torpedo booting

The SOM-LV and Torpedo boards are very similar, but something
happened growing SPL enough to break the Torpedo.  The SOM-LV
board were not doing alias sequencing during SPL and they
continue to work while something broke the Torpedo.  This
patch disables SPL_DM_SEQ_ALIAS allowing it to boot again.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: dts: Logic PD SOM-LV and Torpedo Boards: Resync DTS
Adam Ford [Mon, 15 Jul 2019 19:07:52 +0000 (14:07 -0500)]
ARM: dts: Logic PD SOM-LV and Torpedo Boards: Resync DTS

Re-sync all Logic PD OMAP35 and AM/DM37 boards with Kernel
5.2.1

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: da850evm: Remove legacy OHCI referencs and unify platform
Adam Ford [Tue, 2 Jul 2019 15:36:28 +0000 (10:36 -0500)]
ARM: da850evm: Remove legacy OHCI referencs and unify platform

OHCI was added with DM_USB support, so there are a few unneeded
items in the header file that can be removed.  This also
unifies da850evm with NOR and NAND booting options so all have
OHCI support.

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Migrate da850_am18xxevm]
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoARM: am3517_evm: Fix pin muxing to enable EHCI Host in the future
Adam Ford [Mon, 1 Jul 2019 14:33:39 +0000 (09:33 -0500)]
ARM: am3517_evm: Fix pin muxing to enable EHCI Host in the future

This patch enables the pinmuxing to support gpio_57 for phy reset
and fixes the pinmuxing for the ECHI tranceiver.  The clocks
don't appear to by fully enabled yet, so OMAP-EHCI on am3517 is
still not yet working, but we're one step closer.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: omap3_logic & omap35_logic: Disable OMAP EHCI for Torpedo
Adam Ford [Sun, 30 Jun 2019 22:30:50 +0000 (17:30 -0500)]
ARM: omap3_logic & omap35_logic: Disable OMAP EHCI for Torpedo

The OMAP35 and AM/DM37 Torpedo boards do not have a USB
tranceiver connected to the USB host port, so this patch
removes it from the defconfig files.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: omap3_logic: Enable OMAP EHCI support for SOM-LV Boards
Adam Ford [Sun, 30 Jun 2019 22:30:49 +0000 (17:30 -0500)]
ARM: omap3_logic: Enable OMAP EHCI support for SOM-LV Boards

The SOM-LV boards support the OMAP EHCI driver using port 2.
With the driver updated to support device tree, this patch sets
the corresponding pin muxing for the tranceiver as well as the
reset pin.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoMerge tag 'u-boot-imx-20190719' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Sat, 27 Jul 2019 13:35:05 +0000 (09:35 -0400)]
Merge tag 'u-boot-imx-20190719' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20190719

- CCF for i.MX6
- nandbcb command to write SPL into NAND
- Switch to DM (i.MX28)
- Boards: Toradex, engicam, DH
- Fixes for i.MX8
- Fixes for i.MX7ULP

Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504

5 years agoMerge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Sat, 27 Jul 2019 13:34:07 +0000 (09:34 -0400)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi

- fix for fsl_qspi read timeout (Thomas)
- spi-mem read data size fix (Ye Li)
- SiFive SPI driver, mmc_spi flags (Bhargav, Anup)
- Micron spi-nor parts (Ashish)
- MT7629 spi-mem driver(Weijie)

5 years agoARM: am3517-evm: Remove non-DM legacy code
Adam Ford [Tue, 25 Jun 2019 19:14:08 +0000 (14:14 -0500)]
ARM: am3517-evm: Remove non-DM legacy code

With both SPL and U-Boot now supporting DM, we can start removing
legacy code.  This patch removes the legacy MMC initalization and
legacy I2C initialization since both are now available via DM and
device tree.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: am3517-evm: Migrate to SPL_OF_CONTROL
Adam Ford [Mon, 24 Jun 2019 16:57:25 +0000 (11:57 -0500)]
ARM: am3517-evm: Migrate to SPL_OF_CONTROL

Like the other Logic PD OMAP35/DM37 boards, this board has device
tree enabled for U-Boot.  This patch converts the board to enable
SPL_OF_CONTROL and further shrinks the device tree in SPL to limit
it to UART3 (console), MMC1, i2c1, and GPIO4 (for mmc1 CD and WP).

There appears to be a bug in minicom so users may need to
switch the minicom terminal emulation to ANSI from VT102 due
to the junk that gets pushed out of the UART on startup.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: da850-evm: Remove repeated pinmuxing calls
Adam Ford [Sun, 23 Jun 2019 23:30:54 +0000 (18:30 -0500)]
ARM: da850-evm: Remove repeated pinmuxing calls

arch_cpu_init() initializes the pinmuxing which is called fairly
early in the start sequences, so the board_init function doesn't
need to do it again.  This patch removes the call from board_init.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: da850-evm: Remove duplicate UART initialization
Adam Ford [Sun, 23 Jun 2019 22:48:36 +0000 (17:48 -0500)]
ARM: da850-evm: Remove duplicate UART initialization

The Low Level init functions start the UART, so it doesn't need
to happen during board_init.  This patch removes it from
board_init.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: am3517-evm: Remove manual ethernet reset code
Adam Ford [Sun, 23 Jun 2019 05:42:14 +0000 (00:42 -0500)]
ARM: am3517-evm: Remove manual ethernet reset code

The reset line going to the ethernet controller is controlled
by a global reset controlling multiple peripherals.  There
is no need to manually invoke the reset.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: am3517-evm: Enable DM_PMIC and DM_REGULATOR functions
Adam Ford [Fri, 14 Jun 2019 14:06:48 +0000 (09:06 -0500)]
ARM: am3517-evm: Enable DM_PMIC and DM_REGULATOR functions

The PBIAS regulator is available on OMAP3's, and it's shared on
the AM35, so this patch enables that in U-Boot along with GPIO
based regulators.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values
Faiz Abbas [Thu, 20 Jun 2019 09:37:22 +0000 (15:07 +0530)]
ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values

Update the MMC2_HS200_MANUAL1 iodelay values to match with the latest
dra76x data manual[1].

Also this particular pinctrl-array is using spaces instead of tabs for
spacing between the values and the comments. Fix this as well.

[1] http://www.ti.com/lit/ds/symlink/dra76p.pdf

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoARM: dts: am57xx: Disable voltage switching for SD card
Faiz Abbas [Thu, 20 Jun 2019 09:37:21 +0000 (15:07 +0530)]
ARM: dts: am57xx: Disable voltage switching for SD card

If UHS speed modes are enabled, a compatible SD card switches down to 1.8V
during enumeration. If after this a software reboot/crash takes place and
on-chip ROM tries to enumerate the SD card, the difference in
IO voltages (host @ 3.3V and card @ 1.8V) may end up damaging the card.

The fix for this is to have support for power cycling the card in
hardware (with a PORz/soft-reset line causing a power cycle of the card).
Because the beaglebone X15 (rev A,B and C), am57xx-evms and am57xx-idks don't
have this capability, disable voltage switching for these boards.

The major effect of this is that the maximum supported speed mode is now
high speed(50 MHz) down from SDR104(200 MHz).

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoARM: dts: am574x-idk: Add pinmuxes for mmc1 and mmc2
Faiz Abbas [Thu, 20 Jun 2019 09:37:20 +0000 (15:07 +0530)]
ARM: dts: am574x-idk: Add pinmuxes for mmc1 and mmc2

Sync with kernel dts by adding pinmuxes for mmc1 and mmc2. This fixes an
issue where mmc2 (eMMC) was coming up in HS52 mode instead of the
highest DDR52 mode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoARM: dts: dra7-mmc-iodelay: Add a new pinctrl group for clk line without pullup
Faiz Abbas [Thu, 20 Jun 2019 09:37:19 +0000 (15:07 +0530)]
ARM: dts: dra7-mmc-iodelay: Add a new pinctrl group for clk line without pullup

During a short period when the bus voltage is switched from 3.3v to 1.8v,
(to enumerate UHS mode), the mmc module is disabled and the mmc IO lines
are kept in a state according to the programmed pad mux pull type.

According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications
Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the
host should hold CLK low for at least 5ms.

In order to keep the card line low during voltage switch, the pad mux of
mmc1_clk line should be configured to pull down.

Add a new pinctrl group for clock line without pullup to be used in boards
where mmc1_clk line is not connected to an external pullup.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoconfigs: j721e_evm_a72: Add initial support
Lokesh Vutla [Thu, 13 Jun 2019 04:59:57 +0000 (10:29 +0530)]
configs: j721e_evm_a72: Add initial support

Add initial defconfig support for J721e that runs on A72.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Add MAINTAINERS entry]
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoconfigs: j721e_evm_r5: Add initial support
Lokesh Vutla [Thu, 13 Jun 2019 04:59:56 +0000 (10:29 +0530)]
configs: j721e_evm_r5: Add initial support

Add initial defconfig support for J721e that runs on R5.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Add MAINTAINERS file]
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoarm: dts: k3-j721e: Add r5 specific dt support
Lokesh Vutla [Thu, 13 Jun 2019 04:59:55 +0000 (10:29 +0530)]
arm: dts: k3-j721e: Add r5 specific dt support

Add initial support for dt that runs on r5.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agoarm: dts: k3-j721e: Add initial support for common processor board
Lokesh Vutla [Thu, 13 Jun 2019 04:59:54 +0000 (10:29 +0530)]
arm: dts: k3-j721e: Add initial support for common processor board

Common Processor board is the baseboard that has most of the actual connectors,
power supply etc. A SOM (System on Module) is plugged on to the common
processor board and this contains the SoC, PMIC, DDR and basic highspeed
components necessary for functionality. Add initial dt support for this
common processor board.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoarm: dts: ti: Add Support for J721E SoC
Lokesh Vutla [Thu, 13 Jun 2019 04:59:53 +0000 (10:29 +0530)]
arm: dts: ti: Add Support for J721E SoC

Add initial SoC definition for J721E SoC.
Kernel dts posted here:
https://lore.kernel.org/lkml/20190522161921.20750-1-nm@ti.com/

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agodt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E
Lokesh Vutla [Thu, 13 Jun 2019 04:59:52 +0000 (10:29 +0530)]
dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E

Add pinctrl macros for J721E SoC. These macro definitions are
similar to that of AM6, but adding new definitions to avoid
any naming confusions in the soc dts files.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agommc: am654_sdhci: Separate J721E compatible into 8bit and 4bit versions
Faiz Abbas [Thu, 13 Jun 2019 04:59:51 +0000 (10:29 +0530)]
mmc: am654_sdhci: Separate J721E compatible into 8bit and 4bit versions

The j721e 4 bit instances don't have a hard DLL and therefore don't need
any DLL related configurations. Split the compatibles into an 8 bit and a
4 bit one. Add a private flags field which can be used to check if the
DLL is present and don't register the set_ios_post callback for the 4 bit
compatible instances.

Also update the compatibles in k3-j721e-main.dtsi to avoid breaking boot
with the new compatibles.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoboard: ti: j721e: Enable fixing up msmc sram node
Suman Anna [Thu, 13 Jun 2019 04:59:50 +0000 (10:29 +0530)]
board: ti: j721e: Enable fixing up msmc sram node

Create a ft_board_setup() api that gets called as part of
DT fixup before jumping to kernel. In this ft_board_setup()
call fdt_fixup_msmc_ram that update msmc sram node.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoboard: ti: j721e: Add board support for j721e evm
Lokesh Vutla [Thu, 13 Jun 2019 04:59:49 +0000 (10:29 +0530)]
board: ti: j721e: Add board support for j721e evm

Add board specific initialization for j721e evm

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agoarmv8: K3: j721e: Add custom MMU support
Suman Anna [Thu, 13 Jun 2019 04:59:48 +0000 (10:29 +0530)]
armv8: K3: j721e: Add custom MMU support

The A72 U-Boot code loads and boots a number of remote processors
including the C71x DSP, both the C66_0 and C66_1 DSPs, and the various
Main R5FSS Cores. Change the memory attributes for the DDR regions used
by the remote processors so that the cores can see and execute the
proper code.

A separate table based on the current AM65x table is added for J721E SoCs,
since the number of remote processors and their DDR usage will be different
between the two SoC families.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoarmv7R: K3: j721e: Load SYSFW binary and config from boot media
Andreas Dannenberg [Thu, 13 Jun 2019 04:59:47 +0000 (10:29 +0530)]
armv7R: K3: j721e: Load SYSFW binary and config from boot media

Use the System Firmware (SYSFW) loader framework to load and start
the SYSFW as part of the J721E early initialization sequence. While
at it also initialize the MCU_UART0 pinmux as it is used by SYSFW
to print diagnostic messages.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoarmv7R: K3: j721e: Shut down R5 core after ATF startup on A72
Lokesh Vutla [Thu, 13 Jun 2019 04:59:46 +0000 (10:29 +0530)]
armv7R: K3: j721e: Shut down R5 core after ATF startup on A72

Populate the release_resources_for_core_shutdown() api with
shutting down r5 cores so that it will by called just after
jumping to ATF.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoarmv7R: K3: j721e: Store boot index from ROM
Andreas Dannenberg [Thu, 13 Jun 2019 04:59:45 +0000 (10:29 +0530)]
armv7R: K3: j721e: Store boot index from ROM

Obtain the boot index as left behind by the device boot ROM and store
it in scratch pad SRAM for later use before it may get overwritten.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agoarmv7R: K3: j721e: Unlock all applicable control MMR registers
Andreas Dannenberg [Thu, 13 Jun 2019 04:59:44 +0000 (10:29 +0530)]
armv7R: K3: j721e: Unlock all applicable control MMR registers

To access various control MMR functionality the registers need to
be unlocked. Do that for all control MMR regions in the MCU and MAIN
domains. We may want to go back later and limit the unlocking that's
being done.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agoarmv7R: K3: j721e: Add support for boot device detection
Lokesh Vutla [Thu, 13 Jun 2019 04:59:43 +0000 (10:29 +0530)]
armv7R: K3: j721e: Add support for boot device detection

J721E allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, ROM stores a value at a particular
address. Add support for reading this information and determining
the boot media correctly.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoarm: K3: j721e: Add basic support for J721E SoC definition
Lokesh Vutla [Thu, 13 Jun 2019 04:59:42 +0000 (10:29 +0530)]
arm: K3: j721e: Add basic support for J721E SoC definition

The J721E SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable lower system costs
of automotive applications such as infotainment, cluster, premium
Audio, Gateway, industrial and a range of broad market applications.
This SoC is designed around reducing the system cost by eliminating
the need of an external system MCU and is targeted towards ASIL-B/C
certification/requirements in addition to allowing complex software
and system use-cases.

Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, three clusters of lockstep
  capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA),
  C7x floating point Vector DSP, Two C66x floating point DSPs.
* 3D GPU PowerVR Rogue 8XE GE8430
* Vision Processing Accelerator (VPAC) with image signal processor and Depth
  and Motion Processing Accelerator (DMPAC)
* Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual
  PRUs and dual RTUs
* Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and
  up to two DPI interfaces.
* Integrated Ethernet switch supporting up to a total of 8 external ports in
  addition to legacy Ethernet switch of up to 2 ports.
* System MMU (SMMU) Version 3.0 and advanced virtualisation
  capabilities.
* Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems,
  16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI,
  I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
  management.
* Configurable L3 Cache and IO-coherent architecture with high data throughput
  capable distributed DMA architecture under NAVSS
* Centralized System Controller for Security, Power, and Resource
  Management (DMSC)

See J721E Technical Reference Manual (SPRUIL1, May 2019)
for further details: http://www.ti.com/lit/pdf/spruil1

Add base support for J721E SoC

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
5 years agoremoteproc: k3_rproc: Rename to ti_k3_arm64_rproc
Lokesh Vutla [Fri, 7 Jun 2019 13:55:59 +0000 (19:25 +0530)]
remoteproc: k3_rproc: Rename to ti_k3_arm64_rproc

k3_rproc driver is specifically meant for controlling an arm64
core using TISCI protocol. So rename the driver, Kconfig symbol,
compatible and functions accordingly.

While at it drop this remoteproc selection for a53 defconfig.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoremoteproc: k3_rproc: Update the driver to use ti_sci_proc helpers
Lokesh Vutla [Fri, 7 Jun 2019 13:55:58 +0000 (19:25 +0530)]
remoteproc: k3_rproc: Update the driver to use ti_sci_proc helpers

Update the k3_rproc driver to use the generic ti_sci_proc helper
apis which simplifies the driver a bit.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoremoteproc: tisci: add TI-SCI processor control helper functions
Lokesh Vutla [Fri, 7 Jun 2019 13:55:57 +0000 (19:25 +0530)]
remoteproc: tisci: add TI-SCI processor control helper functions

Texas Instruments' K3 generation SoCs has specific modules/register
spaces used for configuring the various aspects of a remote processor.
These include power, reset, boot vector and other configuration features
specific to each compute processor present on the SoC. These registers
are managed by the System Controller such as DMSC on K3 AM65x SoCs.

The Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is used to communicate to the System Controller from various compute
processors to invoke specific services provided by the firmware running
on the System Controller.

Add a common processor control interface header file that can be used by
multiple remoteproc drivers. The helper functions within this header file
abstract the various TI SCI protocol ops for the remoteproc drivers, and
allow them to request the System Controller to be able to program and
manage various remote processors on the SoC. The common macros required
by the R5 remoteproc driver were also added. The remoteproc drivers are
expected to manage the life-cycle of their ti_sci_proc_dev local
structures.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
5 years agocmd: remoteproc: Allow list command to print the probed devices
Lokesh Vutla [Fri, 7 Jun 2019 13:55:56 +0000 (19:25 +0530)]
cmd: remoteproc: Allow list command to print the probed devices

'rproc list' is currently allowed only after probing all the
available remoteproc devices. Given that 'rproc init' is updated
to probe and initialize devices individually, allow the 'rproc list'
command to print all probed devices at any point.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agocmd: remoteproc: Add support for initializing devices individually
Lokesh Vutla [Fri, 7 Jun 2019 13:55:55 +0000 (19:25 +0530)]
cmd: remoteproc: Add support for initializing devices individually

'rproc init' does the probe and initialization of all the available
remoteproc devices in the system. This doesn't allow the flexibility
to initialize the remote cores needed as per use case. In order
to provide flexibility, update 'rproc init' command to accept one
more parameter with rproc id which when passed initializes only
that specific core. If no id is passed, command will initializes
all the cores which is compatible with the existing behaviour.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoarm: dts: k3-am654: Update power-domains property for each node
Lokesh Vutla [Fri, 7 Jun 2019 13:54:47 +0000 (19:24 +0530)]
arm: dts: k3-am654: Update power-domains property for each node

Update the power-domain-cells to 2 and add the permissions
to each node. Mark the following nodes accessed by r5 as shared:
- DDR node
- main uart 0

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agopower: domain: ti_sci_power_domains: Add support for exclusive and shared access
Lokesh Vutla [Fri, 7 Jun 2019 13:54:46 +0000 (19:24 +0530)]
power: domain: ti_sci_power_domains: Add support for exclusive and shared access

TISCI protocol supports for enabling the device either with exclusive
permissions for the requesting host or with sharing across the hosts.
There are certain devices which are exclusive to Linux context and
there are certain devices that are shared across different host contexts.
So add support for getting this information from DT by increasing
the power-domain cells to 2.

For keeping the DT backward compatibility intact, defaulting the
device permissions to set the exclusive flag set. In this case the
power-domain-cells is 1.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agodt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access
Lokesh Vutla [Fri, 7 Jun 2019 13:54:45 +0000 (19:24 +0530)]
dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access

TISCI protocol supports for enabling the device either with exclusive
permissions for the requesting host or with sharing across the hosts.
There are certain devices which are exclusive to Linux context and
there are certain devices that are shared across different host contexts.
So add support for getting this information from DT by increasing
the power-domain cells to 2.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agopower-domain: Add private data to power domain
Lokesh Vutla [Fri, 7 Jun 2019 13:54:44 +0000 (19:24 +0530)]
power-domain: Add private data to power domain

Certain drivers want to attach private data corresponding to each
power domain. This data might be specific be to the drvier. So add
a priv entry into the power_domain structure.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoarmv7R: k3: Release all the exclusive devices
Lokesh Vutla [Fri, 7 Jun 2019 13:54:43 +0000 (19:24 +0530)]
armv7R: k3: Release all the exclusive devices

Release all the exclusive devices held by SPL.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoarmv7R: K3: am654: Shut down R5 core after ATF startup on A53
Andreas Dannenberg [Fri, 7 Jun 2019 13:54:42 +0000 (19:24 +0530)]
armv7R: K3: am654: Shut down R5 core after ATF startup on A53

Rather than simply parking the R5 core in WFE after starting up ATF
on A53 instead use SYSFW API to properly shut down the R5 CPU cores
as well as associated timer resources that were pre-allocated. This
allows software further downstream to properly and gracefully bring
the R5 cores back online if desired.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agofirmware: ti_sci: Add a command for releasing all exclusive devices
Lokesh Vutla [Fri, 7 Jun 2019 13:54:41 +0000 (19:24 +0530)]
firmware: ti_sci: Add a command for releasing all exclusive devices

Any host while requesting for a device can request for its exclusive
access. If an exclusive permission is obtained then it is the host's
responsibility to release the device before the software entity on
the host completes its execution. Else any other host's request for
the device will be nacked. So add a command that releases all the
exclusive devices that is acquired by the current host. This should
be used with utmost care and can be called only at the end of the
execution.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agofirmware: ti_sci: Add processor shutdown API method
Andreas Dannenberg [Fri, 7 Jun 2019 13:54:40 +0000 (19:24 +0530)]
firmware: ti_sci: Add processor shutdown API method

Add and expose a new processor shutdown API that wraps the two TISCI
messages involved in initiating a core shutdown. The API will first
queue a message to have the DMSC wait for a certain processor boot
status to happen followed by a message to trigger the actual shutdown-
with both messages being sent without waiting or requesting for a
response. Note that the processor shutdown API call will need to be
followed up by user software placing the respective core into either
WFE or WFI mode.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agofirmware: ti_sci: Allow for device shared and exclusive requests
Lokesh Vutla [Fri, 7 Jun 2019 13:54:39 +0000 (19:24 +0530)]
firmware: ti_sci: Allow for device shared and exclusive requests

Sysfw provides an option for requesting exclusive access for a
device using the flags MSG_FLAG_DEVICE_EXCLUSIVE. If this flag is
not used, the device is meant to be shared across hosts. Once a device
is requested from a host with this flag set, any request to this
device from a different host will be nacked by sysfw. Current tisci
driver enables this flag for every device requests. But this may not
be true for all the devices. So provide a separate commands in driver
for exclusive and shared device requests.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-net
Tom Rini [Thu, 25 Jul 2019 19:02:36 +0000 (15:02 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-net

- DaVinci emac DM work
- NXP driver work
- macb updates for RISC-V

5 years agonet: sun8i_emac: Test the correct phy
Emmanuel Vadot [Fri, 19 Jul 2019 20:26:38 +0000 (22:26 +0200)]
net: sun8i_emac: Test the correct phy

H3/H5 can either use the internal phy or an external one.
Before getting clock and resets for the internal phy,
test that we are using it because otherwise it break emac
when using an external phy.

Tested-on: OrangePi PC2 (H5)
Fixes: 2348453c41 (net: sun8i_emac: Add EPHY CLK and RESET support)
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: davinci_emac: convert to using the driver model
Bartosz Golaszewski [Wed, 24 Jul 2019 08:12:07 +0000 (10:12 +0200)]
net: davinci_emac: convert to using the driver model

Now that we removed all legacy boards selecting TI_EMAC we can
completely convert the driver code to using the driver model.
This patch also updates all remaining users of davinci_emac.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm & da850-evm
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
5 years agoriscv: sifive: fu540: Sync-up config header with RISC-V QEMU support
Anup Patel [Wed, 24 Jul 2019 04:09:44 +0000 (04:09 +0000)]
riscv: sifive: fu540: Sync-up config header with RISC-V QEMU support

We typically use same set of distro images (yocto, debian, fedora, etc.)
on both QEMU RISC-V virt machine and SiFive Unleashed board.

With growing kernel and ramdisk images, we need to re-adjust default
U-Boot environment variables. The config header for QEMU RISC-V virt
machine has been already updated to handle bigger kernel and ramdisk
images hence this patch updates SiFive FU540 config header accordingly.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
5 years agonet: macb: Fix check for little-endian system in gmac_configure_dma()
Anup Patel [Wed, 24 Jul 2019 04:09:37 +0000 (04:09 +0000)]
net: macb: Fix check for little-endian system in gmac_configure_dma()

Instead of depending on CONFIG_SYS_LITTLE_ENDIAN, we check at runtime
whether underlying system is little-endian or big-endian. This way
we are not dependent on any U-Boot specific OR compiler specific macro
to check system endianness.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: macb: Extend MACB driver for SiFive Unleashed board
Anup Patel [Wed, 24 Jul 2019 04:09:32 +0000 (04:09 +0000)]
net: macb: Extend MACB driver for SiFive Unleashed board

The SiFive MACB ethernet has a custom TX_CLK_SEL register to select
different TX clock for 1000mbps vs 10/100mbps.

This patch adds SiFive MACB compatible string and extends the MACB
ethernet driver to change TX clock using TX_CLK_SEL register for
SiFive MACB.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoAdd support for the NXP LS1021A-TSN board
Jianchao Wang [Thu, 18 Jul 2019 21:30:01 +0000 (00:30 +0300)]
Add support for the NXP LS1021A-TSN board

The LS1021A-TSN is a development board built by VVDN/Argonboards in
partnership with NXP.

It features the LS1021A SoC and the first-generation SJA1105T Ethernet
switch for prototyping implementations of a subset of IEEE 802.1 TSN
standards.

Supported boot media: microSD card (via SPL), QSPI flash.

Rev. A of the board uses a Spansion S25FL512S_256K serial flash, which
is 64 MB in size and has an erase sector size of 256KB (therefore,
flashing the RCW would erase part of U-Boot).

Rev. B and C of the board use a Spansion S25FL256S1 serial flash, which
is only 32 MB in size but has an erase sector size of 64KB (therefore
the RCW image can be flashed without erasing U-Boot).

To avoid the problems above, the U-Boot base address has been selected
at 0x100000 (the start of the 5th 256KB erase sector), which works for
all board revisions. Actually 0x40000 would have been enough, but
0x100000 is common for all Layerscape devices.

eTSEC3 is connecting directly to SJA1105 via an RGMII fixed-link, but
SJA1105 is currently not supported by uboot. Therefore, eTSEC3 is
disabled.

Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Jianchao Wang <jianchao.wang@nxp.com>
Signed-off-by: Changming Huang <jerry.huang@nxp.com>
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
[Vladimir] Code taken from https://github.com/openil/u-boot (which
itself is mostly copied from ls1021a-iot) and adapted with the following
changes:

- Add a008850 errata workaround
- Converted eTSEC, MMC to DM to avoid all build warnings
- Plugged in distro boot feature, including support for extlinux.conf
- Added defconfig for QSPI boot
- Added the board/freescale/ls1021atsn/README.rst for initial setup
- Increased CONFIG_SYS_MONITOR_LEN so that the SPL malloc pool does not
  get overwritten during copying of the u-boot.bin payload from MMC to
  DDR.
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoconfigs: ls1021atwr: Fix distro_bootcmd for QSPI boot
Vladimir Oltean [Thu, 18 Jul 2019 21:30:00 +0000 (00:30 +0300)]
configs: ls1021atwr: Fix distro_bootcmd for QSPI boot

Due to a typo, "run qspi_bootcmd" and "env exists secureboot" got
concatenated instead of being separated by a semicolon.

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoarm: ls1021atwr: Convert to use driver model TSEC driver
Bin Meng [Thu, 18 Jul 2019 21:29:59 +0000 (00:29 +0300)]
arm: ls1021atwr: Convert to use driver model TSEC driver

Now that we have added driver model support to the TSEC driver,
convert ls1021atwr board to use it.

This depends on previous DM series for ls1021atwr:
http://patchwork.ozlabs.org/patch/561855/

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
[Vladimir] Made the following changes:
- Added 'status = "disabled";' for all Ethernet ports in ls1021a.dtsi
- Fixed the confusion between the SGMII/TBI PCS for enet0 and enet1 -
  a mistake ported over from Linux. Each SGMII PCS lies on the private
  MDIO bus of the interface (and the RGMII enet2 has no SGMII PCS).
- Added CONFIG_DM_ETH to all ls1021atwr_* defconfigs
- Completely removed non-DM_ETH support from ls1021atwr
- Changed "compatible" string from "fsl,tsec-mdio" to "fsl,etsec2-mdio"
  and from "fsl,tsec" to "fsl,etsec2" to match Linux

5 years agonet: tsec: Change compatible strings to match Linux
Vladimir Oltean [Thu, 18 Jul 2019 21:29:58 +0000 (00:29 +0300)]
net: tsec: Change compatible strings to match Linux

In the case of the tsec network driver, so far there has been no
mainline user of DM_ETH where the DT bindings get used.

In the case of the mdio bus, it looks like the "fsl,tsec-mdio" string
was made up for the documentation, but there is no mainline code that
parses the "compatible" property anyway.

In both cases, there are no DT blobs that contain the old strings.

So change the documentation to "fsl,etsec2" for the Ethernet ports and
"fsl,etsec2-mdio" for the MDIO buses, which are strings that Linux also
uses, at least for LS1021A.  More compatible strings can be added once
other (PowerPC) SoCs are migrated to DM_ETH.

The current ls1021a.dtsi doesn't match what was documented for the MDIO
buses anyway (the "compatible" is "gianfar" currently). This will be
fixed in the next patch.

Fixes: 69a00875e3db ("doc: dt-bindings: Describe Freescale TSEC ethernet controller")
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: tsec: Common handling of MAC station address for DM_ETH
Vladimir Oltean [Thu, 18 Jul 2019 21:29:57 +0000 (00:29 +0300)]
net: tsec: Common handling of MAC station address for DM_ETH

In tsec_init, the MAC address is retrieved from 2 different structures
depending on whether DM_ETH is enabled or not.

But since the field name is the same inside both structures, we can
conditionally define the structure of the correct type and simplify the
assignments.

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agonet: tsec: Make errors visible
Vladimir Oltean [Thu, 18 Jul 2019 21:29:56 +0000 (00:29 +0300)]
net: tsec: Make errors visible

This replaces debug() calls with printf() so that it is immediately
obvious from the console that something is wrong.

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agonet: tsec: Reverse Christmas tree notation
Vladimir Oltean [Thu, 18 Jul 2019 21:29:55 +0000 (00:29 +0300)]
net: tsec: Reverse Christmas tree notation

This is a cosmetic patch that reorders variable definitions in the
inverse order of their line length, where possible.

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agonet: tsec: Fix offset of MDIO registers for DM_ETH
Vladimir Oltean [Thu, 18 Jul 2019 21:29:54 +0000 (00:29 +0300)]
net: tsec: Fix offset of MDIO registers for DM_ETH

By convention, the eTSEC MDIO controller nodes are defined in DT at
0x2d24000 and 0x2d50000, but actually U-Boot does not touch the
interrupt portion of the register map (MDIO_IEVENTM, MDIO_IMASKM,
MDIO_EMAPM).

That leaves only the MDIO bus registers (MDIO_MIIMCFG, MDIO_MIIMCOM,
MDIO_MIIMADD, MDIO_MIIMADD, MDIO_MIIMCON, MDIO_MIIMSTAT) which start at
the 0x520 offset.

So shift the DT-defined register map by the offset of MDIO_MIIMCFG when
mapping the MDIO bus registers.

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agonet: tsec: Refactor the readout of the tbi-handle property
Vladimir Oltean [Thu, 18 Jul 2019 21:29:53 +0000 (00:29 +0300)]
net: tsec: Refactor the readout of the tbi-handle property

The point of this patch is to eliminate the use of the locally-defined
"reg" variable (which interferes with next patch) and simplify the
fallback to the default CONFIG_SYS_TBIPA_VALUE in case "tbi-handle" is
missing.

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agonet/macb: increase RX buffer size for GEM
Ramon Fried [Sun, 14 Jul 2019 15:25:14 +0000 (18:25 +0300)]
net/macb: increase RX buffer size for GEM

Macb Ethernet controller requires a RX buffer of 128 bytes. It is
highly sub-optimal for Gigabit-capable GEM that is able to use
a bigger DMA buffer. Change this constant and associated macros
with data stored in the private structure.
RX DMA buffer size has to be multiple of 64 bytes as indicated in
DMA Configuration Register specification.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: macb: apply sane DMA configuration
Ramon Fried [Tue, 16 Jul 2019 19:04:36 +0000 (22:04 +0300)]
net: macb: apply sane DMA configuration

DMA configuration was heavily dependent on the HW
defaults, add function to properly set the required
fields, including the new dma_burst_length.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: macb: add dma_burst_length config
Ramon Fried [Tue, 16 Jul 2019 19:04:35 +0000 (22:04 +0300)]
net: macb: add dma_burst_length config

GEM support higher DMA burst writes/reads than the default (4).
add configuration structure with dma burst length so it could be
applied later to DMA configuration.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: macb: add support for SGMII phy interface
Ramon Fried [Tue, 16 Jul 2019 19:04:34 +0000 (22:04 +0300)]
net: macb: add support for SGMII phy interface

This patch adds support for the sgmii phy interface,
available only to DM users, dictated by current driver
design.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: macb: use bit access macro from header file
Ramon Fried [Tue, 16 Jul 2019 19:04:33 +0000 (22:04 +0300)]
net: macb: use bit access macro from header file

macb.h provides macros for reading/setting bitfields,
in macb registers and descriptors. use that instead
of redefining them in the source file.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: macb: add support for faster clk rates
Ramon Fried [Tue, 16 Jul 2019 19:04:32 +0000 (22:04 +0300)]
net: macb: add support for faster clk rates

add support for clock rates higher than 2.4Mhz

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: macb: sync header definitions as taken from Linux
Ramon Fried [Tue, 16 Jul 2019 19:03:00 +0000 (22:03 +0300)]
net: macb: sync header definitions as taken from Linux

Few registers and bits were added by Cadence and
they were not updated in the headers.
Take the latest definitions as defined in Linux
header (5.1) that also includes some comments
about existing registers.

One register was improperly named (UR), fix that.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agodoc: bindings: Add binding for register driven MDIO muxes
Alex Marginean [Tue, 16 Jul 2019 08:21:18 +0000 (11:21 +0300)]
doc: bindings: Add binding for register driven MDIO muxes

This binding documents two properties that describe the registers used to
perform MUX selection.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agodrivers: net: driver for MDIO muxes controlled over I2C
Alex Marginean [Tue, 16 Jul 2019 08:21:17 +0000 (11:21 +0300)]
drivers: net: driver for MDIO muxes controlled over I2C

This driver is used for MDIO muxes driven over I2C.  This is currently
used on Freescale LS1028A QDS board, on which the physical MDIO MUX is
controlled by an on-board FPGA which in turn is configured through I2C.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agonet: designware: use 'phy_connect' instead of open coded
Simon Goldschmidt [Mon, 15 Jul 2019 19:53:05 +0000 (21:53 +0200)]
net: designware: use 'phy_connect' instead of open coded

Using 'phy_connect' instead of 'phy_find_by_mask' and 'phy_connect_dev'
both deduplicates code and adds support for 'fixed-link'.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agodrivers: net: fsl_enetc: add support for SGMII 2500
Alex Marginean [Mon, 15 Jul 2019 08:48:47 +0000 (11:48 +0300)]
drivers: net: fsl_enetc: add support for SGMII 2500

SGMII 2500 as supported on NXP SoCs requires AN to be disabled, handle
this case in the enetc sgmii init code.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoconfigs: ls1028a: enable networking options in rdb, qds defconfig
Alex Marginean [Wed, 3 Jul 2019 09:11:44 +0000 (12:11 +0300)]
configs: ls1028a: enable networking options in rdb, qds defconfig

Enables ethernet, MDIO, PHY drivers for LS1028A RDB and QDS.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoarm: dts: ls1028a updates for network interfaces
Alex Marginean [Wed, 3 Jul 2019 09:11:43 +0000 (12:11 +0300)]
arm: dts: ls1028a updates for network interfaces

Defines LS1028A RDB SGMII port, QDS RGMII port.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agodrivers: net: apply serdes configuration for ENETC Ethernet interfaces
Alex Marginean [Wed, 3 Jul 2019 09:11:42 +0000 (12:11 +0300)]
drivers: net: apply serdes configuration for ENETC Ethernet interfaces

Ethernet interfaces using serial protocols go through the serdes block
integrated in the SoC.  This is accessed over dedicated internal MDIOs
which are part of the Ethernet PCI functions.  Set up serdes at _start,
along with other protocol specific port/MAC configuration.
MDIO code is shared with enetc_mdio, read/write functions are exported
from fsl_enetc_mdio for this reason.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agodrivers: net: add NXP ENETC MDIO driver
Alex Marginean [Wed, 3 Jul 2019 09:11:41 +0000 (12:11 +0300)]
drivers: net: add NXP ENETC MDIO driver

Adds a driver for the MDIO interface currently integrated in LS1028A SoC.
This MDIO interface is shared by multiple ethernet interfaces and is
presented as a stand-alone PCI function on the SoC ECAM.
Ethernet has a functional dependency on MDIO, for simplicity there is a
single config option for both.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agodrivers: net: add NXP ENETC ethernet driver
Alex Marginean [Wed, 3 Jul 2019 09:11:40 +0000 (12:11 +0300)]
drivers: net: add NXP ENETC ethernet driver

Adds a driver for NXP ENETC ethernet controller currently integrated in
LS1028A.  ENETC is a fairly straight-forward BD ring device and interfaces
are presented as PCI EPs on the SoC ECAM.

Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com>
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoinclude: configs: ls1028a: set SYS_RX_ETH_BUFFER to 8
Alex Marginean [Wed, 3 Jul 2019 09:11:39 +0000 (12:11 +0300)]
include: configs: ls1028a: set SYS_RX_ETH_BUFFER to 8

LS1028A ethernet interfaces work with at least 8 BDs, set number of buffers
to match that.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agospi: Drop obsolete mtk_qspi driver references
Weijie Gao [Mon, 22 Jul 2019 11:39:42 +0000 (17:09 +0530)]
spi: Drop obsolete mtk_qspi driver references

Since u-boot has added the spi-mem framework and replaced
the spi-nor framework, the mtk_qspi is no longer compatible
with the new spi-nor driver.

Remove this driver along with replacing config item
with new mtk spi-nor driver.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
[jagan: squash related changes and update commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agospi: add spi-mem driver for MediaTek MT7629 SoC
Weijie Gao [Mon, 22 Jul 2019 11:39:01 +0000 (17:09 +0530)]
spi: add spi-mem driver for MediaTek MT7629 SoC

This patch adds spi-mem driver for MediaTek MT7629 SoC
to access SPI-NOR and SPI-NAND flashes.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
[jagan: squash MAINTAINERS file]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agogitlab-ci: Update Docker image to xenial-20190720-24Jul2019 tag
Tom Rini [Wed, 24 Jul 2019 15:29:47 +0000 (11:29 -0400)]
gitlab-ci: Update Docker image to xenial-20190720-24Jul2019 tag

- Add in lzma-alone for current binman tests
- Update to Ubuntu's xenial-20190720 tag (latest).

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agogitlab-ci: Add pyelftools to the binman testsuite section
Tom Rini [Wed, 24 Jul 2019 17:14:56 +0000 (13:14 -0400)]
gitlab-ci: Add pyelftools to the binman testsuite section

We need pyelftools here to run rather than skip some tests.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoMerge tag 'dm-pull-24jul19-take3' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
Tom Rini [Wed, 24 Jul 2019 20:24:50 +0000 (16:24 -0400)]
Merge tag 'dm-pull-24jul19-take3' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

Minor driver-model fixes and tweaks
A few device-tree fixes
Binman support for extracting files from an image

5 years agodm: device: make power domain calls optional
Anatolij Gustschin [Sun, 14 Jul 2019 19:11:01 +0000 (21:11 +0200)]
dm: device: make power domain calls optional

Reduce power domain calls when CONFIG_POWER_DOMAIN is disabled.
With gcc v8.2, this change saves 104 bytes.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
5 years agobuildman: fix invocation examples typos
Baruch Siach [Thu, 11 Jul 2019 09:57:41 +0000 (12:57 +0300)]
buildman: fix invocation examples typos

Also, make command line example indentation consistent.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
5 years agoclk: initialize clk->data when using default xlate
Sekhar Nori [Thu, 11 Jul 2019 09:00:24 +0000 (14:30 +0530)]
clk: initialize clk->data when using default xlate

Right now when using clk_of_xlate_default(), clk->data
remains un-initialized because clk_get_bulk() does not
initialize memory on allocation of clock structure.

This can cause problems when data is used to match if
two clocks pointers are exactly the same underlying
clocks, for example.

Fix it by initializing clk->data to 0.

Suggested-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
5 years agodm: uclass: fix comment copy/paste error
Baruch Siach [Thu, 11 Jul 2019 08:23:44 +0000 (11:23 +0300)]
dm: uclass: fix comment copy/paste error

The uclass_next_device() routine continues a previously started device
iteration. Change the description that is copied from
uclass_first_device().

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agocommon: fdt_support: Add missing cpu_to_fdt32() to fdt_pci_dma_ranges()
Marek Vasut [Tue, 9 Jul 2019 00:49:29 +0000 (02:49 +0200)]
common: fdt_support: Add missing cpu_to_fdt32() to fdt_pci_dma_ranges()

The fdt_pci_dma_ranges() cannot work on e.g. ARM, since the DT entries
endianness is not adjusted at all. Fix this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
5 years agodm: Fix parameter description of dev_read_name()
Bin Meng [Fri, 5 Jul 2019 16:23:18 +0000 (09:23 -0700)]
dm: Fix parameter description of dev_read_name()

The comments of dev_read_name() wrongly describe "node" as its
parameter.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agodm: core: Set correct "status" value for a node
Bin Meng [Fri, 5 Jul 2019 16:23:17 +0000 (09:23 -0700)]
dm: core: Set correct "status" value for a node

Per device tree spec, "status" property can have a value of "okay",
or "disabled", but not "disable".

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agodm: core: Call clk_set_defaults() during probe() only for a valid ofnode
Bin Meng [Fri, 5 Jul 2019 16:23:16 +0000 (09:23 -0700)]
dm: core: Call clk_set_defaults() during probe() only for a valid ofnode

Without a valid ofnode, it's meaningless to call clk_set_defaults()
to process various properties.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agodm: timer: Skip device that does not have a valid ofnode in pre_probe()
Bin Meng [Fri, 5 Jul 2019 16:23:15 +0000 (09:23 -0700)]
dm: timer: Skip device that does not have a valid ofnode in pre_probe()

It is possible that a timer device has a null ofnode, hence there is
no need to further parse DT for the clock rate.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>