arm: ls1021atwr: Convert to use driver model TSEC driver
authorBin Meng <bmeng.cn@gmail.com>
Thu, 18 Jul 2019 21:29:59 +0000 (00:29 +0300)
committerJoe Hershberger <joe.hershberger@ni.com>
Thu, 25 Jul 2019 18:13:31 +0000 (13:13 -0500)
Now that we have added driver model support to the TSEC driver,
convert ls1021atwr board to use it.

This depends on previous DM series for ls1021atwr:
http://patchwork.ozlabs.org/patch/561855/

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
[Vladimir] Made the following changes:
- Added 'status = "disabled";' for all Ethernet ports in ls1021a.dtsi
- Fixed the confusion between the SGMII/TBI PCS for enet0 and enet1 -
  a mistake ported over from Linux. Each SGMII PCS lies on the private
  MDIO bus of the interface (and the RGMII enet2 has no SGMII PCS).
- Added CONFIG_DM_ETH to all ls1021atwr_* defconfigs
- Completely removed non-DM_ETH support from ls1021atwr
- Changed "compatible" string from "fsl,tsec-mdio" to "fsl,etsec2-mdio"
  and from "fsl,tsec" to "fsl,etsec2" to match Linux

13 files changed:
arch/arm/cpu/armv7/ls102xa/cpu.c
arch/arm/cpu/armv7/ls102xa/fdt.c
arch/arm/dts/ls1021a-twr.dtsi
arch/arm/dts/ls1021a.dtsi
board/freescale/ls1021atwr/ls1021atwr.c
configs/ls1021atwr_nor_SECURE_BOOT_defconfig
configs/ls1021atwr_nor_defconfig
configs/ls1021atwr_nor_lpuart_defconfig
configs/ls1021atwr_qspi_defconfig
configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
configs/ls1021atwr_sdcard_ifc_defconfig
configs/ls1021atwr_sdcard_qspi_defconfig
include/configs/ls1021atwr.h

index ecf9e869855e5ba0fa707514ac9a975bc9fcd503..9ccfe1042ce532f4c720c63dea7f64ed535c880c 100644 (file)
@@ -296,7 +296,7 @@ int cpu_mmc_init(bd_t *bis)
 
 int cpu_eth_init(bd_t *bis)
 {
-#ifdef CONFIG_TSEC_ENET
+#if defined(CONFIG_TSEC_ENET) && !defined(CONFIG_DM_ETH)
        tsec_standard_init(bis);
 #endif
 
index 8bf9c42b2260870e6cf0cc308e22f8dcbba3ab74..1aadffff5991954edc7a56ff8a10babdc5a5c047 100644 (file)
 #include <tsec.h>
 #include <asm/arch/immap_ls102xa.h>
 #include <fsl_sec.h>
+#include <dm.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 void ft_fixup_enet_phy_connect_type(void *fdt)
 {
+#ifdef CONFIG_DM_ETH
+       struct udevice *dev;
+#else
        struct eth_device *dev;
+#endif
        struct tsec_private *priv;
        const char *enet_path, *phy_path;
        char enet[16];
@@ -29,7 +34,12 @@ void ft_fixup_enet_phy_connect_type(void *fdt)
        int phy_node;
        int i = 0;
        uint32_t ph;
+#ifdef CONFIG_DM_ETH
+       char *name[3] = { "ethernet@2d10000", "ethernet@2d50000",
+                         "ethernet@2d90000" };
+#else
        char *name[3] = { "eTSEC1", "eTSEC2", "eTSEC3" };
+#endif
 
        for (; i < ARRAY_SIZE(name); i++) {
                dev = eth_get_dev_by_name(name[i]);
index 5d3275ced913e1b49b4ae2b23c89c25bdcb414bc..27c96f95400ae4c586ffabc977c7ad9626093d0d 100644 (file)
        };
 };
 
+&enet0 {
+       tbi-handle = <&tbi0>;
+       phy-handle = <&sgmii_phy2>;
+       phy-connection-type = "sgmii";
+       status = "okay";
+};
+
+&enet1 {
+       tbi-handle = <&tbi1>;
+       phy-handle = <&sgmii_phy0>;
+       phy-connection-type = "sgmii";
+       status = "okay";
+};
+
+&enet2 {
+       phy-handle = <&rgmii_phy1>;
+       phy-connection-type = "rgmii-id";
+       status = "okay";
+};
+
 &i2c0 {
        status = "okay";
 };
        sgmii_phy0: ethernet-phy@0 {
                reg = <0x0>;
        };
+
        rgmii_phy1: ethernet-phy@1 {
                reg = <0x1>;
        };
+
        sgmii_phy2: ethernet-phy@2 {
                reg = <0x2>;
        };
+
+       /* SGMII PCS for enet0 */
+       tbi0: tbi-phy@1f {
+               reg = <0x1f>;
+               device_type = "tbi-phy";
+       };
+};
+
+&mdio1 {
+       /* SGMII PCS for enet1 */
        tbi1: tbi-phy@1f {
                reg = <0x1f>;
                device_type = "tbi-phy";
index 7fb24ab68787349f7e132a2e33602e2d35aeeebb..e419d9c44fcb008fd39541857179a2d99dca5870 100644 (file)
                                 <&platform_clk 1>;
                };
 
+               enet0: ethernet@2d10000 {
+                       compatible = "fsl,etsec2";
+                       reg = <0x2d10000 0x1000>;
+                       status = "disabled";
+               };
+
+               enet1: ethernet@2d50000 {
+                       compatible = "fsl,etsec2";
+                       reg = <0x2d50000 0x1000>;
+                       status = "disabled";
+               };
+
+               enet2: ethernet@2d90000 {
+                       compatible = "fsl,etsec2";
+                       reg = <0x2d90000 0x1000>;
+                       status = "disabled";
+               };
+
                mdio0: mdio@2d24000 {
-                       compatible = "gianfar";
-                       device_type = "mdio";
+                       compatible = "fsl,etsec2-mdio";
+                       reg = <0x2d24000 0x4000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               mdio1: mdio@2d64000 {
+                       compatible = "fsl,etsec2-mdio";
+                       reg = <0x2d64000 0x4000>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       reg = <0x2d24000 0x4000>;
                };
 
                usb@8600000 {
index 01ba1bc962138386f46338252a3afcec6744d1c9..fcf2ec97889ddc299fa469000ea7adcb944cd6d6 100644 (file)
@@ -248,44 +248,6 @@ int board_mmc_init(bd_t *bis)
 
 int board_eth_init(bd_t *bis)
 {
-#ifdef CONFIG_TSEC_ENET
-       struct fsl_pq_mdio_info mdio_info;
-       struct tsec_info_struct tsec_info[4];
-       int num = 0;
-
-#ifdef CONFIG_TSEC1
-       SET_STD_TSEC_INFO(tsec_info[num], 1);
-       if (is_serdes_configured(SGMII_TSEC1)) {
-               puts("eTSEC1 is in sgmii mode.\n");
-               tsec_info[num].flags |= TSEC_SGMII;
-       }
-       num++;
-#endif
-#ifdef CONFIG_TSEC2
-       SET_STD_TSEC_INFO(tsec_info[num], 2);
-       if (is_serdes_configured(SGMII_TSEC2)) {
-               puts("eTSEC2 is in sgmii mode.\n");
-               tsec_info[num].flags |= TSEC_SGMII;
-       }
-       num++;
-#endif
-#ifdef CONFIG_TSEC3
-       SET_STD_TSEC_INFO(tsec_info[num], 3);
-       tsec_info[num].interface = PHY_INTERFACE_MODE_RGMII_ID;
-       num++;
-#endif
-       if (!num) {
-               printf("No TSECs initialized\n");
-               return 0;
-       }
-
-       mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
-       mdio_info.name = DEFAULT_MII_NAME;
-       fsl_pq_mdio_init(bis, &mdio_info);
-
-       tsec_eth_init(bis, tsec_info, num);
-#endif
-
        return pci_eth_init(bis);
 }
 
index 6c4bb9aaf665a186e9dcae2323251daa56d20f43..830affc925b50572310667da0a19e51fb6fee88e 100644 (file)
@@ -40,7 +40,9 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_DM_ETH=y
 CONFIG_TSEC_ENET=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
index 9d8c2024c04eaeb33c8fc9f6b1770c72ac05c3a3..c4d18c6f6907565d29e6d34b9e7ad1d707c17b0b 100644 (file)
@@ -40,7 +40,9 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_DM_ETH=y
 CONFIG_TSEC_ENET=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
index b9cfdb6fd69e6a601e5131ab30b4d79f265454e6..b74d58a3487c77e28df4df5f8c7645ceb43a850c 100644 (file)
@@ -42,7 +42,9 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_DM_ETH=y
 CONFIG_TSEC_ENET=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
index 8c27c5908cb5e2497c47af332f09fd73061ffb31..911061a37881ec296812ba026b15593a5cd10e4b 100644 (file)
@@ -42,7 +42,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_DM_ETH=y
 CONFIG_TSEC_ENET=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
index 979878d560f413e6bbda51019ecac37804f0add9..d8c26393cead191e5647c6ac4dc7c19b818999b6 100644 (file)
@@ -53,7 +53,9 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_DM_ETH=y
 CONFIG_TSEC_ENET=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
index 59af172cb8a19a8396e340839819f471752eeeb5..d23c87504c9ba972a88965ffdb88d6506411b631 100644 (file)
@@ -54,7 +54,9 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_DM_ETH=y
 CONFIG_TSEC_ENET=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
index d7fec5e365eb4a9065be28b543f2d1aa73e7e8e3..7b2c2900a060d047fe79b4292ea0b9b0d37325a2 100644 (file)
@@ -53,7 +53,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_DM_ETH=y
 CONFIG_TSEC_ENET=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
index de0c9c7f26af03dcc0b3703cf9767724713fb265..cbf7a496a56406a704fc0d9f7e1f5e5ac0e1e27f 100644 (file)
  */
 
 #ifdef CONFIG_TSEC_ENET
-#define CONFIG_MII_DEFAULT_TSEC                1
-#define CONFIG_TSEC1                   1
-#define CONFIG_TSEC1_NAME              "eTSEC1"
-#define CONFIG_TSEC2                   1
-#define CONFIG_TSEC2_NAME              "eTSEC2"
-#define CONFIG_TSEC3                   1
-#define CONFIG_TSEC3_NAME              "eTSEC3"
-
-#define TSEC1_PHY_ADDR                 2
-#define TSEC2_PHY_ADDR                 0
-#define TSEC3_PHY_ADDR                 1
-
-#define TSEC1_FLAGS                    (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC2_FLAGS                    (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC3_FLAGS                    (TSEC_GIGABIT | TSEC_REDUCED)
-
-#define TSEC1_PHYIDX                   0
-#define TSEC2_PHYIDX                   0
-#define TSEC3_PHYIDX                   0
-
-#define CONFIG_ETHPRIME                        "eTSEC1"
-
-#define CONFIG_PHY_ATHEROS
-
-#define CONFIG_HAS_ETH0
-#define CONFIG_HAS_ETH1
-#define CONFIG_HAS_ETH2
+#define CONFIG_ETHPRIME                        "ethernet@2d10000"
 #endif
 
 /* PCIe */