Philippe Reynes [Mon, 6 Jan 2020 14:22:35 +0000 (15:22 +0100)]
aes: add support of aes192 and aes256
Until now, we only support aes128. This commit add the support
of aes192 and aes256.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philippe Reynes [Mon, 6 Jan 2020 14:22:34 +0000 (15:22 +0100)]
aes: add a define for the size of a block
In the code, we use the size of the key for the
size of the block. It's true when the key is 128 bits,
but it become false for key of 192 bits and 256 bits.
So to prepare the support of aes192 and 256,
we introduce a constant for the iaes block size.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 16 Jan 2020 18:20:51 +0000 (13:20 -0500)]
Merge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- Cleanup of fsl_esdhc driver together with arch/defconfig change
- Add quirk for APP_CMD retry
Tom Rini [Thu, 16 Jan 2020 17:52:07 +0000 (12:52 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Clearfog: Fix SD booting (Baruch)
- Misc updates to MMC handling in SPL to support booting from
main data partition (vs hardware boot partition) on MVEBU (Baruch)
Tom Rini [Thu, 16 Jan 2020 14:45:40 +0000 (09:45 -0500)]
Merge tag 'xilinx-for-v2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx/FPGA changes for v2020.04
ARM64:
- Add INIT_SPL_RELATIVE dependency
SPL:
- FIT image fix
- Enable customization of bl2_plat_get_bl31_params()
Pytest:
- Add test for octal/hex conversions
Microblaze:
- Fix manual relocation for one SPI instance
Nand:
- Convert zynq/zynqmp drivers to DM
Xilinx:
- Enable boot script location via Kconfig
- Support OF_SEPARATE in board FDT selection
- Remove low level uart setup it is done later by code
- Add support for DEVICE_TREE variable passing for SPL
Zynq:
- Enable jtag boot mode via distro boot
- Removing unused baseaddresses from hardware.h
- DT fixups
ZynqMP:
- Fix emmc boot sequence
- Simplify spl logic around bss and board_init_r()
- Support psu_post_config_data() calling
- Tune mini-nand DTS
- Fix psu wiring for a2197 boards
- Add runtime MMC device boot order filling in spl
- Clear ATF handoff handling with custom bl2_plat_get_bl31_params()
- Add support u-boot.its generation
- Use single image configuration for all platforms
- Enable PANIC_HANG via Kconfig
- DT fixups
- Firmware fixes
- Add support for zcu208 and zcu1285
Versal:
- Fix emmc boot sequence
- Enable board_late_init() by default
Tom Rini [Thu, 16 Jan 2020 14:40:09 +0000 (09:40 -0500)]
Merge branch '2020-01-15-master-imports'
- MediaTek improvements
- Some generic clk improvements
- A few assorted bugfixes
Sam Shih [Fri, 10 Jan 2020 08:30:35 +0000 (16:30 +0800)]
configs: mediatek: fix mt7623n bpir2 defconfig
This patch add CONFIG_TARGET_MT7623 into mt7623n_bpir2_defconfig
to fix the mt7623 compile error after building others mediatek target
platform
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:34 +0000 (16:30 +0800)]
arm: dts: mediatek: move u-boot properties to -u-boot.dtsi file
This patch move u-boot properties to -u-boot.dtsi file.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:33 +0000 (16:30 +0800)]
Add support for MT7622 reference board
This adds a general board file based on MT7622 SoCs from MediaTek.
This commit is adding the basic boot support for the MT7622 rfb.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Sam Shih [Fri, 10 Jan 2020 08:30:32 +0000 (16:30 +0800)]
mmc: add mmc and sd support for MT7622
This patch add mmc and sd support for Mediatek MT7622 SoCs
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:31 +0000 (16:30 +0800)]
power: domain: add power domain support for MT7622
This patch add power domain support for Mediatek MT7622 SoCs
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:30 +0000 (16:30 +0800)]
clk: mediatek: fix clock-rate overflow problem
This patch fix clock-rate overflow problem in mediatek
clock driver common part.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:29 +0000 (16:30 +0800)]
clk: mediatek: add driver for MT7622
This patch add clock driver for MediaTek MT7622 SoC.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:28 +0000 (16:30 +0800)]
pinctrl: mediatek: add support for different pinctrl
Due to the pinctrl hardware of MT7622 is difference from others
SoC which using the common part of mediatek pinctrl.
So we need to modify the common part of mediatek pinctrl.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:27 +0000 (16:30 +0800)]
pinctrl: mediatek: add driver for MT7622
This patch add Pinctrl driver for MediaTek MT7622 SoC.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Sam Shih [Fri, 10 Jan 2020 08:30:26 +0000 (16:30 +0800)]
ARM: MediaTek: Add support for MediaTek MT7622 SoC
Add support for MediaTek MT7622 SoC. This include the file
that will initialize the SoC after boot and its device tree.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:10 +0000 (11:35 +0800)]
phy: phy-mtk-tphy: make ref clock optional
If make the ref clock optional, no need refer to fixed-clock when
the ref clock is always on or comes from oscillator directly.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:09 +0000 (11:35 +0800)]
phy: phy-mtk-tphy: remove the check of -ENOSYS
No need check -ENOSYS anymore after add dummy_enable() for
fixed-clock.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:08 +0000 (11:35 +0800)]
clk: fixed_rate: add dummy enable() function
This is used to avoid clk_enable() return -ENOSYS.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:07 +0000 (11:35 +0800)]
clk: add APIs to get (optional) clock by name without a device
Sometimes we may need get (optional) clock without a device,
that means use ofnode.
e.g. when the phy node has subnode, and there is no device created
for subnode, in this case, we need these new APIs to get subnode's
clock.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:06 +0000 (11:35 +0800)]
clk: check valid clock by clk_valid()
Add valid check for clk->dev, it's useful when get optional
clock even when the clk point is valid, but its dev will be
NULL.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:05 +0000 (11:35 +0800)]
clk: fix error check for devm_clk_get_optional()
If skip all return error number, it may skip some real error cases,
so only skip the error when the clock is not provided in DTS
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Chunfeng Yun [Thu, 9 Jan 2020 03:35:04 +0000 (11:35 +0800)]
clk: mediatek: mt7629: add support for ssusbsys
The SSUSB IP's clocks come from ssusbsys module on mt7629,
so add its driver
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
mingming lee [Tue, 31 Dec 2019 03:29:26 +0000 (11:29 +0800)]
ARM: MediaTek: add basic support for MT8512 boards
This adds a general board file based on MT8512 SoCs from MediaTek.
Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.
This commit is adding the basic boot support for the MT8512 eMMC board.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
mingming lee [Tue, 31 Dec 2019 03:29:25 +0000 (11:29 +0800)]
mmc: mtk-sd: fix hang when data read quickly
For CMD21 tuning data, the 128/64 bytes data may coming in very
short time, before msdc_start_data(), the read data has already
come, in this case, clear MSDC_INT will cause the interrupt disappear
and lead to the thread hang.
the solution is just clear all interrupts before command was sent.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
mingming lee [Tue, 31 Dec 2019 03:29:24 +0000 (11:29 +0800)]
mmc: mtk-sd: add support for MediaTek MT8512/MT8110 SoCs
This patch adds mmc support for MediaTek MT8512/MT8110 SoCs.
MT8512/MT8110 SoCs puts the tune register at top layer, so
need add new code to support it.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
mingming lee [Tue, 31 Dec 2019 03:29:23 +0000 (11:29 +0800)]
pinctrl: mediatek: add driver for MT8512
Add Pinctrl driver for MediaTek MT8512 SoC.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
mingming lee [Tue, 31 Dec 2019 03:29:22 +0000 (11:29 +0800)]
clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll
Add configurable pcw_chg_reg/ibits/fmin to mtk_pll to support mt8512
mingming lee [Tue, 31 Dec 2019 03:29:21 +0000 (11:29 +0800)]
clk: mediatek: add set_clr_upd mux type flow
Add new set_clr_upd mux type and related operation to
mtk common clock driver to support mt8512
mingming lee [Tue, 31 Dec 2019 03:29:20 +0000 (11:29 +0800)]
clk: mediatek: add driver support for MT8512
Add clock driver for MediaTek MT8512 SoC, include topckgen,
apmixedsys and infracfg support.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
mingming lee [Tue, 31 Dec 2019 03:29:19 +0000 (11:29 +0800)]
ARM: MediaTek: Add support for MediaTek MT8512 SoC
Add support for MediaTek MT8512 SoC. This include the file
that will initialize the SoC after boot and its device tree.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
Sam Protsenko [Tue, 14 Jan 2020 17:54:12 +0000 (19:54 +0200)]
MAINTAINERS: Fix mail
Sam doesn't work for Linaro anymore, so Linaro mail is not valid. Change
it to his home mail instead.
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Alexandre Besnard [Fri, 20 Dec 2019 14:25:22 +0000 (15:25 +0100)]
cmd/blk_common: clarify no partition error message
When no partition table is found, users should be warned so.
Warning that no device is available in this case could be misleading,
especially as it is the same error when no device is selected.
Signed-off-by: Alexandre Besnard <alexandre.besnard@softathome.com>
Baruch Siach [Wed, 15 Jan 2020 07:08:10 +0000 (09:08 +0200)]
arm: mvebu: clearfog: update eMMC documentation
SPL now automatically selects the correct U-Boot image offset for both
eMMC and SD card. No need to tweak
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR anymore.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Wed, 15 Jan 2020 07:08:09 +0000 (09:08 +0200)]
arm: mvebu: clearfog: set uboot image SD card offset
Armada 38x ROM skips the first SD card offset when loading SPL. This
affects the location of the main U-Boot image. SPL MMC code now supports
U-Boot image offset based on run-time detection of the boot partition.
Use this feature to make the same generated image support both SD card
and eMMC boot partition.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Wed, 15 Jan 2020 07:08:08 +0000 (09:08 +0200)]
spl: mmc: support uboot image offset on main partition
On Armada 38x platforms the ROM code loads SPL from offset 0 of eMMC
hardware boot partitions. When there are no boot partitions (i.e. SD
card) the ROM skips the first sector that usually contains the (logical)
partition table. Since the generated .kwb image contains the main U-Boot
image in a fixed location (0x140 sectors by default), we end up with the
main U-Boot image in offset of 1 sector. The current workaround is to
manually set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x141 to
compensate for that.
This patch uses the run-time detected boot partition to determine the
right offset of the main U-Boot partition. The generated .kwb image is
now compatible with both eMMC boot partition, and SD card main data
partition.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Sun, 8 Dec 2019 07:41:41 +0000 (09:41 +0200)]
configs: clearfog: enable SPL_DM_GPIO to fix boot from SD
SPL needs DM GPIO to read the SD card-detect signal. This complements
the fix in commit
70bae02f71d4 ("arm: mvebu: clearfog: fix boot from SD
card").
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Joel Johnson [Sat, 11 Jan 2020 16:08:15 +0000 (09:08 -0700)]
mmc: config help typo fix
Fix typo in description of MMC_QUIRKS config option.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Joel Johnson [Sat, 11 Jan 2020 16:08:14 +0000 (09:08 -0700)]
mmc: add additional quirk for APP_CMD retry
It was observed (on ClearFog Base) that sending MMC APP_CMD returned
an error on the first attempt. The issue appears to be timing related
since even inserting a puts() short debug entry before the execution
added sufficient delay to receive success on first attempt.
Follow the existing quirks pattern to retry if initial issuance
failed so as to not introduce any delay unless needed.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Yangbo Lu [Thu, 19 Dec 2019 10:59:30 +0000 (18:59 +0800)]
Drop CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK usage
The eSDHC reference clocks should be provided by speed.c in arch/.
And we do not need CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK option to
select which clock to use. Because we can make the driver to select
the periperhal clock which is better (provides higher frequency)
automatically if its value is provided by speed.c.
This patch is to drop this option and make driver to select clock
automatically. Also fix peripheral clock calculation issue in
fsl_lsch2_speed.c/fsl_lsch3_speed.c.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 16 Jan 2020 05:19:44 +0000 (13:19 +0800)]
configs: ls1028a: use default SDHC clock divider value
The SDHC clock divider value for LS1028A should be default 2,
not 1.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 19 Dec 2019 10:59:28 +0000 (18:59 +0800)]
Add global variable sdhc_per_clk for arm/powerpc
The QorIQ eSDHC controller supports two reference clocks. They are
platform clock and periperhal clock. The global variable sdhc_clk
has already been used for platform clock.
This patch is to add another global variable sdhc_per_clk for
periperhal clock, which provides higher frequency and is required
to be used for SD UHS and eMMC HS200/HS400 speed modes.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 19 Dec 2019 10:59:27 +0000 (18:59 +0800)]
powerpc/mpc85xx: drop eSDHC periperhal clock code
The below patch added eSDHC periperhal clock code initially.
2d9ca2c mmc: fsl_esdhc: Add peripheral clock support
The purpose was to fix up device tree properties "peripheral-frequency"
so that linux could get the periperhal clock by it.
However the implementation on both u-boot and linux was only
for a Freescale SDK release. The linux part implementation had never
been upstreamed. These code should not have been exist on u-boot
mainline.
Let's remove the powerpc part changes but keep the changes in
fsl_esdhc driver. The changes in fsl_esdhc driver could be utilized
to support SD UHS and eMMC HS200/HS400 speed modes for current
Layerscape ARM platforms.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 19 Dec 2019 10:59:26 +0000 (18:59 +0800)]
mmc: fsl_esdhc: drop useless fdt fixup
The fdt fixup for properties "peripheral-frequency" and "adapter-type"
was once for a Freescale SDK release. The properties haven't been existed
in linux mainline. Drop these useless code.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 19 Dec 2019 10:59:25 +0000 (18:59 +0800)]
mmc: fsl_esdhc_imx: drop QorIQ eSDHC specific peripheral clock code
Drop QorIQ eSDHC specific peripheral clock code.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Heinrich Schuchardt [Wed, 18 Dec 2019 10:05:59 +0000 (11:05 +0100)]
test/py: use valid device tree in test_fit.py
The device tree compiler expects that a node with a unit-address has a reg
property.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Wed, 18 Dec 2019 02:40:09 +0000 (21:40 -0500)]
Add dependencies for MALLOC_F and OF_LIBFDT
Some features implicitly depended on MALLOC_F and OF_LIBFDT and would
fail at link-time if these features were not enabled.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Sean Anderson [Wed, 18 Dec 2019 02:22:42 +0000 (21:22 -0500)]
Include missing headers for asm-generic/sections.h
asm-generic/sections.h references ulong but does not include
linux/types.h
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Vignesh Raghavendra [Fri, 15 Nov 2019 11:30:42 +0000 (17:00 +0530)]
dma: Add stub of dma_memcpy and dma_get_device
Add stub for dma_memcpy() and dma_get_device when CONFIG_DMA is
disabled. This avoids ifdefs in driver code using DMA APIs
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Vignesh Raghavendra [Fri, 15 Nov 2019 11:30:41 +0000 (17:00 +0530)]
Kconfig: Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA
Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA. This allows to use
macros such as CONFIG_IS_ENABLED() that allow conditional compilation of
code for SPL and U-Boot.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 15 Jan 2020 17:29:23 +0000 (12:29 -0500)]
Merge tag 'efi-2020-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-04-rc1-2
Bug fixes for the UEFI sub-system are provided:
* imply VIDEO_ANSI for correct cursor positioning and colors
* fix issues in the UEFI block device driver
* add missing documentation
Tom Rini [Wed, 15 Jan 2020 14:22:15 +0000 (09:22 -0500)]
Merge tag 'u-boot-imx-
20200115' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
-----------------------------------
- imx8:
add capricorn giedi deneb boards
- imx6:
fixed fow wandboard
- imx7: DM_ETHER for pico-imx7d
- fsl_esdhc_imx: add broken-cd property
- New SOC: IMXRT10xx
Travis:
https://travis-ci.org/sbabic/u-boot-imx/builds/
637126531
Tom Rini [Wed, 15 Jan 2020 02:48:32 +0000 (21:48 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra
- Important bugfix for some Tegra platforms
Heinrich Schuchardt [Tue, 14 Jan 2020 23:49:35 +0000 (00:49 +0100)]
efi_loader: imply VIDEO_ANSI
UEFI programs like GRUB make change terminal colors which requires support
for ANSI escape sequences.
Let CONFIG_EFI_LOADER=y imply CONFIG_VIDEO_ANSI.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Fri, 10 Jan 2020 11:33:16 +0000 (12:33 +0100)]
efi_driver: debug output efi_uc_start, efi_uc_stop
Use the correct printf codes for the debug output in efi_uc_start() and
efi_uc_stop().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 9 Jan 2020 22:26:43 +0000 (23:26 +0100)]
efi_driver: fix efi_uc_stop()
Use the correct protocol in efi_uc_stop() when detaching the driver from
the controller.
Change the block IO unit test for the block device driver to throw an error
instead of a todo if teardown fails.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 11 Jan 2020 09:59:08 +0000 (10:59 +0100)]
efi_selftest: enable CONFIG_CMD_POWEROFF
For automating testing we should be able to power off the test system.
The implementation of EFI_RESET_SHUTDOWN requires the do_poweroff()
function which is only available if CONFIG_CMD_POWEROFF=y.
Enable CONFIG_CMD_POWEROFF if PSCI reset is available.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Fri, 10 Jan 2020 21:06:54 +0000 (22:06 +0100)]
efi_loader: describe returning of control
Provide a sober description of how control can be returned by a UEFI
binary.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 9 Jan 2020 19:49:44 +0000 (20:49 +0100)]
efi_loader: document functions in efi_rng.c
Add the missing Sphinx documentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Giulio Benetti [Fri, 10 Jan 2020 14:51:48 +0000 (15:51 +0100)]
imx: imxrt1050-evk: Add support for the NXP i.MXRT1050-EVK
This commit adds board support for i.MXRT1050-EVK from NXP. This board
is an evaluation kit provided by NXP for i.MXRT105x processor family.
More information about this board can be found here:
https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK
The initial supported/tested devices include:
- Debug serial
- SD
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:51:47 +0000 (15:51 +0100)]
imx: Add basic support for the NXP IMXRT10xx SoC family
Add i.IMXRT family basic support.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:51:46 +0000 (15:51 +0100)]
mmc: fsl_esdhc: add compatible for fsl, imxrt-usdhc
Add compatible "fsl,imxrt-usdhc" to make mmc working on i.MXRT platforms
with CONFIG_DM_MMC=y.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:51:45 +0000 (15:51 +0100)]
mmc: fsl_esdhc: make if(CONFIG_IS_ENABLED(CLK)) an #if statement
Not all architectures(i.e. i.MXRT) support mxc_get_clock() and use DM_CLK
instead. So building could result in failure due to missing
mxc_get_clock().
Make if(CONFIG_IS_ENABLED(CLK)) an #if statement.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:51:44 +0000 (15:51 +0100)]
ram: add SDRAM driver for i.MXRT SoCs
Add SDRAM driver for i.MXRT SoCs.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:51:43 +0000 (15:51 +0100)]
serial_lpuart: add support for i.MXRT
Add i.MXRT compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.
Also according to RM, the Receive RX FIFO Enable (RXFE) field in LPUART
FIFO register is bit 3, so this definition should change to 0x08 as done
for i.MX8. It needs also to set baudrate the same way as i.MX8 does.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:47:05 +0000 (15:47 +0100)]
serial_lpuart: add clock enable if CONFIG_CLK is defined
This driver assumes that lpuart clock is already enabled before probing
but using DM only lpuart won't be automatically enabled so add
clk_enable() when probing if CONFIG_CLK is defined. If clock is not
found, because DM is not used, let's emit a warning and proceed, because
serial clock could also be already enabled by non DM code. If clock is
found but cna't be enabled then return with error.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:47:04 +0000 (15:47 +0100)]
ARM: dts: imxrt1050: add dtsi file
Add dtsi file for i.MXRT1050.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:47:03 +0000 (15:47 +0100)]
gpio: mxc_gpio: add support for i.MXRT1050
Add i.MXRT1050 support, there are 5 GPIO banks.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:47:02 +0000 (15:47 +0100)]
pinctrl: add i.MXRT driver
Add i.MXRT pinctrl driver.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:47:01 +0000 (15:47 +0100)]
clk: imx: add i.IMXRT1050 clk driver
Add i.MXRT1050 clk driver support.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:47:00 +0000 (15:47 +0100)]
clk: imx: pfd: add set_rate()
Implement set_rate() for pfd.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Giulio Benetti [Fri, 10 Jan 2020 14:46:59 +0000 (15:46 +0100)]
clk: imx: pllv3: add support for PLLV3_AV type
Add support for PLLV3 AV type.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:46:58 +0000 (15:46 +0100)]
clk: imx: pllv3: add PLLV3_SYS support
Add PLLV3_SYS support by adding set/get_rate() for PLLV3_SYS but keeping
generic enable()/disable(). Add a different driver because ops are
different respect to GENERIC/USB.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Giulio Benetti [Fri, 10 Jan 2020 14:46:57 +0000 (15:46 +0100)]
clk: imx: pllv3: add set_rate() support
Add generic set_rate() support.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Giulio Benetti [Fri, 10 Jan 2020 14:46:56 +0000 (15:46 +0100)]
clk: imx: pllv3: add disable() support
Add disable() support.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Giulio Benetti [Fri, 10 Jan 2020 14:46:55 +0000 (15:46 +0100)]
clk: imx: pllv3: add enable() support
Before set_rate() pllv3 needs enable() to power the pll up.
Add enable() taking into account different power_bit and
different powerup_set, because some pll needs its power_bit to be
set or reset to be powered on.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:46:54 +0000 (15:46 +0100)]
clk: imx: pllv3: set div_mask differently if PLLV3 is GENERIC or USB
div_mask is different for GENERIC and USB pll, so set it according.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Giulio Benetti [Fri, 10 Jan 2020 14:46:53 +0000 (15:46 +0100)]
clk: imx: pllv3: register PLLV3 GENERIC and USB as 2 different clocks
Better to register the 2 clock as 2 different drivers because they work
slightly differently depending on power_bit and powerup_set bits coming
on next patches.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Giulio Benetti [Fri, 10 Jan 2020 14:46:52 +0000 (15:46 +0100)]
armv7m: cache: add mmu_set_region_dcache_behaviour() stub for compatibility
Since some driver requires this function add it as an empty stub
when DCACHE is OFF.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Fri, 10 Jan 2020 14:46:51 +0000 (15:46 +0100)]
spl: fix entry_point equal to load_addr
At the moment entry_point is set to image_get_load(header) that sets it
to "load address" instead of "entry point", assuming entry_point is
equal to load_addr, but it's not true. Then load_addr is set to
"entry_point - header_size", but this is wrong too since load_addr is
not an entry point.
So use image_get_ep() for entry_point assignment and image_get_load()
for load_addr assignment.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Anatolij Gustschin [Tue, 7 Jan 2020 13:03:04 +0000 (14:03 +0100)]
imx: dts: imx8dx: add I2C IPG clock for bus 0 and 2
IPG clock description is missing for I2C0 and I2C2 busses,
add it. Otherwise we see -ENODATA error when trying to get
I2C clock for these busses.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Anatolij Gustschin [Tue, 7 Jan 2020 13:03:03 +0000 (14:03 +0100)]
clk: imx8qxp: extend to support getting I2C IPG clock
Since commit
d02be21d3004 ("i2c: imx_lpi2c: add ipg clk") getting
I2C clocks doesn't work. Add I2C IPG clock IDs to related switch
statements to fix it.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Mon, 6 Jan 2020 23:11:28 +0000 (20:11 -0300)]
ARM: dts: imx6ul-14x14-evk: Pass the "broken-cd" property
imx6ul-14x14-evk does not have a GPIO dedicated for reading the card
detect pin on the eSDHC2 port. In such cases the "broken-cd" property
must be passed, otherwise the card cannot be detected.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Mon, 6 Jan 2020 23:11:27 +0000 (20:11 -0300)]
mmc: fsl_esdhc_imx: Handle the "broken-cd" property
When no GPIO is used to read the card detect status the following
error is seen:
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... MMC: no card present
*** Warning - No block device, using default environment
Fix it by handling the "broken-cd" property in the same way
that drivers/mmc/sdhci.c does, which considers that the SD card
is present when the "broken-cd" property is passed.
Tested on a imx6ul-evk board.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Joris Offouga [Sun, 5 Jan 2020 23:22:09 +0000 (00:22 +0100)]
pico-imx7d: Convert to DM_ETH
Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Joris Offouga [Sun, 5 Jan 2020 23:22:08 +0000 (00:22 +0100)]
pico-imx7d: Disable USB_ETHER support for bl33 defconfig
For DM_ETH support , it's require to disable this config.
When this config is enable, This generate a error with spl in linker script
Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Mon, 6 Jan 2020 15:31:55 +0000 (12:31 -0300)]
mx6ul_14x14_evk: Fix SPL boot hang
Currently the following SPL hang is observed:
U-Boot SPL
2020.01-rc5-00079-g797eee36a1 (Jan 06 2020 - 11:24:09 -0300)
Trying to boot from MMC1
Card did not respond to voltage select!
spl: mmc init failed with error: -95
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Fix it by moving the eSDHC2 initialization to SPL.
While at it, since this board uses DM_MMC all the esdhc board
code can be removed to make the code simpler.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Peng Fan [Wed, 8 Jan 2020 01:33:31 +0000 (01:33 +0000)]
imx: imx8qxp_mek: update README
Update README to use 4.19.35_1.1.0 released firmware images.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Thu, 9 Jan 2020 01:05:05 +0000 (22:05 -0300)]
wandboard: Do not print error message when PMIC is absent
Only the wandboard revD1 boards have PMIC, so when running on a wandboard
of different revision the following error is always shown on every boot:
pmic_get() ret -19
Instead of printing this error message, move it to debug level instead.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Thu, 9 Jan 2020 14:07:23 +0000 (11:07 -0300)]
imx8qxp_mek: Select CONFIG_NET_RANDOM_ETHADDR
Some i.MX8QXP MEK boards do not have MAC address stored
and hang during eth driver probe:
Error: ethernet@
5b040000 address not set.
(Board hangs)
To fix this problem select CONFIG_NET_RANDOM_ETHADDR so that
a valid MAC address can be used in such case.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Anatolij Gustschin [Tue, 7 Jan 2020 15:37:43 +0000 (16:37 +0100)]
imx: add imx8x based deneb board
Add support for Capricorn Deneb SoM variant.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Anatolij Gustschin [Tue, 7 Jan 2020 15:37:42 +0000 (16:37 +0100)]
imx: add imx8x capricorn giedi board
Add support for i.MX8X based Capricorn Giedi SoM.
Supported interfaces: GPIO, ENET, eMMC, I2C, UART.
Console output:
U-Boot SPL
2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100)
Trying to boot from MMC1
Load image from MMC/SD 0x3e400
U-Boot
2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100) ##v01.07
CPU: NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
Model: Siemens Giedi
Board: Capricorn
Boot: MMC0
DRAM: 1022 MiB
MMC: FSL_SDHC: 0
Loading Environment from MMC... OK
In: serial@
5a080000
Out: serial@
5a080000
Err: serial@
5a080000
Net: eth1: ethernet@
5b050000 [PRIME]
Autobooting in 1 seconds, press "<Esc><Esc>" to stop
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Stephen Warren [Tue, 7 Jan 2020 18:17:54 +0000 (11:17 -0700)]
tegra: fdt: Add tegra186-u-boot.dtsi
All Tegra chips except Tegra186 have a tegraNNN-u-boot.dtsi. Duplicate
Tegra210's copy of this file for Tegra186. This ensures that a /binman node
exists in U-Boot's control DT. Subsequent to
3c10dc95bdd0 ("binman: Add a
library to access binman entries") this appears to be required. I haven't
really investigated why all this is necessary or how it works, but simply
observed the boot failure listed below, bisected it, noticed the
inconsistency in DT files, and found that fixing it resolved the boot
issue.
U-Boot
2020.01-rc4-00256-g3c10dc95bdd0 (Jan 07 2020 - 10:25:00 -0700)
SoC: tegra186
Model: NVIDIA P2771-0000-500
Board: NVIDIA P2771-0000
DRAM: 7.8 GiB
initcall sequence
00000000fffb7858 failed at call
00000000800955a8 (err=-22)
### ERROR ### Please RESET the board ###
Fixes:
3c10dc95bdd0 ("binman: Add a library to access binman entries")
Fixes:
f2faffecb016 ("binman: tegra: Convert to use binman")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Tue, 17 Dec 2019 14:06:38 +0000 (15:06 +0100)]
arm64: versal: Enable board_late_init calling
Qemu v4.2.0 maps bootmode registers to address space which was the reason
why board_late_init() was disabled and accesses were failing.
With new Qemu board_late_init() can be called without any issue.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Zumeng Chen [Mon, 23 Sep 2019 09:47:09 +0000 (17:47 +0800)]
ARM: dts: zynq: enablement of coresight topology
This patch is to build the coresight topology structure of zynq-7000
series according to the docs of coresight and userguide of zynq-7000.
Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com>
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 9 Jan 2020 13:15:07 +0000 (14:15 +0100)]
arm64: zynqmp: Sync gem clock nodes with mainline Linux
Just fixing indentation and update year in Copyright.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 9 Jan 2020 12:10:59 +0000 (13:10 +0100)]
arm64: zynqmp: Sync gpio-controller name location
Sync location with mainline kernel.
Added by Linux kernel commit
75926f07baae
("arm64: dts: zynqmp: Add missing gpio-controller to ps gpio").
Fixes:
0b33e0b15600 ("arm64: zynqmp: Add missing gpio property to dtsi")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Sudeep Holla [Wed, 24 Oct 2018 11:45:40 +0000 (12:45 +0100)]
arm64: dts: zynqmp: replace gpio-key,wakeup with wakeup-source property
Most of the legacy "gpio-key,wakeup" boolean property is already
replaced with "wakeup-source". However few occurrences of old property
has popped up again, probably from the remnants in downstream trees.
This patch replaces the legacy properties with the unified
"wakeup-source" property introduced by:
"Input: gpio_keys - switch to using generic device properties"
(sha1:
700a38b27eefc582099fdf69effacfad0ad738a4)
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Jan Kiszka [Thu, 24 Jan 2019 08:28:59 +0000 (09:28 +0100)]
arm64: dts: zcu100-revC: Give wifi some time after power-on
Somewhere along recent changes to power control of the wl1831, power-on
became very unreliable on the Ultra96, failing like this:
wl1271_sdio: probe of mmc2:0001:1 failed with error -16
wl1271_sdio: probe of mmc2:0001:2 failed with error -16
After playing with some dt parameters and comparing to other users of
this chip, it turned out we need some power-on delay to make things
stable again. In contrast to those other users which define 200 ms,
Ultra96 is already happy with 10 ms.
Fixes:
5869ba0653b9 ("arm64: zynqmp: Add support for Xilinx zcu100-revC")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 8 Nov 2018 09:06:53 +0000 (10:06 +0100)]
arm64: dts: zynqmp: Fix node names which contain "_"
s/_/-/ for node names.
It fixes warnings like this:
... Warning (node_name_chars_strict): /cpu_opp_table:
Character '_' not recommended in node name ...
Issues reported by make dtbs W=12
Signed-off-by: Michal Simek <michal.simek@xilinx.com>