Weijie Gao [Wed, 25 Sep 2019 09:45:28 +0000 (17:45 +0800)]
dts: mtmips: add default pinctrl for uart nodes
This patch adds default pinctrl for uart nodes
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Wed, 25 Sep 2019 09:45:27 +0000 (17:45 +0800)]
dts: mtmips: add pinctrl node for mt7628
This patch adds pinctrl node with default pin state for mt7628an.dtsi.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Wed, 25 Sep 2019 09:45:26 +0000 (17:45 +0800)]
pinctrl: add support for MediaTek MT7628
This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Wed, 25 Sep 2019 09:45:25 +0000 (17:45 +0800)]
spi: mt7621-spi: restore default register value after each xfer
Currently this driver uses a different way to implement the spi xfer,
by modifying some fields of two registers, which is incompatible with the
MTK's original SDK linux driver. This will cause the flash data being
damaged by the SDK driver.
This patch lets the mt7621_spi_set_cs() restore the original register
fields after cs deactivated.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Wed, 25 Sep 2019 09:45:24 +0000 (17:45 +0800)]
spi: mt7621-spi: remove data cache and rewrite its xfer function
The mt7621 spi controller supports continuous generic half-duplex spi
transaction. There is no need to cache xfer data at all.
To achieve this goal, the OPADDR register must be used as the first data
to be sent. And follows the eight generic DIDO registers. But one thing
different between OPADDR and DIDO registers is OPADDR has a reversed byte
order.
With this patch, any amount of data can be read/written in a single xfer
function call.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Wed, 25 Sep 2019 09:45:23 +0000 (17:45 +0800)]
spi: mt7621-spi: use clock frequency from clk driver
This patch lets the spi driver to use clock provided by the clk driver
since the new clk-mt7628 driver provides accurate sys clock frequency.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Wed, 25 Sep 2019 09:45:22 +0000 (17:45 +0800)]
dts: mtmips: add clock node for mt7628
This patch adds clkctrl node for mt7628 and adds clocks property for
some node.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Wed, 25 Sep 2019 09:45:21 +0000 (17:45 +0800)]
clk: add clock driver for MediaTek MT76x8 platform
This patch adds a clock driver for MediaTek MT7628/7688 SoC.
It provides clock gate control as well as getting clock frequency for
CPU/SYS/XTAL and some peripherals.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Wed, 25 Sep 2019 09:45:20 +0000 (17:45 +0800)]
dts: mtmips: enable high-speed UART support for mt7628
All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate <= 115200.
Add compatible string to dtsi file so u-boot can use it when serial_mtk
driver is built in.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Wed, 25 Sep 2019 09:45:19 +0000 (17:45 +0800)]
dts: mtmips: move uart property clock-frequency into mt7628an.dtsi
The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Wed, 25 Sep 2019 09:45:18 +0000 (17:45 +0800)]
serial: serial_mtk: add non-DM version for SPL
This patch adds non-DM version for mtk hsuart driver and makes it
compatible with ns16550a driver in configuration.
This is needed in SPL with CONFIG_SPL_DM disabled for reducing size.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Wed, 25 Sep 2019 09:45:17 +0000 (17:45 +0800)]
serial: serial_mtk: enable FIFO and disable flow control
This patch adds codes to enable FIFO and disable flow control taken from
ns16550 driver.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
William Zhang [Wed, 4 Sep 2019 17:51:13 +0000 (10:51 -0700)]
drivers: nand: brcmnand: fix nand_chip ecc layout structure
The current brcmnand driver is based on 4.18 linux kernel which uses
mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from
old kernel which does not use this new API and expect nand_chip.ecc.layout
structure to be set. This cause nand_scan_tail function running into a bug
check if the device has a different oob size than the default ones.
This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7
that supports the ecc layout struture and replaces the mtd_set_ooblayout
method
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Álvaro Fernández Rojas [Mon, 16 Sep 2019 15:15:05 +0000 (17:15 +0200)]
mips: bmips: switch to board defines for dtb
Fixes commit
344db3f, which added missing bmips dtbs depending on their SoCs.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Fri, 30 Aug 2019 10:00:42 +0000 (12:00 +0200)]
bmips: correct name characters
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Fri, 30 Aug 2019 09:54:27 +0000 (11:54 +0200)]
bmips: configs: switch to size definitions
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Álvaro Fernández Rojas [Fri, 30 Aug 2019 09:52:59 +0000 (11:52 +0200)]
mips: bmips: remove unneeded definitions
These are no longer needed.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:20 +0000 (19:12 +0200)]
bmips: enable vr-3032u nand support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:19 +0000 (19:12 +0200)]
bmips: bcm63268: add support for brcmnand
BCM63268 uses 4.0 HW nand controller, which is currently supported by
brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:18 +0000 (19:12 +0200)]
bmips: bcm6362: add support for brcmnand
BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:17 +0000 (19:12 +0200)]
bmips: bcm6328: add support for brcmnand
BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:16 +0000 (19:12 +0200)]
bmips: bcm6368: add support for brcmnand
BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by
brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Wed, 28 Aug 2019 17:12:15 +0000 (19:12 +0200)]
nand: brcm: add BCM6368 support
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Ramon Fried [Mon, 10 Jun 2019 18:05:26 +0000 (21:05 +0300)]
MIPS: add compile time definition of L2 cache size
If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.
Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Icenowy Zheng [Wed, 24 Apr 2019 05:44:12 +0000 (13:44 +0800)]
sunxi: set PIO voltage to hardware-detected value on startup on H6
The Allwinner H6 SoC has a register to set the PIO banks' voltage. When
it mismatches the real voltage supplied to the VCC to the PIO supply,
the PIO will work improperly.
The PIO controller also has a register that contains the status of each
VCC rail of the PIO supplies, and it has the same definition with the
configuration register. so we can just copy the content of this register
to the configuration register at startup, to ensure the configuration is
correct at startup stage.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[jagan: s/__maybe__unused/__maybe_unused]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Clément Péron [Sun, 25 Aug 2019 16:04:18 +0000 (18:04 +0200)]
arm: dts: sync dts for Allwinner H6
Sync Kernel DTS for Allwinner H6 boards.
Drop /omit-if-no-ref/ keyword as it's not supported by U-boot.
commit <
d45331b00ddb> Linux 5.3-rc4
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Stefan Mavrodiev [Wed, 31 Jul 2019 13:15:52 +0000 (16:15 +0300)]
sunxi: Fix pll1 clock calculation
clock_sun6i.c is used for sun6i, sun8i and sun50i SoC families.
PLL1 clock sets the default system clock, defined as:
sun6i:
1008000000
sun8i:
1008000000
sun50i:
816000000
With the current calculation, m = 2 and k = 3. Solving for n,
this results 28. Solving back:
(24MHz * 28 * 3) / 2 = 1008MHz
However if the requested clock is 816, n is 22.66 rounded
to 22, which results:
(24MHz * 28 * 3) / 2 = 792MHz
Changing k to 4 satisfies both system clocks:
(24E6 * 21 * 4) / 2 = 1008MHz
(24E6 * 17 * 4) / 2 = 816MHz
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Sunil Mohan Adapa [Tue, 10 Sep 2019 18:43:40 +0000 (11:43 -0700)]
arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)
A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.
The Linux kernel upstream has chosen to create and use a separate device tree
for the eMMC variants instead of adding eMMC support existing device tree. These
changes to Linux kernel are queued for Linux 5.4.
commit <
02bb66b347ff8115f53948f86b884e008ba385b9> ("arm64: dts:
allwinner: a64: Add A64 OlinuXino board (with eMMC)")
This patch has been tested on A64-OLinuXino-1Ge16GW and is based on Linux
device-tree and a64-olinuxino_defconfig.
Signed-off-by: Sunil Mohan Adapa <sunil@medhas.org>
[jagan: updated linux-next commit details]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Jernej Skrabec [Fri, 23 Aug 2019 17:24:04 +0000 (19:24 +0200)]
sunxi: H6: DRAM: Add support for half DQ
Half DQ configuration seems to be very rare for H6 based boards/STBs,
but exists nevertheless. Currently the only known product which needs
this support is Tanix TX6 mini.
This commit adds support for half DQ configuration. Code was tested
for regressions on other configurations (OrangePi 3 1 GiB/LPDDR3, Tanix
TX6 4 GiB/DDR3) and none were found.
Thanks to Icenowy Zheng for help with this code.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: thomas graichen <thomas.graichen@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Fabio Estevam [Mon, 21 Oct 2019 13:51:16 +0000 (10:51 -0300)]
spi-nor-ids: Add support for Adesto AT25SL321
Add an entry for the Adesto AT25SL321 SPI NOR chip.
This SPI NOR chip is found in the Embedded Artist i.MX7ULP COM board.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Frieder Schrempf [Wed, 23 Oct 2019 07:41:20 +0000 (07:41 +0000)]
mtd: spi: Clean up usage of CONFIG_SPI_FLASH_MTD
Most boards currently use SPI_FLASH_MTD only in U-Boot proper, not in
SPL. They often rely on hacks in the board header files to include
this option conditionally. To be able to fix this, we previously
introduced a separate option SPL_SPI_FLASH_MTD.
Therefore we can now adjust the Makefile and change the code in
sf_probe.c and sf_internal.h to use CONFIG_IS_ENABLED(SPI_FLASH_MTD).
We also need to move all occurences of CONFIG_SPI_FLASH_MTD from the
header files to the according defconfigs. The affected boards are
socfpga, aristainetos, cm_fx6, display5, ventana, rcar-gen2, dh_imx6
and da850evm.
We do this all in one patch to guarantee bisectibility.
This change was tested with buildman to make sure it does not
introduce any regressions by comparing the resulting binary sizes.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Vignesh Raghavendra [Fri, 11 Oct 2019 07:58:20 +0000 (13:28 +0530)]
spi-nor: spi-nor-ids: Add USE_FSR flag for mt25q* and n25q* entry
n25q* and mt25q* (both 256Mb and 512Mb) flashes support Flag status
register that indicates various errors that may be encountered during
erase/write operations. Therefore add USE_FSR flag wherever missing.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Vignesh Raghavendra [Fri, 11 Oct 2019 07:58:19 +0000 (13:28 +0530)]
spi-nor: spi-nor-ids: Add entries for mt25q variants
mt25q* flashes support stateless 4 byte addressing opcodes. Add entries
for the same. These flashes have bit 6 set in 5th byte of READ ID
response when compared to n25q* variants.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Vignesh Raghavendra [Fri, 11 Oct 2019 07:58:18 +0000 (13:28 +0530)]
spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*
Per datasheets of n25q256* and n25q512* not all variants of n25q256* and
n25q512* support 4 Byte stateless addressing opcodes. Therefore drop
SPI_NOR_4B_OPCODES flag from these entries
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Ley Foon Tan [Wed, 19 Sep 2018 08:27:19 +0000 (16:27 +0800)]
spi: designware_spi: Disable and free clock when remove driver
Disable and free clock when remove driver.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Vignesh Raghavendra [Thu, 26 Sep 2019 13:34:27 +0000 (19:04 +0530)]
mtd: spi-nor-core: Replace MTD_SPI_NOR_USE_4K_SECTORS with SPI_FLASH_USE_4K_SECTORS
U-Boot uses CONFIG_SPI_FLASH_USE_4K_SECTORS to enable 4K small sector
support. Use that instead of MTD_SPI_NOR_USE_4K_SECTORS.
Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Vignesh Raghavendra [Thu, 26 Sep 2019 13:34:26 +0000 (19:04 +0530)]
mtd: spi-nor-core: Use dev_err for reporting erase/write failures
Use dev_err() when reporting reason for erase/write failures so that
users can be made aware of the reason for failure.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Frieder Schrempf [Tue, 22 Oct 2019 18:07:43 +0000 (23:37 +0530)]
stm32mp1: configs: Add CONFIG_SPL_SPI_FLASH_MTD
As SPI_FLASH_MTD is used in SPL and U-Boot proper, we enable both,
now that a separate option for SPL was introduced.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
[jagan: drop unrelated change]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Frieder Schrempf [Fri, 13 Sep 2019 22:43:42 +0000 (22:43 +0000)]
mtd: spi: Add a new option SPL_SPI_FLASH_MTD to Kconfig
To allow SPI_FLASH_MTD being enabled separately in SPL we add a new
option. The only user currently is the stm32mp15_basic board.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 16 Oct 2019 13:49:25 +0000 (19:19 +0530)]
configs: sopine-baseboard: Enable SPI-FLASH
SoPine has winbond SPI-FLASH, so enable the same in defconfig
and add aliases for spi0 in -u-boot.dtsi
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 16 Oct 2019 12:38:26 +0000 (18:08 +0530)]
arm: sunxi: Enable SPI/SPI-FLASH support for A64
SPI is available in Allwinner A64 SoC, so enable it
globally in Kconfig.
- CONFIG_SPI
- CONFIG_DM_SPI
- CONFIG_DM_SPI_FLASH
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 16 Oct 2019 12:35:56 +0000 (18:05 +0530)]
spi: Kconfig: Enable SPI_SUNXI for SUNXI
SPI_SUNXI driver is fully dm-aware and the Allwinner
architecture kconfig would have logic to enable the
DM_SPI. So, select default spi sunxi driver for
sunxi architecture.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 16 Oct 2019 12:37:24 +0000 (18:07 +0530)]
mtd: spi: Kconfig: Imply SPI_FLASH if DM_SPI_FLASH
DM_SPI_FLASH should require spi flash interface code for dm
version, so imply SPI_FLASH core by default if any board
enabled DM_SPI_FLASH.
This overcome the explicit enablement of CONFIG_SPI_FLASH on
respective boards when DM_SPI_FLASH being used.
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 16 Oct 2019 12:29:42 +0000 (17:59 +0530)]
cmd: sf: Mark it default if DM_SPI_FLASH enabled
If DM_SPI_FLASH enabled that means it is using sf command
for flash interface to access.
SPI_FLASH can be used via sf command and board/driver
functions to call spi flash ops, so mark it default only
for DM_SPI_FLASH.
This would prevent explicit adding of CONFIG_CMD_SF when
DM_SPI_FLASH being enabled.
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Bin Meng [Mon, 9 Sep 2019 13:00:01 +0000 (06:00 -0700)]
dm: spi: Change cs_info op to return -EINVAL for invalid cs num
We need distinguish the following two situations in various SPI APIs:
- given chip select num is invalid
- given chip select num is valid, but no device is attached
Currently -ENODEV is returned for both cases.
For the first case, it's more reasonable to return -EINVAL instead of
-ENODEV for invalid chip select numbers.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Bin Meng [Mon, 9 Sep 2019 13:00:00 +0000 (06:00 -0700)]
dm: spi: Return 0 if driver does not implement ops->cs_info
If an SPI controller driver does not implement ops->cs_info, that
probably means any chip select number could be valid, hence let's
return 0 for spi_cs_info().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 16 Oct 2019 12:34:13 +0000 (18:04 +0530)]
spi: Kconfig: Add help text
Add detailed help text for SPI support.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Sun, 29 Sep 2019 07:42:37 +0000 (13:12 +0530)]
mtd: spi-nor: ids: Add is25wp256 chip
Add is25wp256, chip to spi-nor id table.
Tested on SiFive FU540 board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Jagan Teki [Sat, 9 Feb 2019 12:15:42 +0000 (17:45 +0530)]
mtd: spi: Kconfig: Update CONFIG_SPI_FLASH
1) CONFIG_SPI_FLASH is not just a legacy code, but it has common
core code which handle both dm and non-dm spi flash code. So
fix the info text to make it clear globally.
2) Since it's flash core it shouldn't depends on legacy SPI,
so remove the 'depends on SPI'
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Thu, 24 Oct 2019 13:51:48 +0000 (09:51 -0400)]
Merge branch '2019-10-24-UFS-support'
- Add Universal Flash Storage (UFS) support
Ye Li [Thu, 24 Oct 2019 13:29:32 +0000 (10:29 -0300)]
ehci-mx6: Update EHCI driver to support OTG0 on i.MX7ULP
The ULP has two USB controllers. These two controllers have similar NC
registers layout as i.MX7D. But OTG0 uses UTMI PHY simliar as i.MX6, not
the integrated PHY on i.MX7D. The OTG1 needs off-chip HSIC PHY or ULPI PHY
to work.
This patch only supports OTG0 with UTMI PHY.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Igor Opaniuk [Thu, 10 Oct 2019 13:09:35 +0000 (16:09 +0300)]
usb: ehci-mx6: Fix bus enumeration for iMX7 SoCs
This fixes the issues with calculation of controller indexes in
ehci_usb_bind() for iMX7, as USB controllers on iMX7 SoCs aren't
placed next to each other, and their addresses incremented by 0x10000.
Example of USB nodes for iMX7S/D:
usbotg1: usb@
30b10000 {
compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
reg = <0x30b10000 0x200>;
^^^^^^^^^^
....
usbotg2: usb@
30b20000 {
compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
reg = <0x30b20000 0x200>;
^^^^^^^^^^
....
usbh: usb@
30b30000 {
compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
reg = <0x30b30000 0x200>;
^^^^^^^^^^
....
Which was leading to usb enumeration issues:
Colibri iMX7 # usb start
starting USB...
Bus usb@
30b10000: USB EHCI 1.00
Bus usb@
30b20000: probe failed, error -22
scanning bus usb@
30b10000 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Fixes:
501547cec1("usb: ehci-mx6: Fix bus enumeration for DM case")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Michal Simek [Mon, 21 Oct 2019 10:20:16 +0000 (12:20 +0200)]
microblaze: Fix tab indentation in start.S
Use tab instead of spaces.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 21 Oct 2019 10:54:20 +0000 (12:54 +0200)]
common: command: Fix manual relocation for repeatable command
All platforms which are using MANUAL_RELOC are jumping back to origin
location when repeatable command is called. The reason is that cmd_rep link
is not updated properly. Issue can be reproduced by rewriting origin
U-Boot location through (for example) file download by tftp command.
Fixes:
80a48dd47e3b ("common: command: Rework the 'cmd is repeatable' logic")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 17 Oct 2019 11:16:56 +0000 (13:16 +0200)]
microblaze: Unify Linux bootm process
Record two bootstages and add "Starting kernel" message to have standard
handoff message between U-Boot and OS.
Also use debug() instead of #ifdef DEBUG to clean the code.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 17 Oct 2019 12:12:48 +0000 (14:12 +0200)]
microblaze: Fix FDT message in boot_prep_linux()
There is no need to show FDT message in regular flow that's why switch it
to debug level.
Fixes:
0905046050b0 ("microblaze: Switch to generic bootm implementation")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Oct 2019 10:37:20 +0000 (12:37 +0200)]
arm64: zynqmp: Add support for e-a2197-00 System Controller
Add support for System Controller available on e-a2197-00 base board.
System is very similar to p-a2197-00 board.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Oct 2019 10:07:30 +0000 (12:07 +0200)]
arm64: zynqmp: Enables SPI_FLASH_BAR
Enable the SPI flash Bank/Extended address register support for all ZynqMP
boards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Oct 2019 11:03:50 +0000 (13:03 +0200)]
ARM: zynq: Disable fdt and evn exist for cse_qspi
Mini u-boot should be really small that's why it is necessary to disable
all unneeded configs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Oct 2019 11:06:32 +0000 (13:06 +0200)]
ARM: zynq: Remove unused board_early_init_f()
board_early_init_f added by commit
e6cc3b25d721
("arm: zynq: Wire watchdog internals") is no longer needed that's why
remove it also with Kconfig enabling.
Fixes:
ccd063e9812a ("watchdog: Move watchdog_dev to data section (BSS may not be cleared)")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Oct 2019 11:04:14 +0000 (13:04 +0200)]
ARM: zynq: Dont use 4K sector size support for mini qspi configuration
This patch removes 4K sector size support for Zynq mini qspi configuration
in favour of fast erase speed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Mon, 22 Jul 2019 17:44:02 +0000 (23:14 +0530)]
arm64: zynqmp: Dont use 4K sector size support for mini qspi configuration
This patch removes 4K sector size support for ZynqMP mini qspi
configuration in favour of fast erase speed.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Sat, 16 Mar 2019 12:21:26 +0000 (17:51 +0530)]
arm64: zynqmp: Enable Micrel phy support for xilinx zc1275 revB
This patch enables Micrel phy support for Xilinx ZynqMP zc1275
revB board.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 27 May 2019 12:55:01 +0000 (14:55 +0200)]
arm64: versal: Enable BDI for mini mtest configuration
bdi is useful to see how memory is mapped.
Also enable 3 memory banks to be mapped.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 6 Aug 2019 10:07:10 +0000 (12:07 +0200)]
arm64: zynqmp: Add support for zcu216
zcu104/6 defconfig was used as source. Standard features are enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 28 Jun 2019 11:53:45 +0000 (13:53 +0200)]
arm64: zynqmp: Add support for m-a2197-03
It is based on m-a2197-01 with some changes in i2c intrastructure.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 28 Jun 2019 11:18:50 +0000 (13:18 +0200)]
arm64: zynqmp: Add support for m-a2197-02
It is based on m-a2197-01 with some changes in i2c intrastructure.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 18 Jul 2018 07:25:43 +0000 (09:25 +0200)]
arm64: zynqmp: List lpd watchdog in dtsi
There are use cases where lpd watchdog can be configured for APU use. By
design this IP should be listed in zynqmp.dtsi to make sure that node is
properly enabled by DTG.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 14 Oct 2019 13:56:31 +0000 (15:56 +0200)]
arm64: zynqmp: Use power header in zynqmp.dtsi
Use power header and add power-domains property.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 14 Oct 2019 13:55:53 +0000 (15:55 +0200)]
arm64: zynqmp: Use reset header in zynqmp.dtsi
Wire reset-controller and use macros from reset header.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 19 Feb 2019 10:32:24 +0000 (11:32 +0100)]
dt-bindings: arm64: zynqmp: Add power and reset headers
Add power and reset headers to be sources by ZynqMP dtses.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 27 Mar 2018 10:53:37 +0000 (12:53 +0200)]
arm64: zynqmp: Use backward compatible string for gem
Add backward compatible string for gem ("cdns,gem").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 14 Oct 2019 13:42:03 +0000 (15:42 +0200)]
arm64: zynqmp: Switch to xlnx-zynqmp-clk header
Use prepared header instead of hardcoded values.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rajan Vaja [Fri, 22 Feb 2019 12:16:24 +0000 (04:16 -0800)]
dt-bindings: clock: zynqmp: Add clk header
Add dt clock header which can be included by dtses. And also use zynqmp-clk
compatible string.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Naga Sureshkumar Relli [Mon, 23 Jan 2017 10:50:37 +0000 (16:20 +0530)]
arm64: zynqmp: Update nand device tree node properties
This patch updates the nand device tree node properties as per
updated driver.
Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 14 Oct 2019 13:52:17 +0000 (15:52 +0200)]
arm64: zynqmp: Fix DT style for ipi mailbox
Remove additional empty space.
Fixes:
95497afada58 ("arm64: zynqmp: add firmware and mailbox node to DT")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Fri, 26 Apr 2019 10:34:44 +0000 (16:04 +0530)]
zynqmp: configs: Add single nand flash mini u-boot configuration
This patch adds configuration for single nand flash mini u-boot.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Sat, 16 Mar 2019 09:53:03 +0000 (15:23 +0530)]
common: image-sig.c: Add manual relocation
This patch adds manual relocation for struct checksum_algo & struct
crypto_algo structures.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Sat, 16 Mar 2019 09:53:02 +0000 (15:23 +0530)]
drivers: crypto: rsa_mod_exp: Add manual relocation for ops->mod_exp()
This patch adds manual relocation for Modular Exponentiation if
CONFIG_NEEDS_MANUAL_RELOC is enabled.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Sat, 16 Mar 2019 09:53:01 +0000 (15:23 +0530)]
common: hash: Manually relocate struct hash_algo
This patch adds manual relocation for struct hash_algo if
CONFIG_NEEDS_MANUAL_RELOC is enabled.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 26 Aug 2019 10:25:30 +0000 (12:25 +0200)]
ARM: dt: Also clean dtbo files
dtbo files can be also generated that's why also clean them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 6 Jun 2019 11:39:53 +0000 (13:39 +0200)]
arm64: zynqmp: Do not remove dpll_prog from psu_init
dpll_prog is available in some psu_init files that's why this function
should stay there.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 1 Oct 2019 13:52:35 +0000 (15:52 +0200)]
arm64: versal: Fix sdhci node address for versal-mini-emmc1
Add missing trailing 0 to mach node name address with reg property.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 14 Oct 2019 10:55:47 +0000 (12:55 +0200)]
spi: zynqmp: Remove unused platform headers
There is no reason to include clk.h and hardware.h headers.
Driver doesn't require them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Wed, 7 Aug 2019 07:33:18 +0000 (13:03 +0530)]
arm64: versal: Enable UHS support
This patch enables UHS support for Versal platforms.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Mon, 5 Aug 2019 10:25:00 +0000 (15:55 +0530)]
arm64: versal: Enable bit stream loading support for versal platform.
This patch enables bitstream loading support for Versal platform.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Sat, 27 Apr 2019 05:47:04 +0000 (11:17 +0530)]
arm64: versal: Update boot delay to perform autoboot
Update boot delay to 5 for performing autoboot.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 2 Jul 2019 11:14:17 +0000 (16:44 +0530)]
arm64: versal: Increase SYS_MALLOC_F_LEN
This patch increases SYS_MALLOC_F_LEN as the versal clock
driver needs to be probed before relocation itself inorder
to get required clocks before relocation.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Sun, 23 Jun 2019 06:54:59 +0000 (12:24 +0530)]
arm64: versal: Enable CLK command
Enables clock command for dumping clocks.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 14 Oct 2019 11:01:14 +0000 (13:01 +0200)]
arm64: versal: Enable USB driver support
This patch adds usb host and device mode support for Xilinx
Versal virtual platform. By default USB host functionality
is enabled. To use in usb device mode, set dr_mode property
in DT to peripheral.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 7 Oct 2019 08:33:23 +0000 (10:33 +0200)]
arm64: versal: Enable LIBFDT_OVERLAY
Enable device tree overlay to build all dtbs for Versal with -@ flag to
enable applying overlays.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 26 Aug 2019 07:30:34 +0000 (09:30 +0200)]
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu100
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 12 Mar 2019 09:15:27 +0000 (10:15 +0100)]
arm64: zynqmp: Turn comment to gpio-line-names
Label gpio lines properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 26 Aug 2019 08:20:07 +0000 (10:20 +0200)]
arm64: zynqmp: Add label property to all ina226 on zcu102
Label property is adding capability to distiguish chips from each other
when iio framework is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 16 Aug 2019 08:42:42 +0000 (10:42 +0200)]
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu102
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Harini Katakam [Wed, 13 Mar 2019 14:11:19 +0000 (19:41 +0530)]
arm64: zynqmp: dt: Add optional gpio phy reset properties
Add gpio phy reset via I2C expander TCA6416 on board ZCU102.
A warning call trace is observer in probe when this reset is called
from context that can sleep. Keep this commented until that is
resolved in phylib.
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Harini Katakam [Wed, 13 Feb 2019 11:32:21 +0000 (17:02 +0530)]
arm64: zynqmp: dt: Add missing DP83867 quirk
The DP83867 strap control workaround is already present in Linux kernel
mainline binding. All these Xilinx boards require this quirk.
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 7 Mar 2019 07:15:52 +0000 (08:15 +0100)]
arm64: zynqmp: Enable fpd_dma for zcu104 platforms
Enable fpd_dma for these boards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 26 Aug 2019 07:40:23 +0000 (09:40 +0200)]
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu104
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 26 Aug 2019 08:18:13 +0000 (10:18 +0200)]
arm64: zynqmp: Add label property to all ina226 on zcu106
Label property is adding capability to distiguish chips from each other
when iio framework is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>