First Commit
[librecmc/package-feed.git] / libs / libaio / patches / 003_arches_sparc64.patch
1 ---
2  src/syscall-sparc64.h |   98 ++++++++++++++++++++++++++++++++++++++++++++++++++
3  src/syscall.h         |    2 +
4  2 files changed, 100 insertions(+)
5
6 --- a/src/syscall.h
7 +++ b/src/syscall.h
8 @@ -24,6 +24,8 @@
9  #include "syscall-alpha.h"
10  #elif defined(__arm__)
11  #include "syscall-arm.h"
12 +#elif defined(__sparc__) && defined(__arch64__)
13 +#include "syscall-sparc64.h"
14  #elif defined(__sparc__)
15  #include "syscall-sparc.h"
16  #elif defined(__aarch64__)
17 --- /dev/null
18 +++ b/src/syscall-sparc64.h
19 @@ -0,0 +1,98 @@
20 +#define __NR_io_setup          268
21 +#define __NR_io_destroy                269
22 +#define __NR_io_submit         270
23 +#define __NR_io_cancel         271
24 +#define __NR_io_getevents      272
25 +
26 +#define io_syscall1(type,fname,sname,type1,arg1)                         \
27 +type fname(type1 arg1)                                                   \
28 +{                                                                        \
29 +       unsigned long __res;                                              \
30 +       register unsigned long __g1 __asm__("g1") = __NR_##sname;         \
31 +       register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
32 +       __asm__ __volatile__("t         0x6d\n\t"                         \
33 +                            "sub       %%g0, %%o0, %0\n\t"               \
34 +                            "movcc     %%xcc, %%o0, %0\n"                \
35 +                            "1:"                                         \
36 +                            : "=r" (__res), "=&r" (__o0)                 \
37 +                            : "1" (__o0), "r" (__g1)                     \
38 +                            : "cc");                                     \
39 +       return (type) __res;                                              \
40 +}
41 +
42 +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2)              \
43 +type fname(type1 arg1, type2 arg2)                                       \
44 +{                                                                        \
45 +       unsigned long __res;                                              \
46 +       register unsigned long __g1 __asm__("g1") = __NR_##sname;         \
47 +       register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
48 +       register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
49 +       __asm__ __volatile__("t         0x6d\n\t"                         \
50 +                            "sub       %%g0, %%o0, %0\n\t"               \
51 +                            "movcc     %%xcc, %%o0, %0\n"                \
52 +                            "1:"                                         \
53 +                            : "=r" (__res), "=&r" (__o0)                 \
54 +                            : "1" (__o0), "r" (__o1), "r" (__g1)         \
55 +                            : "cc");                                     \
56 +       return (type) __res;                                              \
57 +}
58 +
59 +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3)   \
60 +type fname(type1 arg1, type2 arg2, type3 arg3)                           \
61 +{                                                                        \
62 +       unsigned long __res;                                              \
63 +       register unsigned long __g1 __asm__("g1") = __NR_##sname;         \
64 +       register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
65 +       register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
66 +       register unsigned long __o2 __asm__("o2") = (unsigned long) arg3; \
67 +       __asm__ __volatile__("t         0x6d\n\t"                         \
68 +                            "sub       %%g0, %%o0, %0\n\t"               \
69 +                            "movcc     %%xcc, %%o0, %0\n"                \
70 +                            "1:"                                         \
71 +                            : "=r" (__res), "=&r" (__o0)                 \
72 +                            : "1" (__o0), "r" (__o1), "r" (__o2),        \
73 +                              "r" (__g1)                                 \
74 +                            : "cc");                                     \
75 +       return (type) __res;                                              \
76 +}
77 +
78 +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
79 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4)               \
80 +{                                                                        \
81 +       unsigned long __res;                                              \
82 +       register unsigned long __g1 __asm__("g1") = __NR_##sname;         \
83 +       register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
84 +       register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
85 +       register unsigned long __o2 __asm__("o2") = (unsigned long) arg3; \
86 +       register unsigned long __o3 __asm__("o3") = (unsigned long) arg4; \
87 +       __asm__ __volatile__("t         0x6d\n\t"                         \
88 +                            "sub       %%g0, %%o0, %0\n\t"               \
89 +                            "movcc     %%xcc, %%o0, %0\n"                \
90 +                            "1:"                                         \
91 +                            : "=r" (__res), "=&r" (__o0)                 \
92 +                            : "1" (__o0), "r" (__o1), "r" (__o2),        \
93 +                              "r" (__o3), "r" (__g1)                     \
94 +                            : "cc");                                     \
95 +       return (type) __res;                                              \
96 +}
97 +
98 +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
99 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5)   \
100 +{                                                                        \
101 +       unsigned long __res;                                              \
102 +       register unsigned long __g1 __asm__("g1") = __NR_##sname;         \
103 +       register unsigned long __o0 __asm__("o0") = (unsigned long) arg1; \
104 +       register unsigned long __o1 __asm__("o1") = (unsigned long) arg2; \
105 +       register unsigned long __o2 __asm__("o2") = (unsigned long) arg3; \
106 +       register unsigned long __o3 __asm__("o3") = (unsigned long) arg4; \
107 +       register unsigned long __o4 __asm__("o4") = (unsigned long) arg5; \
108 +       __asm__ __volatile__("t         0x6d\n\t"                         \
109 +                            "sub       %%g0, %%o0, %0\n\t"               \
110 +                            "movcc     %%xcc, %%o0, %0\n"                \
111 +                            "1:"                                         \
112 +                            : "=r" (__res), "=&r" (__o0)                 \
113 +                            : "1" (__o0), "r" (__o1), "r" (__o2),        \
114 +                              "r" (__o3), "r" (__o4), "r" (__g1)         \
115 +                            : "cc");                                     \
116 +       return (type) __res;                                              \
117 +}