4 src/syscall-m68k.h | 78 +++++++++++++++++
5 src/syscall-mips.h | 223 +++++++++++++++++++++++++++++++++++++++++++++++++++
6 src/syscall-parisc.h | 146 +++++++++++++++++++++++++++++++++
7 src/syscall-sparc.h | 20 +++-
9 7 files changed, 479 insertions(+), 5 deletions(-)
12 +++ b/src/syscall-m68k.h
14 +#define __NR_io_setup 241
15 +#define __NR_io_destroy 242
16 +#define __NR_io_getevents 243
17 +#define __NR_io_submit 244
18 +#define __NR_io_cancel 245
20 +#define io_syscall1(type,fname,sname,atype,a) \
21 +type fname(atype a) \
23 +register long __res __asm__ ("%d0") = __NR_##sname; \
24 +register long __a __asm__ ("%d1") = (long)(a); \
25 +__asm__ __volatile__ ("trap #0" \
28 +return (type) __res; \
31 +#define io_syscall2(type,fname,sname,atype,a,btype,b) \
32 +type fname(atype a,btype b) \
34 +register long __res __asm__ ("%d0") = __NR_##sname; \
35 +register long __a __asm__ ("%d1") = (long)(a); \
36 +register long __b __asm__ ("%d2") = (long)(b); \
37 +__asm__ __volatile__ ("trap #0" \
39 + : "d" (__a), "d" (__b) \
41 +return (type) __res; \
44 +#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \
45 +type fname(atype a,btype b,ctype c) \
47 +register long __res __asm__ ("%d0") = __NR_##sname; \
48 +register long __a __asm__ ("%d1") = (long)(a); \
49 +register long __b __asm__ ("%d2") = (long)(b); \
50 +register long __c __asm__ ("%d3") = (long)(c); \
51 +__asm__ __volatile__ ("trap #0" \
53 + : "d" (__a), "d" (__b), \
56 +return (type) __res; \
59 +#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \
60 +type fname (atype a, btype b, ctype c, dtype d) \
62 +register long __res __asm__ ("%d0") = __NR_##sname; \
63 +register long __a __asm__ ("%d1") = (long)(a); \
64 +register long __b __asm__ ("%d2") = (long)(b); \
65 +register long __c __asm__ ("%d3") = (long)(c); \
66 +register long __d __asm__ ("%d4") = (long)(d); \
67 +__asm__ __volatile__ ("trap #0" \
69 + : "d" (__a), "d" (__b), \
70 + "d" (__c), "d" (__d) \
72 +return (type) __res; \
75 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
76 +type fname (atype a,btype b,ctype c,dtype d,etype e) \
78 +register long __res __asm__ ("%d0") = __NR_##sname; \
79 +register long __a __asm__ ("%d1") = (long)(a); \
80 +register long __b __asm__ ("%d2") = (long)(b); \
81 +register long __c __asm__ ("%d3") = (long)(c); \
82 +register long __d __asm__ ("%d4") = (long)(d); \
83 +register long __e __asm__ ("%d5") = (long)(e); \
84 +__asm__ __volatile__ ("trap #0" \
86 + : "d" (__a), "d" (__b), \
87 + "d" (__c), "d" (__d), "d" (__e) \
89 +return (type) __res; \
95 #include "syscall-sparc.h"
96 #elif defined(__aarch64__)
97 #include "syscall-arm64.h"
98 +#elif defined(__m68k__)
99 +#include "syscall-m68k.h"
100 +#elif defined(__hppa__)
101 +#include "syscall-parisc.h"
102 +#elif defined(__mips__)
103 +#include "syscall-mips.h"
105 #warning "using generic syscall method"
106 #include "syscall-generic.h"
108 +++ b/src/syscall-mips.h
111 + * This file is subject to the terms and conditions of the GNU General Public
112 + * License. See the file "COPYING" in the main directory of this archive
113 + * for more details.
115 + * Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle
116 + * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
118 + * Changed system calls macros _syscall5 - _syscall7 to push args 5 to 7 onto
119 + * the stack. Robin Farine for ACN S.A, Copyright (C) 1996 by ACN S.A
122 +#ifndef _MIPS_SIM_ABI32
123 +#define _MIPS_SIM_ABI32 1
124 +#define _MIPS_SIM_NABI32 2
125 +#define _MIPS_SIM_ABI64 3
128 +#if _MIPS_SIM == _MIPS_SIM_ABI32
131 + * Linux o32 style syscalls are in the range from 4000 to 4999.
133 +#define __NR_Linux 4000
134 +#define __NR_io_setup (__NR_Linux + 241)
135 +#define __NR_io_destroy (__NR_Linux + 242)
136 +#define __NR_io_getevents (__NR_Linux + 243)
137 +#define __NR_io_submit (__NR_Linux + 244)
138 +#define __NR_io_cancel (__NR_Linux + 245)
140 +#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
142 +#if _MIPS_SIM == _MIPS_SIM_ABI64
145 + * Linux 64-bit syscalls are in the range from 5000 to 5999.
147 +#define __NR_Linux 5000
148 +#define __NR_io_setup (__NR_Linux + 200)
149 +#define __NR_io_destroy (__NR_Linux + 201)
150 +#define __NR_io_getevents (__NR_Linux + 202)
151 +#define __NR_io_submit (__NR_Linux + 203)
152 +#define __NR_io_cancel (__NR_Linux + 204)
153 +#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
155 +#if _MIPS_SIM == _MIPS_SIM_NABI32
158 + * Linux N32 syscalls are in the range from 6000 to 6999.
160 +#define __NR_Linux 6000
161 +#define __NR_io_setup (__NR_Linux + 200)
162 +#define __NR_io_destroy (__NR_Linux + 201)
163 +#define __NR_io_getevents (__NR_Linux + 202)
164 +#define __NR_io_submit (__NR_Linux + 203)
165 +#define __NR_io_cancel (__NR_Linux + 204)
166 +#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
168 +#define io_syscall1(type,fname,sname,atype,a) \
169 +type fname(atype a) \
171 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
172 + register unsigned long __a3 asm("$7"); \
173 + unsigned long __v0; \
175 + __asm__ volatile ( \
176 + ".set\tnoreorder\n\t" \
177 + "li\t$2, %3\t\t\t# " #fname "\n\t" \
179 + "move\t%0, $2\n\t" \
181 + : "=&r" (__v0), "=r" (__a3) \
182 + : "r" (__a0), "i" (__NR_##sname) \
183 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
187 + return (type) __v0; \
188 + return (type) -1; \
191 +#define io_syscall2(type,fname,sname,atype,a,btype,b) \
192 +type fname(atype a, btype b) \
194 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
195 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
196 + register unsigned long __a3 asm("$7"); \
197 + unsigned long __v0; \
199 + __asm__ volatile ( \
200 + ".set\tnoreorder\n\t" \
201 + "li\t$2, %4\t\t\t# " #fname "\n\t" \
203 + "move\t%0, $2\n\t" \
205 + : "=&r" (__v0), "=r" (__a3) \
206 + : "r" (__a0), "r" (__a1), "i" (__NR_##sname) \
207 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
211 + return (type) __v0; \
212 + return (type) -1; \
215 +#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \
216 +type fname(atype a, btype b, ctype c) \
218 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
219 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
220 + register unsigned long __a2 asm("$6") = (unsigned long) c; \
221 + register unsigned long __a3 asm("$7"); \
222 + unsigned long __v0; \
224 + __asm__ volatile ( \
225 + ".set\tnoreorder\n\t" \
226 + "li\t$2, %5\t\t\t# " #fname "\n\t" \
228 + "move\t%0, $2\n\t" \
230 + : "=&r" (__v0), "=r" (__a3) \
231 + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \
232 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
236 + return (type) __v0; \
237 + return (type) -1; \
240 +#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \
241 +type fname(atype a, btype b, ctype c, dtype d) \
243 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
244 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
245 + register unsigned long __a2 asm("$6") = (unsigned long) c; \
246 + register unsigned long __a3 asm("$7") = (unsigned long) d; \
247 + unsigned long __v0; \
249 + __asm__ volatile ( \
250 + ".set\tnoreorder\n\t" \
251 + "li\t$2, %5\t\t\t# " #fname "\n\t" \
253 + "move\t%0, $2\n\t" \
255 + : "=&r" (__v0), "+r" (__a3) \
256 + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \
257 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
261 + return (type) __v0; \
262 + return (type) -1; \
265 +#if (_MIPS_SIM == _MIPS_SIM_ABI32)
268 + * Using those means your brain needs more than an oil change ;-)
271 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
272 +type fname(atype a, btype b, ctype c, dtype d, etype e) \
274 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
275 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
276 + register unsigned long __a2 asm("$6") = (unsigned long) c; \
277 + register unsigned long __a3 asm("$7") = (unsigned long) d; \
278 + unsigned long __v0; \
280 + __asm__ volatile ( \
281 + ".set\tnoreorder\n\t" \
283 + "subu\t$29, 32\n\t" \
284 + "sw\t$2, 16($29)\n\t" \
285 + "li\t$2, %5\t\t\t# " #fname "\n\t" \
287 + "move\t%0, $2\n\t" \
288 + "addiu\t$29, 32\n\t" \
290 + : "=&r" (__v0), "+r" (__a3) \
291 + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname), \
292 + "m" ((unsigned long)e) \
293 + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
297 + return (type) __v0; \
298 + return (type) -1; \
301 +#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
303 +#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
305 +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
306 +type fname (atype a,btype b,ctype c,dtype d,etype e) \
308 + register unsigned long __a0 asm("$4") = (unsigned long) a; \
309 + register unsigned long __a1 asm("$5") = (unsigned long) b; \
310 + register unsigned long __a2 asm("$6") = (unsigned long) c; \
311 + register unsigned long __a3 asm("$7") = (unsigned long) d; \
312 + register unsigned long __a4 asm("$8") = (unsigned long) e; \
313 + unsigned long __v0; \
315 + __asm__ volatile ( \
316 + ".set\tnoreorder\n\t" \
317 + "li\t$2, %6\t\t\t# " #fname "\n\t" \
319 + "move\t%0, $2\n\t" \
321 + : "=&r" (__v0), "+r" (__a3) \
322 + : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##sname) \
323 + : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
327 + return (type) __v0; \
328 + return (type) -1; \
331 +#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
335 @@ -66,6 +66,7 @@ typedef enum io_iocb_cmd {
337 /* big endian, 64 bits */
338 #elif defined(__powerpc64__) || defined(__s390x__) || \
339 + (defined(__hppa__) && defined(__arch64__)) || \
340 (defined(__sparc__) && defined(__arch64__)) || \
341 (defined(__aarch64__) && defined(__AARCH64EB__))
342 #define PADDED(x, y) unsigned y; x
344 +++ b/src/syscall-parisc.h
347 + * Linux system call numbers.
349 + * Cary Coutant says that we should just use another syscall gateway
350 + * page to avoid clashing with the HPUX space, and I think he's right:
351 + * it will would keep a branch out of our syscall entry path, at the
352 + * very least. If we decide to change it later, we can ``just'' tweak
353 + * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be
354 + * 1024 or something. Oh, and recompile libc. =)
356 + * 64-bit HPUX binaries get the syscall gateway address passed in a register
357 + * from the kernel at startup, which seems a sane strategy.
360 +#define __NR_Linux 0
361 +#define __NR_io_setup (__NR_Linux + 215)
362 +#define __NR_io_destroy (__NR_Linux + 216)
363 +#define __NR_io_getevents (__NR_Linux + 217)
364 +#define __NR_io_submit (__NR_Linux + 218)
365 +#define __NR_io_cancel (__NR_Linux + 219)
367 +#define SYS_ify(syscall_name) __NR_##syscall_name
369 +/* Assume all syscalls are done from PIC code just to be
370 + * safe. The worst case scenario is that you lose a register
371 + * and save/restore r19 across the syscall. */
374 +/* Definition taken from glibc 2.3.3
375 + * sysdeps/unix/sysv/linux/hppa/sysdep.h
379 +/* WARNING: CANNOT BE USED IN A NOP! */
380 +# define K_STW_ASM_PIC " copy %%r19, %%r4\n"
381 +# define K_LDW_ASM_PIC " copy %%r4, %%r19\n"
382 +# define K_USING_GR4 "%r4",
384 +# define K_STW_ASM_PIC " \n"
385 +# define K_LDW_ASM_PIC " \n"
386 +# define K_USING_GR4
389 +/* GCC has to be warned that a syscall may clobber all the ABI
390 + registers listed as "caller-saves", see page 8, Table 2
391 + in section 2.2.6 of the PA-RISC RUN-TIME architecture
392 + document. However! r28 is the result and will conflict with
393 + the clobber list so it is left out. Also the input arguments
394 + registers r20 -> r26 will conflict with the list so they
395 + are treated specially. Although r19 is clobbered by the syscall
396 + we cannot say this because it would violate ABI, thus we say
397 + r4 is clobbered and use that register to save/restore r19
398 + across the syscall. */
400 +#define K_CALL_CLOB_REGS "%r1", "%r2", K_USING_GR4 \
401 + "%r20", "%r29", "%r31"
403 +#undef K_INLINE_SYSCALL
404 +#define K_INLINE_SYSCALL(name, nr, args...) ({ \
407 + register unsigned long __res __asm__("r28"); \
408 + K_LOAD_ARGS_##nr(args) \
409 + /* FIXME: HACK stw/ldw r19 around syscall */ \
410 + __asm__ volatile( \
412 + " ble 0x100(%%sr2, %%r0)\n" \
413 + " ldi %1, %%r20\n" \
416 + : "i" (SYS_ify(name)) K_ASM_ARGS_##nr \
417 + : "memory", K_CALL_CLOB_REGS K_CLOB_ARGS_##nr \
419 + __sys_res = (long)__res; \
424 +#define K_LOAD_ARGS_0()
425 +#define K_LOAD_ARGS_1(r26) \
426 + register unsigned long __r26 __asm__("r26") = (unsigned long)(r26); \
428 +#define K_LOAD_ARGS_2(r26,r25) \
429 + register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \
431 +#define K_LOAD_ARGS_3(r26,r25,r24) \
432 + register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \
433 + K_LOAD_ARGS_2(r26,r25)
434 +#define K_LOAD_ARGS_4(r26,r25,r24,r23) \
435 + register unsigned long __r23 __asm__("r23") = (unsigned long)(r23); \
436 + K_LOAD_ARGS_3(r26,r25,r24)
437 +#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \
438 + register unsigned long __r22 __asm__("r22") = (unsigned long)(r22); \
439 + K_LOAD_ARGS_4(r26,r25,r24,r23)
440 +#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \
441 + register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \
442 + K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
444 +/* Even with zero args we use r20 for the syscall number */
445 +#define K_ASM_ARGS_0
446 +#define K_ASM_ARGS_1 K_ASM_ARGS_0, "r" (__r26)
447 +#define K_ASM_ARGS_2 K_ASM_ARGS_1, "r" (__r25)
448 +#define K_ASM_ARGS_3 K_ASM_ARGS_2, "r" (__r24)
449 +#define K_ASM_ARGS_4 K_ASM_ARGS_3, "r" (__r23)
450 +#define K_ASM_ARGS_5 K_ASM_ARGS_4, "r" (__r22)
451 +#define K_ASM_ARGS_6 K_ASM_ARGS_5, "r" (__r21)
453 +/* The registers not listed as inputs but clobbered */
454 +#define K_CLOB_ARGS_6
455 +#define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21"
456 +#define K_CLOB_ARGS_4 K_CLOB_ARGS_5, "%r22"
457 +#define K_CLOB_ARGS_3 K_CLOB_ARGS_4, "%r23"
458 +#define K_CLOB_ARGS_2 K_CLOB_ARGS_3, "%r24"
459 +#define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25"
460 +#define K_CLOB_ARGS_0 K_CLOB_ARGS_1, "%r26"
462 +#define io_syscall1(type,fname,sname,type1,arg1) \
463 +type fname(type1 arg1) \
465 + return K_INLINE_SYSCALL(sname, 1, arg1); \
468 +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
469 +type fname(type1 arg1, type2 arg2) \
471 + return K_INLINE_SYSCALL(sname, 2, arg1, arg2); \
474 +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
475 +type fname(type1 arg1, type2 arg2, type3 arg3) \
477 + return K_INLINE_SYSCALL(sname, 3, arg1, arg2, arg3); \
480 +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
481 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
483 + return K_INLINE_SYSCALL(sname, 4, arg1, arg2, arg3, arg4); \
486 +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
487 +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
489 + return K_INLINE_SYSCALL(sname, 5, arg1, arg2, arg3, arg4, arg5); \
498 +#if defined(__i386__) || defined(__powerpc__) || defined(__mips__)
499 #define KERNEL_RW_POINTER ((void *)0xc0010000)
500 +#elif defined(__arm__) || defined(__m68k__) || defined(__s390__)
501 +#define KERNEL_RW_POINTER ((void *)0x00010000)
502 +#elif defined(__hppa__)
503 +#define KERNEL_RW_POINTER ((void *)0x10100000)
504 +#elif defined(__sparc__)
505 +#define KERNEL_RW_POINTER ((void *)0xf0010000)
507 +#error Unknown kernel memory address.
510 //#warning Not really sure where kernel memory is. Guessing.
511 #define KERNEL_RW_POINTER ((void *)0xffffffff81000000)
512 --- a/src/syscall-sparc.h
513 +++ b/src/syscall-sparc.h
514 @@ -20,7 +20,9 @@ __asm__ __volatile__ ("t 0x10\n\t" \
515 : "=r" (__res), "=&r" (__o0) \
516 : "1" (__o0), "r" (__g1) \
518 -return (type) __res; \
519 +if (__res < -255 || __res >= 0) \
520 + return (type) __res; \
524 #define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
525 @@ -38,7 +40,9 @@ __asm__ __volatile__ ("t 0x10\n\t" \
526 : "=r" (__res), "=&r" (__o0) \
527 : "1" (__o0), "r" (__o1), "r" (__g1) \
529 -return (type) __res; \
530 +if (__res < -255 || __res >= 0) \
531 + return (type) __res; \
535 #define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
536 @@ -57,7 +61,9 @@ __asm__ __volatile__ ("t 0x10\n\t" \
537 : "=r" (__res), "=&r" (__o0) \
538 : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__g1) \
540 -return (type) __res; \
541 +if (__res < -255 || __res >= 0) \
542 + return (type) __res; \
546 #define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
547 @@ -77,7 +83,9 @@ __asm__ __volatile__ ("t 0x10\n\t" \
548 : "=r" (__res), "=&r" (__o0) \
549 : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__g1) \
551 -return (type) __res; \
552 +if (__res < -255 || __res >= 0) \
553 + return (type) __res; \
557 #define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
558 @@ -99,5 +107,7 @@ __asm__ __volatile__ ("t 0x10\n\t" \
559 : "=r" (__res), "=&r" (__o0) \
560 : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__o4), "r" (__g1) \
562 -return (type) __res; \
563 +if (__res < -255 || __res >= 0) \
564 + return (type) __res; \