Add watchdog timer control register bit fields for QCA

diff --git a/u-boot/include/soc/qca_soc_common.h b/u-boot/include/soc/qca_soc_common.h
index a6e8d4ecc828104d73ee9665eeb88ea0ba05b2ea..bed9519963ec90393afdc7c7342c8d580fedf602 100644 (file)
--- a/u-boot/include/soc/qca_soc_common.h
+++ b/u-boot/include/soc/qca_soc_common.h
@@ -1493,6 +1493,12 @@
  * Reset control registers BIT fields
  */
 
+/* RST_WATCHDOG_TIMER_CTRL (Watchdog timer control) */
+#define QCA_RST_WATCHDOG_TIMER_CTRL_ACTION_SHIFT       0
+#define QCA_RST_WATCHDOG_TIMER_CTRL_ACTION_MASK                BITS(QCA_RST_WATCHDOG_TIMER_CTRL_ACTION_SHIFT, 2)
+#define QCA_RST_WATCHDOG_TIMER_CTRL_LAST_SHIFT         31
+#define QCA_RST_WATCHDOG_TIMER_CTRL_LAST_MASK          BIT(QCA_RST_WATCHDOG_TIMER_CTRL_LAST_SHIFT)
+
 /* RST_BOOTSTRAP (Reset bootstrap) */
 #if (SOC_TYPE & QCA_AR933X_SOC)
        #define QCA_RST_BOOTSTRAP_REF_CLK_SHIFT         0