u-boot/include/configs/ap143.h

   1 /*
   2  * Copyright (C) 2016 Piotr Dymacz <piotr@dymacz.pl>
   3  *
   4  * This file contains the configuration parameters
   5  * for Qualcomm Atheros QCA953x based devices
   6  *
   7  * Reference designs: AP143
   8  *
   9  * SPDX-License-Identifier: GPL-2.0
  10  */
  11
  12 #ifndef _AP143_H
  13 #define _AP143_H
  14
  15 #include <config.h>
  16 #include <configs/qca9k_common.h>
  17 #include <soc/soc_common.h>
  18
  19 /*
  20  * ==================
  21  * GPIO configuration
  22  * ==================
  23  */
  24 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
  25
  26         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO12 | GPIO14 |\
  27                                                 GPIO15 | GPIO16
  28         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  29         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO3
  30         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L GPIO0 | GPIO1
  31
  32 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)
  33
  34         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO4  | GPIO11 | GPIO14 |\
  35                                                 GPIO15 | GPIO16
  36         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO2 | GPIO3
  37
  38 #elif defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
  39
  40         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO2 | GPIO3
  41         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO12 | GPIO14 |\
  42                                                 GPIO16
  43
  44 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
  45       defined(CONFIG_FOR_COMFAST_CF_E530N)
  46
  47         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11
  48
  49 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE)
  50
  51         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13 | GPIO14
  52         #define CONFIG_QCA_GPIO_MASK_IN         GPIO0 | GPIO1 | GPIO16 | GPIO17
  53         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L GPIO12
  54
  55 #elif defined(CONFIG_FOR_GLINET_GL_AR750)
  56
  57         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13 | GPIO14
  58         #define CONFIG_QCA_GPIO_MASK_IN         GPIO0 | GPIO16 | GPIO17
  59         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO2
  60         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L GPIO12
  61
  62 #elif defined(CONFIG_FOR_P2W_CPE505N)
  63
  64         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
  65                                                 GPIO14 | GPIO15
  66
  67 #elif defined(CONFIG_FOR_P2W_R602N)
  68
  69         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
  70                                                 GPIO14 | GPIO15 | GPIO16
  71
  72 #elif defined(CONFIG_FOR_TPLINK_MR22U_V1)
  73
  74         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
  75         #define CONFIG_QCA_GPIO_MASK_IN         GPIO14 | GPIO16
  76         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO11
  77
  78 #elif defined(CONFIG_FOR_TPLINK_MR3420_V3)
  79
  80         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO1  | GPIO3  | GPIO4  |\
  81                                                 GPIO11 | GPIO13 | GPIO14 |\
  82                                                 GPIO15 | GPIO16
  83         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  84
  85 #elif defined(CONFIG_FOR_TPLINK_MR6400_V1V2)
  86
  87         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0  | GPIO1 | GPIO3 |\
  88                                                 GPIO11 | GPIO16
  89         #define CONFIG_QCA_GPIO_MASK_IN         GPIO14
  90         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO4 | GPIO13
  91
  92 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2)
  93
  94         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0  | GPIO1 | GPIO2  |\
  95                                                 GPIO3  | GPIO4 | GPIO12 |\
  96                                                 GPIO13 | GPIO14
  97         #define CONFIG_QCA_GPIO_MASK_IN         GPIO16
  98         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO15
  99
 100 #elif defined(CONFIG_FOR_TPLINK_WR802N_V1) ||\
 101       defined(CONFIG_FOR_TPLINK_WR820N_V1_CN)
 102
 103         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
 104
 105 #elif defined(CONFIG_FOR_TPLINK_WR810N_V1) ||\
 106       defined(CONFIG_FOR_TPLINK_WR810N_V2)
 107
 108         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
 109         #define CONFIG_QCA_GPIO_MASK_IN         GPIO0 | GPIO1
 110
 111         #if defined(CONFIG_FOR_TPLINK_WR810N_V1)
 112                 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO11
 113         #endif
 114
 115 #elif defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 116       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 117
 118         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO3  | GPIO4  | GPIO11 |\
 119                                                 GPIO13 | GPIO14 | GPIO15 |\
 120                                                 GPIO16
 121         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 122
 123 #elif defined(CONFIG_FOR_TPLINK_WR841N_V11)
 124
 125         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO1  | GPIO2  | GPIO3  |\
 126                                                 GPIO4  | GPIO11 | GPIO13 |\
 127                                                 GPIO14 | GPIO15 | GPIO16
 128         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 129
 130 #elif defined(CONFIG_FOR_TPLINK_WR842N_V3)
 131
 132         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO2  | GPIO3  | GPIO4  |\
 133                                                 GPIO11 | GPIO12 | GPIO13 |\
 134                                                 GPIO14 | GPIO15 | GPIO16 |\
 135                                                 GPIO17
 136         #define CONFIG_QCA_GPIO_MASK_IN         GPIO0
 137
 138 #elif defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 139
 140         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO4 | GPIO15
 141         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO11 | GPIO12
 142         #define CONFIG_QCA_GPIO_MASK_IN         GPIO2 | GPIO14 | GPIO17
 143         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO1 | GPIO13
 144
 145 #elif defined(CONFIG_FOR_WALLYS_DR531)
 146
 147         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11 | GPIO12 | GPIO13 |\
 148                                                 GPIO14 | GPIO15 | GPIO16
 149
 150 #elif defined(CONFIG_FOR_WHQX_E600G_V2)
 151
 152         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4 | GPIO13 | GPIO15 | GPIO16
 153
 154 #elif defined(CONFIG_FOR_WHQX_E600GAC_V2)
 155
 156         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
 157                                                 GPIO13 | GPIO14 | GPIO15 |\
 158                                                 GPIO16
 159         #define CONFIG_QCA_GPIO_MASK_IN         GPIO1
 160
 161 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)
 162
 163         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4 | GPIO12 | GPIO16
 164
 165 #elif defined(CONFIG_FOR_YUNCORE_CPE830)
 166
 167         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO1 | GPIO2  |\
 168                                                 GPIO3 | GPIO4 | GPIO12 |\
 169                                                 GPIO16
 170
 171 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 172
 173         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
 174                                                 GPIO13 | GPIO14 | GPIO15 |\
 175                                                 GPIO16
 176
 177 #endif
 178
 179 /*
 180  * ================
 181  * Default bootargs
 182  * ================
 183  */
 184 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 185
 186         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 187                                 "rootfstype=jffs2,squashfs init=/sbin/init "\
 188                                 "mtdparts=ath-nor0:448k(u-boot),64k(art),1280k(kernel),14528k(rootfs),64k(config)"
 189
 190 #elif defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
 191       defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
 192
 193         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 194                                 "rootfstype=jffs2 init=/sbin/init "\
 195                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),14656k(rootfs),64k(mib0)"
 196
 197 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
 198       defined(CONFIG_FOR_COMFAST_CF_E530N)
 199
 200         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 201                                 "rootfstype=jffs2 init=/sbin/init "\
 202                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)"
 203
 204 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE)
 205
 206         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 207                                 "rootfstype=squashfs init=/sbin/init "\
 208                                 "mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),16000k(firmware),64k(art)ro"
 209
 210 #elif defined(CONFIG_FOR_GLINET_GL_AR750)
 211
 212         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 213                                 "rootfstype=squashfs init=/sbin/init "\
 214                                 "mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),64k(art)ro,16000k(firmware)"
 215
 216 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
 217       defined(CONFIG_FOR_P2W_R602N)      ||\
 218       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 219       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 220       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 221
 222         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 223                                 "rootfstype=squashfs init=/sbin/init "\
 224                                 "mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1472k(kernel),64k(art),16000k(firmware)"
 225
 226 #elif defined(CONFIG_FOR_TPLINK_MR22U_V1)    ||\
 227       defined(CONFIG_FOR_TPLINK_MR6400_V1V2) ||\
 228       defined(CONFIG_FOR_TPLINK_WR810N_V1)   ||\
 229       defined(CONFIG_FOR_TPLINK_WR810N_V2)
 230
 231         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 232                                 "rootfstype=squashfs init=/sbin/init "\
 233                                 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),6912k(rootfs),64k(config),64k(art)"
 234
 235 #elif defined(CONFIG_FOR_TPLINK_MR3420_V3)  ||\
 236       defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
 237       defined(CONFIG_FOR_TPLINK_WR802N_V1)  ||\
 238       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 239       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
 240       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 241
 242         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 243                                 "rootfstype=squashfs init=/sbin/init "\
 244                                 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 245
 246 #elif defined(CONFIG_FOR_TPLINK_WR820N_V1_CN)
 247
 248         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 249                                 "rootfstype=squashfs init=/sbin/init "\
 250                                 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(art)"
 251
 252 #elif defined(CONFIG_FOR_TPLINK_WR842N_V3) ||\
 253       defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 254
 255         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 256                                 "rootfstype=jffs2 init=/sbin/init "\
 257                                 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(ART)"
 258
 259 #elif defined(CONFIG_FOR_WALLYS_DR531)
 260
 261         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 262                                 "rootfstype=jffs2 init=/sbin/init "\
 263                                 "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART)"
 264
 265 #elif defined(CONFIG_FOR_WHQX_E600G_V2) ||\
 266       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 267
 268         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 269                                 "rootfstype=jffs2 init=/sbin/init "\
 270                                 "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1408k(uImage),64k(mib0),64k(ART)"
 271
 272 #endif
 273
 274 /*
 275  * =============================
 276  * Load address and boot command
 277  * =============================
 278  */
 279 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 280
 281         #define CFG_LOAD_ADDR   0x9F080000
 282
 283 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 284       defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 285       defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 286       defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 287       defined(CONFIG_FOR_TPLINK_MR22U_V1)     ||\
 288       defined(CONFIG_FOR_TPLINK_MR3420_V3)    ||\
 289       defined(CONFIG_FOR_TPLINK_MR6400_V1V2)  ||\
 290       defined(CONFIG_FOR_TPLINK_WA850RE_V2)   ||\
 291       defined(CONFIG_FOR_TPLINK_WR802N_V1)    ||\
 292       defined(CONFIG_FOR_TPLINK_WR810N_V1)    ||\
 293       defined(CONFIG_FOR_TPLINK_WR810N_V2)    ||\
 294       defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
 295       defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 296       defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 297       defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
 298       defined(CONFIG_FOR_TPLINK_WR842N_V3)    ||\
 299       defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 300
 301         #define CFG_LOAD_ADDR   0x9F020000
 302
 303 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE) ||\
 304       defined(CONFIG_FOR_P2W_CPE505N)           ||\
 305       defined(CONFIG_FOR_P2W_R602N)             ||\
 306       defined(CONFIG_FOR_WALLYS_DR531)          ||\
 307       defined(CONFIG_FOR_YUNCORE_AP90Q)         ||\
 308       defined(CONFIG_FOR_YUNCORE_CPE830)        ||\
 309       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 310
 311         #define CFG_LOAD_ADDR   0x9F050000
 312
 313 #elif defined(CONFIG_FOR_GLINET_GL_AR750) ||\
 314       defined(CONFIG_FOR_WHQX_E600G_V2)   ||\
 315       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 316
 317         #define CFG_LOAD_ADDR   0x9F070000
 318
 319 #endif
 320
 321 #if defined(CONFIG_FOR_P2W_CPE505N)    ||\
 322     defined(CONFIG_FOR_P2W_R602N)      ||\
 323     defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 324     defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 325     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 326
 327         #define CONFIG_BOOTCOMMAND      "bootm 0x9F050000 || bootm 0x9FE80000"
 328
 329 #else
 330
 331         #define CONFIG_BOOTCOMMAND      "bootm " MK_STR(CFG_LOAD_ADDR)
 332
 333 #endif
 334
 335 /*
 336  * =========================
 337  * Environment configuration
 338  * =========================
 339  */
 340 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 341
 342         #define CFG_ENV_ADDR            0x9F060000
 343         #define CFG_ENV_SIZE            0x10000
 344
 345 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 346       defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 347       defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 348       defined(CONFIG_FOR_COMFAST_CF_E530N)
 349
 350         #define CFG_ENV_ADDR            0x9F018000
 351         #define CFG_ENV_SIZE            0x7C00
 352         #define CFG_ENV_SECT_SIZE       0x10000
 353
 354 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE) ||\
 355       defined(CONFIG_FOR_GLINET_GL_AR750)       ||\
 356       defined(CONFIG_FOR_WHQX_E600G_V2)         ||\
 357       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 358
 359         #define CFG_ENV_ADDR            0x9F040000
 360         #define CFG_ENV_SIZE            0x10000
 361         #define CFG_ENV_SECT_SIZE       0x10000
 362
 363 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
 364       defined(CONFIG_FOR_P2W_R602N)      ||\
 365       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 366       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 367       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 368
 369         #define CFG_ENV_ADDR            0x9F040000
 370         #define CFG_ENV_SIZE            0xFC00
 371         #define CFG_ENV_SECT_SIZE       0x10000
 372
 373 #elif defined(CONFIG_FOR_TPLINK_MR22U_V1)     ||\
 374       defined(CONFIG_FOR_TPLINK_MR3420_V3)    ||\
 375       defined(CONFIG_FOR_TPLINK_MR6400_V1V2)  ||\
 376       defined(CONFIG_FOR_TPLINK_WA850RE_V2)   ||\
 377       defined(CONFIG_FOR_TPLINK_WR802N_V1)    ||\
 378       defined(CONFIG_FOR_TPLINK_WR810N_V1)    ||\
 379       defined(CONFIG_FOR_TPLINK_WR810N_V2)    ||\
 380       defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
 381       defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 382       defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 383       defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
 384       defined(CONFIG_FOR_TPLINK_WR842N_V3)    ||\
 385       defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 386
 387         #define CFG_ENV_ADDR            0x9F01EC00
 388         #define CFG_ENV_SIZE            0x1000
 389         #define CFG_ENV_SECT_SIZE       0x10000
 390
 391 #elif defined(CONFIG_FOR_WALLYS_DR531)
 392
 393         #define CFG_ENV_ADDR            0x9F030000
 394         #define CFG_ENV_SIZE            0xF800
 395         #define CFG_ENV_SECT_SIZE       0x10000
 396
 397 #endif
 398
 399 /*
 400  * ===========================
 401  * List of available baudrates
 402  * ===========================
 403  */
 404 #define CFG_BAUDRATE_TABLE      \
 405                 { 600,    1200,   2400,    4800,    9600,    14400, \
 406                   19200,  28800,  38400,   56000,   57600,   115200 }
 407
 408 /*
 409  * ==================================================
 410  * MAC address/es, model and WPS pin offsets in FLASH
 411  * ==================================================
 412  */
 413 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 414
 415         #define OFFSET_MAC_DATA_BLOCK           0x70000
 416         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 417         #define OFFSET_MAC_ADDRESS              0x00000
 418
 419 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 420       defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 421       defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 422       defined(CONFIG_FOR_COMFAST_CF_E530N)
 423
 424         #define OFFSET_MAC_DATA_BLOCK           0x10000
 425         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 426         #define OFFSET_MAC_ADDRESS              0x00000
 427
 428 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE) ||\
 429       defined(CONFIG_FOR_P2W_CPE505N)           ||\
 430       defined(CONFIG_FOR_P2W_R602N)             ||\
 431       defined(CONFIG_FOR_YUNCORE_AP90Q)         ||\
 432       defined(CONFIG_FOR_YUNCORE_CPE830)        ||\
 433       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 434
 435         #define OFFSET_MAC_DATA_BLOCK           0xFF0000
 436         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 437         #define OFFSET_MAC_ADDRESS              0x000000
 438
 439 #elif defined(CONFIG_FOR_GLINET_GL_AR750)
 440
 441         #define OFFSET_MAC_DATA_BLOCK           0x50000
 442         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 443         #define OFFSET_MAC_ADDRESS              0x00000
 444
 445 #elif defined(CONFIG_FOR_TPLINK_MR22U_V1)     ||\
 446       defined(CONFIG_FOR_TPLINK_MR3420_V3)    ||\
 447       defined(CONFIG_FOR_TPLINK_MR6400_V1V2)  ||\
 448       defined(CONFIG_FOR_TPLINK_WR802N_V1)    ||\
 449       defined(CONFIG_FOR_TPLINK_WR810N_V1)    ||\
 450       defined(CONFIG_FOR_TPLINK_WR810N_V2)    ||\
 451       defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
 452       defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 453       defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 454       defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
 455       defined(CONFIG_FOR_TPLINK_WR842N_V3)
 456
 457         #define OFFSET_MAC_DATA_BLOCK           0x010000
 458         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 459         #define OFFSET_MAC_ADDRESS              0x00FC00
 460         #define OFFSET_ROUTER_MODEL             0x00FD00
 461         #define OFFSET_PIN_NUMBER               0x00FE00
 462
 463 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2)
 464
 465         #define OFFSET_MAC_DATA_BLOCK           0x3c0000
 466         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 467         #define OFFSET_MAC_ADDRESS              0x000008
 468
 469 #elif defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 470
 471         #define OFFSET_MAC_DATA_BLOCK           0x750000
 472         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 473         #define OFFSET_MAC_ADDRESS              0x000008
 474
 475 #elif defined(CONFIG_FOR_WALLYS_DR531)
 476
 477         #define OFFSET_MAC_DATA_BLOCK           0x030000
 478         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 479         #define OFFSET_MAC_ADDRESS              0x00F810
 480
 481 #elif defined(CONFIG_FOR_WHQX_E600G_V2) ||\
 482       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 483
 484         #define OFFSET_MAC_DATA_BLOCK           0x50000
 485         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 486         #define OFFSET_MAC_ADDRESS              0x00400
 487
 488 #endif
 489
 490 /*
 491  * =========================
 492  * Custom changes per device
 493  * =========================
 494  */
 495
 496 /*
 497  * Comfast CF-E520N and E320Nv2 are limited to 64 KB only,
 498  * disable some commands
 499  */
 500 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 501     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 502     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 503     defined(CONFIG_FOR_COMFAST_CF_E530N)
 504
 505         #undef CONFIG_CMD_DHCP
 506         #undef CONFIG_CMD_LOADB
 507         #undef CONFIG_CMD_SNTP
 508         #undef CONFIG_UPG_SCRIPTS_UBOOT
 509
 510 #endif
 511
 512 /*
 513  * ===========================
 514  * HTTP recovery configuration
 515  * ===========================
 516  */
 517 #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_LOAD_ADDR
 518
 519 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 520
 521         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x70000)
 522
 523 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 524       defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 525       defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 526       defined(CONFIG_FOR_COMFAST_CF_E530N)
 527
 528         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x10000)
 529
 530 #elif defined(CONFIG_FOR_GLINET_GL_AR750)
 531
 532         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x50000)
 533
 534 #elif defined(CONFIG_FOR_WHQX_E600G_V2) ||\
 535       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 536
 537         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x60000)
 538
 539 #endif
 540
 541 /* Firmware size limit */
 542 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 543
 544         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (512 * 1024)
 545
 546 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 547       defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 548       defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 549       defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 550       defined(CONFIG_FOR_TPLINK_MR22U_V1)     ||\
 551       defined(CONFIG_FOR_TPLINK_MR3420_V3)    ||\
 552       defined(CONFIG_FOR_TPLINK_MR6400_V1V2)  ||\
 553       defined(CONFIG_FOR_TPLINK_WR802N_V1)    ||\
 554       defined(CONFIG_FOR_TPLINK_WR810N_V1)    ||\
 555       defined(CONFIG_FOR_TPLINK_WR810N_V2)    ||\
 556       defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
 557       defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 558       defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 559       defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
 560       defined(CONFIG_FOR_TPLINK_WR842N_V3)
 561
 562         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 563
 564 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE) ||\
 565       defined(CONFIG_FOR_GLINET_GL_AR750)       ||\
 566       defined(CONFIG_FOR_P2W_CPE505N)           ||\
 567       defined(CONFIG_FOR_P2W_R602N)             ||\
 568       defined(CONFIG_FOR_WALLYS_DR531)          ||\
 569       defined(CONFIG_FOR_YUNCORE_AP90Q)         ||\
 570       defined(CONFIG_FOR_YUNCORE_CPE830)        ||\
 571       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 572
 573         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (384 * 1024)
 574
 575 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
 576       defined(CONFIG_FOR_WHQX_E600G_V2)     ||\
 577       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 578
 579         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (448 * 1024)
 580
 581 #elif defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 582
 583         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (832 * 1024)
 584
 585 #endif
 586
 587 /*
 588  * ========================
 589  * PLL/Clocks configuration
 590  * ========================
 591  */
 592 #if defined(CONFIG_FOR_TPLINK_MR22U_V1)     ||\
 593     defined(CONFIG_FOR_TPLINK_WA850RE_V2)   ||\
 594     defined(CONFIG_FOR_TPLINK_WR802N_V1)    ||\
 595     defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
 596     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 597
 598         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_550_400_200
 599
 600 #else
 601
 602         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_650_400_200
 603
 604 #endif
 605
 606
 607 #if defined(CONFIG_FOR_ALFA_NETWORK_R36A)
 608
 609         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x70000
 610         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 611
 612 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 613       defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 614       defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 615       defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 616       defined(CONFIG_FOR_TPLINK_MR22U_V1)     ||\
 617       defined(CONFIG_FOR_TPLINK_MR3420_V3)    ||\
 618       defined(CONFIG_FOR_TPLINK_MR6400_V1V2)  ||\
 619       defined(CONFIG_FOR_TPLINK_WA850RE_V2)   ||\
 620       defined(CONFIG_FOR_TPLINK_WR802N_V1)    ||\
 621       defined(CONFIG_FOR_TPLINK_WR810N_V1)    ||\
 622       defined(CONFIG_FOR_TPLINK_WR810N_V2)    ||\
 623       defined(CONFIG_FOR_TPLINK_WR820N_V1_CN) ||\
 624       defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 625       defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 626       defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
 627       defined(CONFIG_FOR_TPLINK_WR842N_V3)    ||\
 628       defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 629
 630         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000
 631         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 632
 633 #elif defined(CONFIG_FOR_GLINET_GL_AR300M_LITE)
 634
 635         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0xFF0000
 636         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x010000
 637
 638 #elif defined(CONFIG_FOR_GLINET_GL_AR750) ||\
 639       defined(CONFIG_FOR_WHQX_E600G_V2)   ||\
 640       defined(CONFIG_FOR_WHQX_E600GAC_V2)
 641
 642         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x50000
 643         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 644
 645 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
 646       defined(CONFIG_FOR_P2W_R602N)      ||\
 647       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 648       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 649       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 650
 651         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x40000
 652         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 653
 654 #elif defined(CONFIG_FOR_WALLYS_DR531)
 655
 656         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x30000
 657         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 658
 659 #endif
 660
 661 /*
 662  * ==================================
 663  * For upgrade scripts in environment
 664  * ==================================
 665  */
 666 #if !defined(CONFIG_FOR_ALFA_NETWORK_R36A)     &&\
 667     !defined(CONFIG_FOR_COMFAST_CF_E314N)      &&\
 668     !defined(CONFIG_FOR_COMFAST_CF_E320N_V2)   &&\
 669     !defined(CONFIG_FOR_COMFAST_CF_E520N)      &&\
 670     !defined(CONFIG_FOR_COMFAST_CF_E530N)      &&\
 671     !defined(CONFIG_FOR_GLINET_GL_AR300M_LITE) &&\
 672     !defined(CONFIG_FOR_GLINET_GL_AR750)       &&\
 673     !defined(CONFIG_FOR_P2W_CPE505N)           &&\
 674     !defined(CONFIG_FOR_P2W_R602N)             &&\
 675     !defined(CONFIG_FOR_WALLYS_DR531)          &&\
 676     !defined(CONFIG_FOR_WHQX_E600G_V2)         &&\
 677     !defined(CONFIG_FOR_WHQX_E600GAC_V2)       &&\
 678     !defined(CONFIG_FOR_YUNCORE_AP90Q)         &&\
 679     !defined(CONFIG_FOR_YUNCORE_CPE830)        &&\
 680     !defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 681
 682         #define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX        0x20000
 683
 684 #endif
 685
 686 #if defined(CONFIG_FOR_P2W_CPE505N)    ||\
 687     defined(CONFIG_FOR_P2W_R602N)      ||\
 688     defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 689     defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 690     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 691
 692         #define CONFIG_UPG_SCRIPTS_FW_ADDR_HEX  0x9F050000
 693
 694 #endif
 695
 696 /*
 697  * ===================
 698  * Other configuration
 699  * ===================
 700  */
 701
 702 /* Cache lock for stack */
 703 #define CONFIG_INIT_SRAM_SP_OFFSET      0xbd001800
 704
 705 #endif /* _AP143_H */