u-boot/include/configs/ap121.h

   1 /*
   2  * Copyright (C) 2016 Piotr Dymacz <piotr@dymacz.pl>
   3  *
   4  * This file contains the configuration parameters
   5  * for Qualcomm Atheros AR933x based devices
   6  *
   7  * Reference designs: AP121
   8  *
   9  * SPDX-License-Identifier: GPL-2.0
  10  */
  11
  12 #ifndef _AP121_H
  13 #define _AP121_H
  14
  15 #include <config.h>
  16 #include <configs/qca9k_common.h>
  17 #include <soc/soc_common.h>
  18
  19 /*
  20  * ==================
  21  * GPIO configuration
  22  * ==================
  23  */
  24 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
  25
  26         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO13 | GPIO14
  27         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0
  28         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
  29                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
  30         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
  31         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  32         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  33
  34 #elif defined(CONFIG_FOR_ALFA_NETWORK_AP121F)
  35
  36         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0
  37         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17
  38         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO26 | GPIO27 |\
  39                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
  40                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
  41         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO21
  42         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO26 |\
  43                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  44         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L GPIO27 |\
  45                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
  46
  47 #elif defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB)
  48
  49         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0  | GPIO1 | GPIO13
  50         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17 | GPIO27
  51         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO26 | GPIO28 |\
  52                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
  53                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
  54         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO12
  55         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO26 | GPIO28 |\
  56                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  57         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  58
  59 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
  60
  61         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO27
  62         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  63         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
  64         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  65
  66 #elif defined(CONFIG_FOR_CREATCOMM_D3321)
  67
  68         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0  | GPIO13 | GPIO14 |\
  69                                                 GPIO15 | GPIO16
  70         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17 | GPIO27
  71         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
  72                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
  73         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12
  74         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  75         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  76
  77 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
  78
  79         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO26 | GPIO27
  80         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  81         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
  82         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  83
  84 #elif defined(CONFIG_FOR_DRAGINO_V2) ||\
  85       defined(CONFIG_FOR_MESH_POTATO_V2)
  86
  87         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO28
  88         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13 | GPIO17
  89         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
  90                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
  91         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
  92         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  93         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  94
  95 #elif defined(CONFIG_FOR_GL_AR150)
  96
  97         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO13 | GPIO15
  98         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO6 |\
  99                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
 100         #define CONFIG_QCA_GPIO_MASK_IN         GPIO1  | GPIO7  | GPIO8 | GPIO11 |\
 101                                                 GPIO14 | GPIO16 | GPIO17
 102         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO6
 103         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
 104
 105 #elif defined(CONFIG_FOR_GL_INET)
 106
 107         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO13
 108         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H
 109         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 110         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
 111
 112 #elif defined(CONFIG_FOR_GL_USB150)
 113
 114         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0
 115         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO7 | GPIO13 |\
 116                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
 117         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 118         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO13
 119         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L GPIO7 |\
 120                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
 121
 122 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
 123
 124         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13 | GPIO15 | GPIO17 |\
 125                                                 GPIO27
 126         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
 127         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 128         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 129
 130 #elif defined(CONFIG_FOR_TPLINK_MR10U_V1)
 131
 132         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO27
 133         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO18 |\
 134                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 135         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 136         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO18 |\
 137                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 138
 139 #elif defined(CONFIG_FOR_TPLINK_MR13U_V1)
 140
 141         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO27
 142         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO18 |\
 143                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
 144         #define CONFIG_QCA_GPIO_MASK_IN         GPIO6 | GPIO7 | GPIO11
 145         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO18
 146         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
 147
 148 #elif defined(CONFIG_FOR_TPLINK_MR3020_V1)
 149
 150         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0
 151         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17 | GPIO26 | GPIO27
 152         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO8 |\
 153                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
 154                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
 155         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO18 | GPIO20
 156         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO8 |\
 157                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 158         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
 159
 160 #elif defined(CONFIG_FOR_TPLINK_MR3040_V1V2)
 161
 162         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17 | GPIO26 | GPIO27
 163         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO18 |\
 164                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 165         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 166         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO18 |\
 167                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 168
 169 #elif defined(CONFIG_FOR_TPLINK_MR3220_V2)
 170
 171         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0  | GPIO1  | GPIO13 |\
 172                                                 GPIO14 | GPIO15 | GPIO16 |\
 173                                                 GPIO26
 174         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17 | GPIO27
 175         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO8 |\
 176                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
 177                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
 178         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 179         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO8 |\
 180                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 181         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
 182
 183 #elif defined(CONFIG_FOR_TPLINK_WR703N_V1) ||\
 184       defined(CONFIG_FOR_TPLINK_WR710N_V1)
 185
 186         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO27
 187         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO8 |\
 188                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 189         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 190         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO8 |\
 191                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 192
 193 #elif defined(CONFIG_FOR_TPLINK_WR720N_V3)
 194
 195         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO27
 196         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO8 |\
 197                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 198         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO18 | GPIO20
 199         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO8 |\
 200                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 201
 202 #elif defined(CONFIG_FOR_TPLINK_WR740N_V4)
 203
 204         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0  | GPIO1  | GPIO13 |\
 205                                                 GPIO14 | GPIO15 | GPIO16
 206         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17 | GPIO27
 207         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
 208                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
 209         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO26
 210         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 211         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
 212
 213 #endif
 214
 215 /*
 216  * ================
 217  * Default bootargs
 218  * ================
 219  */
 220 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
 221
 222         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 223                                 "rootfstype=squashfs init=/sbin/init "\
 224                                 "mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),16000k(firmware),64k(art)"
 225
 226 #elif defined(CONFIG_FOR_ALFA_NETWORK_AP121F)
 227
 228         #define CONFIG_BOOTARGS "board=AP121F console=ttyATH0,115200 "\
 229                                 "rootfstype=squashfs,jffs2 noinitrd "\
 230                                 "mtdparts=spi0.0:192k(u-boot)ro,64k(u-boot-env),64k(art)ro,-(firmware)"
 231
 232 #elif defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB)
 233
 234         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 235                                 "rootfstype=squashfs init=/sbin/init "\
 236                                 "mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),6144k(rootfs),1600k(uImage),64k(NVRAM),64k(ART)"
 237
 238 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
 239
 240         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 241                                 "rootfstype=squashfs init=/sbin/init "\
 242                                 "mtdparts=ar7240-nor0:128k(u-boot),64k(u-boot-env),16128k(firmware),64k(art)"
 243
 244 #elif defined(CONFIG_FOR_CREATCOMM_D3321)
 245
 246         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 247                                 "rootfstype=squashfs init=/sbin/init "\
 248                                 "mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),1216k(uImage),5952k(rootfs),256k(config),384k(customer),64k(ART) mem=32M"
 249
 250 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
 251
 252         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:06 "\
 253                                 "rootfstype=squashfs init=/sbin/init "\
 254                                 "mtdparts=ar7240-nor0:64k(u-boot),64k(art),64k(mac),64k(nvram),256k(language),1024k(uImage),6656k(rootfs)"
 255
 256 #elif defined(CONFIG_FOR_DRAGINO_V2) ||\
 257       defined(CONFIG_FOR_MESH_POTATO_V2)
 258
 259         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 260                                 "rootfstype=squashfs init=/sbin/init "\
 261                                 "mtdparts=ar7240-nor0:192k(u-boot),64k(u-boot-env),16064k(firmware),64k(art)"
 262
 263 #elif defined(CONFIG_FOR_GL_AR150) ||\
 264       defined(CONFIG_FOR_GL_USB150)
 265
 266         #define CONFIG_BOOTARGS "console=ttyATH0,115200 board=domino root=31:03 "\
 267                                 "rootfstype=squashfs,jffs2 noinitrd "\
 268                                 "mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1280k(kernel),14656k(rootfs),64k(nvram),64k(art)ro,15936k@0x50000(firmware)"
 269
 270 #elif defined(CONFIG_FOR_GL_INET)            ||\
 271       defined(CONFIG_FOR_TPLINK_MR10U_V1)    ||\
 272       defined(CONFIG_FOR_TPLINK_MR13U_V1)    ||\
 273       defined(CONFIG_FOR_TPLINK_MR3020_V1)   ||\
 274       defined(CONFIG_FOR_TPLINK_MR3040_V1V2) ||\
 275       defined(CONFIG_FOR_TPLINK_MR3220_V2)   ||\
 276       defined(CONFIG_FOR_TPLINK_WR703N_V1)   ||\
 277       defined(CONFIG_FOR_TPLINK_WR720N_V3)   ||\
 278       defined(CONFIG_FOR_TPLINK_WR740N_V4)
 279
 280         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 281                                 "rootfstype=squashfs init=/sbin/init "\
 282                                 "mtdparts=ar7240-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 283
 284 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
 285
 286         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 287                                 "rootfstype=squashfs init=/sbin/init "\
 288                                 "mtdparts=ar7240-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 289
 290 #elif defined(CONFIG_FOR_TPLINK_WR710N_V1)
 291
 292         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 293                                 "rootfstype=squashfs init=/sbin/init "\
 294                                 "mtdparts=ar7240-nor0:128k(u-boot),1024k(kernel),6912k(rootfs),64k(config),64k(art)"
 295
 296 #endif
 297
 298 /*
 299  * =============================
 300  * Load address and boot command
 301  * =============================
 302  */
 303 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)    ||\
 304     defined(CONFIG_FOR_ALFA_NETWORK_AP121F)    ||\
 305     defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB) ||\
 306     defined(CONFIG_FOR_CREATCOMM_D3321)        ||\
 307     defined(CONFIG_FOR_GL_AR150)               ||\
 308     defined(CONFIG_FOR_GL_USB150)
 309         #define CFG_LOAD_ADDR   0x9F050000
 310 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
 311         #define CFG_LOAD_ADDR   0x9F030000
 312 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
 313         #define CFG_LOAD_ADDR   0x9F080000
 314 #elif defined(CONFIG_FOR_DRAGINO_V2) ||\
 315       defined(CONFIG_FOR_MESH_POTATO_V2)
 316         #define CFG_LOAD_ADDR   0x9F040000
 317 #else
 318         #define CFG_LOAD_ADDR   0x9F020000
 319 #endif
 320
 321 #if defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB)
 322         #define CONFIG_BOOTCOMMAND      "bootm 0x9F050000 || bootm 0x9F650000 || bootm 0x9FE50000"
 323 #else
 324         #define CONFIG_BOOTCOMMAND      "bootm " MK_STR(CFG_LOAD_ADDR)
 325 #endif
 326
 327 /*
 328  * =========================
 329  * Environment configuration
 330  * =========================
 331  */
 332 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)    ||\
 333     defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB) ||\
 334     defined(CONFIG_FOR_CREATCOMM_D3321)        ||\
 335     defined(CONFIG_FOR_GL_AR150)               ||\
 336     defined(CONFIG_FOR_GL_USB150)
 337         #define CFG_ENV_ADDR            0x9F040000
 338         #define CFG_ENV_SIZE            0x8000
 339         #define CFG_ENV_SECT_SIZE       0x10000
 340 #elif defined(CONFIG_FOR_ALFA_NETWORK_AP121F)
 341         #define CFG_ENV_ADDR            0x9F030000
 342         #define CFG_ENV_SIZE            0x10000
 343 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
 344         #define CFG_ENV_ADDR            0x9F020000
 345         #define CFG_ENV_SIZE            0x8000
 346         #define CFG_ENV_SECT_SIZE       0x10000
 347 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
 348         #define CFG_ENV_ADDR            0x9F028000
 349         #define CFG_ENV_SIZE            0x7C00
 350         #define CFG_ENV_SECT_SIZE       0x10000
 351 #elif defined(CONFIG_FOR_DRAGINO_V2) ||\
 352       defined(CONFIG_FOR_MESH_POTATO_V2)
 353         #define CFG_ENV_ADDR            0x9F030000
 354         #define CFG_ENV_SIZE            0x8000
 355         #define CFG_ENV_SECT_SIZE       0x10000
 356 #else
 357         #define CFG_ENV_ADDR            0x9F01EC00
 358         #define CFG_ENV_SIZE            0x1000
 359         #define CFG_ENV_SECT_SIZE       0x10000
 360 #endif
 361
 362 /*
 363  * ===========================
 364  * List of available baudrates
 365  * ===========================
 366  */
 367 #define CFG_BAUDRATE_TABLE      \
 368                 { 600,    1200,   2400,    4800,    9600,    14400,  \
 369                   19200,  28800,  38400,   56000,   57600,   115200, \
 370                   128000, 153600, 230400,  250000,  256000,  460800, \
 371                   576000, 921600, 1000000, 1152000, 1500000, 2000000 }
 372
 373 /*
 374  * ==================================================
 375  * MAC address/es, model and WPS pin offsets in FLASH
 376  * ==================================================
 377  */
 378 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)    ||\
 379     defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB) ||\
 380     defined(CONFIG_FOR_CREATCOMM_D3321)        ||\
 381     defined(CONFIG_FOR_DRAGINO_V2)             ||\
 382     defined(CONFIG_FOR_MESH_POTATO_V2)
 383         #define OFFSET_MAC_DATA_BLOCK           0xFF0000
 384         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 385         #define OFFSET_MAC_ADDRESS              0x000000
 386         #define OFFSET_MAC_ADDRESS2             0x000006
 387 #elif defined(CONFIG_FOR_ALFA_NETWORK_AP121F)
 388         #define OFFSET_MAC_DATA_BLOCK           0x40000
 389         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 390         #define OFFSET_MAC_ADDRESS              0x00000
 391 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD) ||\
 392       defined(CONFIG_FOR_GL_AR150)          ||\
 393       defined(CONFIG_FOR_GL_USB150)
 394         #define OFFSET_MAC_DATA_BLOCK           0xFF0000
 395         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 396         #define OFFSET_MAC_ADDRESS              0x000000
 397 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
 398         /*
 399          * DIR-505 has two MAC addresses inside dedicated MAC partition
 400          * They are stored in plain text...
 401          * TODO: read/write MAC stored as plain text
 402          * #define OFFSET_MAC_DATA_BLOCK        0x02000
 403          * #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
 404          * #define OFFSET_MAC_ADDRESS           0x000004
 405          * #define OFFSET_MAC_ADDRESS2          0x000016
 406          */
 407 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
 408         #define OFFSET_MAC_DATA_BLOCK           0x010000
 409         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 410         #define OFFSET_MAC_ADDRESS              0x00FC00
 411 #else
 412         #define OFFSET_MAC_DATA_BLOCK           0x010000
 413         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 414         #define OFFSET_MAC_ADDRESS              0x00FC00
 415 #endif
 416
 417 #if !defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)    &&\
 418     !defined(CONFIG_FOR_ALFA_NETWORK_AP121F)    &&\
 419     !defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB) &&\
 420     !defined(CONFIG_FOR_BLACK_SWIFT_BOARD)      &&\
 421     !defined(CONFIG_FOR_CREATCOMM_D3321)        &&\
 422     !defined(CONFIG_FOR_DLINK_DIR505_A1)        &&\
 423     !defined(CONFIG_FOR_DRAGINO_V2)             &&\
 424     !defined(CONFIG_FOR_GL_AR150)               &&\
 425     !defined(CONFIG_FOR_GL_INET)                &&\
 426     !defined(CONFIG_FOR_GL_USB150)              &&\
 427     !defined(CONFIG_FOR_GS_OOLITE_V1_DEV)       &&\
 428     !defined(CONFIG_FOR_MESH_POTATO_V2)
 429         #define OFFSET_ROUTER_MODEL     0xFD00
 430 #endif
 431
 432 #if defined(CONFIG_FOR_TPLINK_MR3020_V1) ||\
 433     defined(CONFIG_FOR_TPLINK_MR3220_V2) ||\
 434     defined(CONFIG_FOR_TPLINK_WR710N_V1) ||\
 435     defined(CONFIG_FOR_TPLINK_WR740N_V4)
 436         #define OFFSET_PIN_NUMBER       0xFE00
 437 #endif
 438
 439 /*
 440  * =========================
 441  * Custom changes per device
 442  * =========================
 443  */
 444
 445 /* Dragino 2 uses different IP addresses */
 446 #if defined(CONFIG_FOR_DRAGINO_V2)
 447         #undef  CONFIG_IPADDR
 448         #define CONFIG_IPADDR   192.168.255.1
 449
 450         #undef  CONFIG_SERVERIP
 451         #define CONFIG_SERVERIP 192.168.255.2
 452 #endif
 453
 454 /* Dragino 2 and Black Swift boards use different prompts */
 455 #if defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
 456         #undef  CFG_PROMPT
 457         #define CFG_PROMPT      "BSB> "
 458 #elif defined(CONFIG_FOR_DRAGINO_V2) ||\
 459       defined(CONFIG_FOR_MESH_POTATO_V2)
 460         #undef  CFG_PROMPT
 461         #define CFG_PROMPT      "dr_boot> "
 462 #endif
 463
 464 /* D-Link DIR-505 is limited to 64 KB only and doesn't use env */
 465 #if defined(CONFIG_FOR_DLINK_DIR505_A1)
 466         #undef CONFIG_CMD_DHCP
 467         #undef CONFIG_CMD_LOADB
 468 #endif
 469
 470 /*
 471  * ===========================
 472  * HTTP recovery configuration
 473  * ===========================
 474  */
 475 #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_LOAD_ADDR
 476
 477 #if defined(CONFIG_FOR_ALFA_NETWORK_AP121F)
 478         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x40000)
 479 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
 480         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x10000)
 481 #endif
 482
 483 /* Firmware size limit */
 484 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2) ||\
 485     defined(CONFIG_FOR_GL_AR150)            ||\
 486     defined(CONFIG_FOR_GL_USB150)
 487         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (384 * 1024)
 488 #elif defined(CONFIG_FOR_ALFA_NETWORK_AP121F) ||\
 489       defined(CONFIG_FOR_DRAGINO_V2)          ||\
 490       defined(CONFIG_FOR_MESH_POTATO_V2)
 491         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (320 * 1024)
 492 #elif defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB)
 493         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (448 * 1024)
 494 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
 495         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (256 * 1024)
 496 #elif defined(CONFIG_FOR_CREATCOMM_D3321)
 497         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (1856 * 1024)
 498 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
 499         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (512 * 1024)
 500 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
 501         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 502 #else
 503         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 504 #endif
 505
 506 /*
 507  * ========================
 508  * PLL/Clocks configuration
 509  * ========================
 510  */
 511 #define CONFIG_QCA_PLL  QCA_PLL_PRESET_400_400_200
 512
 513 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)    ||\
 514     defined(CONFIG_FOR_ALFA_NETWORK_AP121F)    ||\
 515     defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB) ||\
 516     defined(CONFIG_FOR_CREATCOMM_D3321)        ||\
 517     defined(CONFIG_FOR_GL_AR150)               ||\
 518     defined(CONFIG_FOR_GL_USB150)
 519
 520         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x40000
 521         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 522
 523 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD) ||\
 524       defined(CONFIG_FOR_DLINK_DIR505_A1)
 525
 526         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x20000
 527         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 528
 529 #elif defined(CONFIG_FOR_DRAGINO_V2) ||\
 530       defined(CONFIG_FOR_MESH_POTATO_V2)
 531
 532         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x30000
 533         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 534
 535 #else
 536
 537         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000
 538         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 539
 540 #endif
 541
 542 /*
 543  * ==================================
 544  * For upgrade scripts in environment
 545  * ==================================
 546  */
 547 #if !defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)    &&\
 548     !defined(CONFIG_FOR_ALFA_NETWORK_AP121F)    &&\
 549     !defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB) &&\
 550     !defined(CONFIG_FOR_BLACK_SWIFT_BOARD)      &&\
 551     !defined(CONFIG_FOR_CREATCOMM_D3321)        &&\
 552     !defined(CONFIG_FOR_DLINK_DIR505_A1)        &&\
 553     !defined(CONFIG_FOR_DRAGINO_V2)             &&\
 554     !defined(CONFIG_FOR_GL_AR150)               &&\
 555     !defined(CONFIG_FOR_GL_USB150)              &&\
 556     !defined(CONFIG_FOR_MESH_POTATO_V2)
 557         #define CONFIG_UPG_SCRIPTS_UBOOT_SIZE_BCKP_HEX  0x20000
 558 #endif
 559
 560 #endif /* _AP121_H */