u-boot/include/configs/ap121.h

   1 /*
   2  * Copyright (C) 2016 Piotr Dymacz <piotr@dymacz.pl>
   3  *
   4  * This file contains the configuration parameters
   5  * for Qualcomm Atheros AR933x based devices
   6  *
   7  * Reference designs: AP121
   8  *
   9  * SPDX-License-Identifier: GPL-2.0
  10  */
  11
  12 #ifndef _AP121_H
  13 #define _AP121_H
  14
  15 #include <config.h>
  16 #include <configs/qca9k_common.h>
  17 #include <soc/soc_common.h>
  18
  19 /*
  20  * ==================
  21  * GPIO configuration
  22  * ==================
  23  */
  24 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
  25
  26         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO13 | GPIO14
  27         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0
  28         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
  29                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
  30         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
  31         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  32         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  33
  34 #elif defined(CONFIG_FOR_ALFA_NETWORK_AP121F)
  35
  36         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0
  37         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17
  38         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO26 | GPIO27 |\
  39                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
  40                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
  41         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO21
  42         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO26 |\
  43                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  44         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L GPIO27 |\
  45                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
  46
  47 #elif defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB)
  48
  49         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0  | GPIO1 | GPIO13
  50         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17 | GPIO27
  51         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO26 | GPIO28 |\
  52                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
  53                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
  54         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO12
  55         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO26 | GPIO28 |\
  56                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  57         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  58
  59 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
  60
  61         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO27
  62         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  63         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
  64         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  65
  66 #elif defined(CONFIG_FOR_CREATCOMM_D3321)
  67
  68         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0  | GPIO13 | GPIO14 |\
  69                                                 GPIO15 | GPIO16
  70         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17 | GPIO27
  71         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
  72                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
  73         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12
  74         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  75         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  76
  77 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
  78
  79         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO26 | GPIO27
  80         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  81         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
  82         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  83
  84 #elif defined(CONFIG_FOR_DRAGINO_V2) ||\
  85       defined(CONFIG_FOR_MESH_POTATO_V2)
  86
  87         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO28
  88         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13 | GPIO17
  89         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
  90                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
  91         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
  92         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  93         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  94
  95 #elif defined(CONFIG_FOR_GL_AR150)
  96
  97         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO13 | GPIO15
  98         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO6 |\
  99                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
 100         #define CONFIG_QCA_GPIO_MASK_IN         GPIO1  | GPIO7  | GPIO8 | GPIO11 |\
 101                                                 GPIO14 | GPIO16 | GPIO17
 102         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO6
 103         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
 104
 105 #elif defined(CONFIG_FOR_GL_INET)
 106
 107         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO13
 108         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H
 109         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 110         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
 111
 112 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
 113
 114         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13 | GPIO15 | GPIO17 |\
 115                                                 GPIO27
 116         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
 117         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 118         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 119
 120 #elif defined(CONFIG_FOR_TPLINK_MR10U_V1)
 121
 122         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO27
 123         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO18 |\
 124                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 125         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 126         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO18 |\
 127                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 128
 129 #elif defined(CONFIG_FOR_TPLINK_MR13U_V1)
 130
 131         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO27
 132         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO18 |\
 133                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
 134         #define CONFIG_QCA_GPIO_MASK_IN         GPIO6 | GPIO7 | GPIO11
 135         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO18
 136         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
 137
 138 #elif defined(CONFIG_FOR_TPLINK_MR3020_V1)
 139
 140         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0
 141         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17 | GPIO26 | GPIO27
 142         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO8 |\
 143                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
 144                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
 145         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO18 | GPIO20
 146         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO8 |\
 147                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 148         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
 149
 150 #elif defined(CONFIG_FOR_TPLINK_MR3040_V1V2)
 151
 152         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17 | GPIO26 | GPIO27
 153         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO18 |\
 154                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 155         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 156         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO18 |\
 157                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 158
 159 #elif defined(CONFIG_FOR_TPLINK_MR3220_V2)
 160
 161         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0  | GPIO1  | GPIO13 |\
 162                                                 GPIO14 | GPIO15 | GPIO16 |\
 163                                                 GPIO26
 164         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17 | GPIO27
 165         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO8 |\
 166                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
 167                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
 168         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 169         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO8 |\
 170                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 171         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
 172
 173 #elif defined(CONFIG_FOR_TPLINK_WR703N_V1) ||\
 174       defined(CONFIG_FOR_TPLINK_WR710N_V1)
 175
 176         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO27
 177         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO8 |\
 178                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 179         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11
 180         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO8 |\
 181                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 182
 183 #elif defined(CONFIG_FOR_TPLINK_WR720N_V3)
 184
 185         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO27
 186         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO8 |\
 187                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 188         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO18 | GPIO20
 189         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO8 |\
 190                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
 191
 192 #elif defined(CONFIG_FOR_TPLINK_WR740N_V4)
 193
 194         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0  | GPIO1  | GPIO13 |\
 195                                                 GPIO14 | GPIO15 | GPIO16
 196         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO17 | GPIO27
 197         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L |\
 198                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_H
 199         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO26
 200         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 201         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
 202
 203 #endif
 204
 205 /*
 206  * ================
 207  * Default bootargs
 208  * ================
 209  */
 210 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)
 211
 212         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 213                                 "rootfstype=squashfs init=/sbin/init "\
 214                                 "mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),16000k(firmware),64k(art)"
 215
 216 #elif defined(CONFIG_FOR_ALFA_NETWORK_AP121F)
 217
 218         #define CONFIG_BOOTARGS "board=AP121F console=ttyATH0,115200 "\
 219                                 "rootfstype=squashfs,jffs2 noinitrd "\
 220                                 "mtdparts=spi0.0:192k(u-boot)ro,64k(u-boot-env),64k(art)ro,-(firmware)"
 221
 222 #elif defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB)
 223
 224         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 225                                 "rootfstype=squashfs init=/sbin/init "\
 226                                 "mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),6144k(rootfs),1600k(uImage),64k(NVRAM),64k(ART)"
 227
 228 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
 229
 230         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 231                                 "rootfstype=squashfs init=/sbin/init "\
 232                                 "mtdparts=ar7240-nor0:128k(u-boot),64k(u-boot-env),16128k(firmware),64k(art)"
 233
 234 #elif defined(CONFIG_FOR_CREATCOMM_D3321)
 235
 236         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 237                                 "rootfstype=squashfs init=/sbin/init "\
 238                                 "mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),1216k(uImage),5952k(rootfs),256k(config),384k(customer),64k(ART) mem=32M"
 239
 240 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
 241
 242         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:06 "\
 243                                 "rootfstype=squashfs init=/sbin/init "\
 244                                 "mtdparts=ar7240-nor0:64k(u-boot),64k(art),64k(mac),64k(nvram),256k(language),1024k(uImage),6656k(rootfs)"
 245
 246 #elif defined(CONFIG_FOR_DRAGINO_V2) ||\
 247       defined(CONFIG_FOR_MESH_POTATO_V2)
 248
 249         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 250                                 "rootfstype=squashfs init=/sbin/init "\
 251                                 "mtdparts=ar7240-nor0:192k(u-boot),64k(u-boot-env),16064k(firmware),64k(art)"
 252
 253 #elif defined(CONFIG_FOR_GL_AR150)
 254
 255         #define CONFIG_BOOTARGS "console=ttyATH0,115200 board=domino root=31:03 "\
 256                                 "rootfstype=squashfs,jffs2 noinitrd "\
 257                                 "mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1280k(kernel),14656k(rootfs),64k(nvram),64k(art)ro,15936k@0x50000(firmware)"
 258
 259 #elif defined(CONFIG_FOR_GL_INET)            ||\
 260       defined(CONFIG_FOR_TPLINK_MR10U_V1)    ||\
 261       defined(CONFIG_FOR_TPLINK_MR13U_V1)    ||\
 262       defined(CONFIG_FOR_TPLINK_MR3020_V1)   ||\
 263       defined(CONFIG_FOR_TPLINK_MR3040_V1V2) ||\
 264       defined(CONFIG_FOR_TPLINK_MR3220_V2)   ||\
 265       defined(CONFIG_FOR_TPLINK_WR703N_V1)   ||\
 266       defined(CONFIG_FOR_TPLINK_WR720N_V3)   ||\
 267       defined(CONFIG_FOR_TPLINK_WR740N_V4)
 268
 269         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 270                                 "rootfstype=squashfs init=/sbin/init "\
 271                                 "mtdparts=ar7240-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 272
 273 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
 274
 275         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 276                                 "rootfstype=squashfs init=/sbin/init "\
 277                                 "mtdparts=ar7240-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 278
 279 #elif defined(CONFIG_FOR_TPLINK_WR710N_V1)
 280
 281         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 282                                 "rootfstype=squashfs init=/sbin/init "\
 283                                 "mtdparts=ar7240-nor0:128k(u-boot),1024k(kernel),6912k(rootfs),64k(config),64k(art)"
 284
 285 #endif
 286
 287 /*
 288  * =============================
 289  * Load address and boot command
 290  * =============================
 291  */
 292 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)    ||\
 293     defined(CONFIG_FOR_ALFA_NETWORK_AP121F)    ||\
 294     defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB) ||\
 295     defined(CONFIG_FOR_CREATCOMM_D3321)        ||\
 296     defined(CONFIG_FOR_GL_AR150)
 297         #define CFG_LOAD_ADDR   0x9F050000
 298 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
 299         #define CFG_LOAD_ADDR   0x9F030000
 300 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
 301         #define CFG_LOAD_ADDR   0x9F080000
 302 #elif defined(CONFIG_FOR_DRAGINO_V2) ||\
 303       defined(CONFIG_FOR_MESH_POTATO_V2)
 304         #define CFG_LOAD_ADDR   0x9F040000
 305 #else
 306         #define CFG_LOAD_ADDR   0x9F020000
 307 #endif
 308
 309 #if defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB)
 310         #define CONFIG_BOOTCOMMAND      "bootm 0x9F050000 || bootm 0x9F650000 || bootm 0x9FE50000"
 311 #else
 312         #define CONFIG_BOOTCOMMAND      "bootm " MK_STR(CFG_LOAD_ADDR)
 313 #endif
 314
 315 /*
 316  * =========================
 317  * Environment configuration
 318  * =========================
 319  */
 320 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)    ||\
 321     defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB) ||\
 322     defined(CONFIG_FOR_CREATCOMM_D3321)        ||\
 323     defined(CONFIG_FOR_GL_AR150)
 324         #define CFG_ENV_ADDR            0x9F040000
 325         #define CFG_ENV_SIZE            0x8000
 326         #define CFG_ENV_SECT_SIZE       0x10000
 327 #elif defined(CONFIG_FOR_ALFA_NETWORK_AP121F)
 328         #define CFG_ENV_ADDR            0x9F030000
 329         #define CFG_ENV_SIZE            0x10000
 330 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
 331         #define CFG_ENV_ADDR            0x9F020000
 332         #define CFG_ENV_SIZE            0x8000
 333         #define CFG_ENV_SECT_SIZE       0x10000
 334 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
 335         #define CFG_ENV_ADDR            0x9F028000
 336         #define CFG_ENV_SIZE            0x7C00
 337         #define CFG_ENV_SECT_SIZE       0x10000
 338 #elif defined(CONFIG_FOR_DRAGINO_V2) ||\
 339       defined(CONFIG_FOR_MESH_POTATO_V2)
 340         #define CFG_ENV_ADDR            0x9F030000
 341         #define CFG_ENV_SIZE            0x8000
 342         #define CFG_ENV_SECT_SIZE       0x10000
 343 #else
 344         #define CFG_ENV_ADDR            0x9F01EC00
 345         #define CFG_ENV_SIZE            0x1000
 346         #define CFG_ENV_SECT_SIZE       0x10000
 347 #endif
 348
 349 /*
 350  * ===========================
 351  * List of available baudrates
 352  * ===========================
 353  */
 354 #define CFG_BAUDRATE_TABLE      \
 355                 { 600,    1200,   2400,    4800,    9600,    14400,  \
 356                   19200,  28800,  38400,   56000,   57600,   115200, \
 357                   128000, 153600, 230400,  250000,  256000,  460800, \
 358                   576000, 921600, 1000000, 1152000, 1500000, 2000000 }
 359
 360 /*
 361  * ==================================================
 362  * MAC address/es, model and WPS pin offsets in FLASH
 363  * ==================================================
 364  */
 365 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)    ||\
 366     defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB) ||\
 367     defined(CONFIG_FOR_CREATCOMM_D3321)        ||\
 368     defined(CONFIG_FOR_DRAGINO_V2)             ||\
 369     defined(CONFIG_FOR_MESH_POTATO_V2)
 370         #define OFFSET_MAC_DATA_BLOCK           0xFF0000
 371         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 372         #define OFFSET_MAC_ADDRESS              0x000000
 373         #define OFFSET_MAC_ADDRESS2             0x000006
 374 #elif defined(CONFIG_FOR_ALFA_NETWORK_AP121F)
 375         #define OFFSET_MAC_DATA_BLOCK           0x40000
 376         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 377         #define OFFSET_MAC_ADDRESS              0x00000
 378 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD) ||\
 379       defined(CONFIG_FOR_GL_AR150)
 380         #define OFFSET_MAC_DATA_BLOCK           0xFF0000
 381         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 382         #define OFFSET_MAC_ADDRESS              0x000000
 383 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
 384         /*
 385          * DIR-505 has two MAC addresses inside dedicated MAC partition
 386          * They are stored in plain text...
 387          * TODO: read/write MAC stored as plain text
 388          * #define OFFSET_MAC_DATA_BLOCK        0x02000
 389          * #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
 390          * #define OFFSET_MAC_ADDRESS           0x000004
 391          * #define OFFSET_MAC_ADDRESS2          0x000016
 392          */
 393 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
 394         #define OFFSET_MAC_DATA_BLOCK           0x010000
 395         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 396         #define OFFSET_MAC_ADDRESS              0x00FC00
 397 #else
 398         #define OFFSET_MAC_DATA_BLOCK           0x010000
 399         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 400         #define OFFSET_MAC_ADDRESS              0x00FC00
 401 #endif
 402
 403 #if !defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)    &&\
 404     !defined(CONFIG_FOR_ALFA_NETWORK_AP121F)    &&\
 405     !defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB) &&\
 406     !defined(CONFIG_FOR_BLACK_SWIFT_BOARD)      &&\
 407     !defined(CONFIG_FOR_CREATCOMM_D3321)        &&\
 408     !defined(CONFIG_FOR_DLINK_DIR505_A1)        &&\
 409     !defined(CONFIG_FOR_DRAGINO_V2)             &&\
 410     !defined(CONFIG_FOR_GL_AR150)               &&\
 411     !defined(CONFIG_FOR_GL_INET)                &&\
 412     !defined(CONFIG_FOR_GS_OOLITE_V1_DEV)       &&\
 413     !defined(CONFIG_FOR_MESH_POTATO_V2)
 414         #define OFFSET_ROUTER_MODEL     0xFD00
 415 #endif
 416
 417 #if defined(CONFIG_FOR_TPLINK_MR3020_V1) ||\
 418     defined(CONFIG_FOR_TPLINK_MR3220_V2) ||\
 419     defined(CONFIG_FOR_TPLINK_WR710N_V1) ||\
 420     defined(CONFIG_FOR_TPLINK_WR740N_V4)
 421         #define OFFSET_PIN_NUMBER       0xFE00
 422 #endif
 423
 424 /*
 425  * =========================
 426  * Custom changes per device
 427  * =========================
 428  */
 429
 430 /* Dragino 2 uses different IP addresses */
 431 #if defined(CONFIG_FOR_DRAGINO_V2)
 432         #undef  CONFIG_IPADDR
 433         #define CONFIG_IPADDR   192.168.255.1
 434
 435         #undef  CONFIG_SERVERIP
 436         #define CONFIG_SERVERIP 192.168.255.2
 437 #endif
 438
 439 /* Dragino 2 and Black Swift boards use different prompts */
 440 #if defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
 441         #undef  CFG_PROMPT
 442         #define CFG_PROMPT      "BSB> "
 443 #elif defined(CONFIG_FOR_DRAGINO_V2) ||\
 444       defined(CONFIG_FOR_MESH_POTATO_V2)
 445         #undef  CFG_PROMPT
 446         #define CFG_PROMPT      "dr_boot> "
 447 #endif
 448
 449 /* D-Link DIR-505 is limited to 64 KB only and doesn't use env */
 450 #if defined(CONFIG_FOR_DLINK_DIR505_A1)
 451         #undef CONFIG_CMD_DHCP
 452         #undef CONFIG_CMD_LOADB
 453 #endif
 454
 455 /*
 456  * ===========================
 457  * HTTP recovery configuration
 458  * ===========================
 459  */
 460 #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_LOAD_ADDR
 461
 462 #if defined(CONFIG_FOR_ALFA_NETWORK_AP121F)
 463         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x40000)
 464 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
 465         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x10000)
 466 #endif
 467
 468 /* Firmware size limit */
 469 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2) ||\
 470     defined(CONFIG_FOR_GL_AR150)
 471         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (384 * 1024)
 472 #elif defined(CONFIG_FOR_ALFA_NETWORK_AP121F) ||\
 473       defined(CONFIG_FOR_DRAGINO_V2)          ||\
 474       defined(CONFIG_FOR_MESH_POTATO_V2)
 475         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (320 * 1024)
 476 #elif defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB)
 477         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (448 * 1024)
 478 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD)
 479         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (256 * 1024)
 480 #elif defined(CONFIG_FOR_CREATCOMM_D3321)
 481         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (1856 * 1024)
 482 #elif defined(CONFIG_FOR_DLINK_DIR505_A1)
 483         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (512 * 1024)
 484 #elif defined(CONFIG_FOR_GS_OOLITE_V1_DEV)
 485         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 486 #else
 487         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 488 #endif
 489
 490 /*
 491  * ========================
 492  * PLL/Clocks configuration
 493  * ========================
 494  */
 495 #define CONFIG_QCA_PLL  QCA_PLL_PRESET_400_400_200
 496
 497 #if defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)    ||\
 498     defined(CONFIG_FOR_ALFA_NETWORK_AP121F)    ||\
 499     defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB) ||\
 500     defined(CONFIG_FOR_CREATCOMM_D3321)        ||\
 501     defined(CONFIG_FOR_GL_AR150)
 502
 503         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x40000
 504         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 505
 506 #elif defined(CONFIG_FOR_BLACK_SWIFT_BOARD) ||\
 507       defined(CONFIG_FOR_DLINK_DIR505_A1)
 508
 509         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x20000
 510         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 511
 512 #elif defined(CONFIG_FOR_DRAGINO_V2) ||\
 513       defined(CONFIG_FOR_MESH_POTATO_V2)
 514
 515         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x30000
 516         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 517
 518 #else
 519
 520         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000
 521         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 522
 523 #endif
 524
 525 /*
 526  * ==================================
 527  * For upgrade scripts in environment
 528  * ==================================
 529  */
 530 #if !defined(CONFIG_FOR_8DEVICES_CARAMBOLA2)    &&\
 531     !defined(CONFIG_FOR_ALFA_NETWORK_AP121F)    &&\
 532     !defined(CONFIG_FOR_ALFA_NETWORK_HORNET_UB) &&\
 533     !defined(CONFIG_FOR_BLACK_SWIFT_BOARD)      &&\
 534     !defined(CONFIG_FOR_CREATCOMM_D3321)        &&\
 535     !defined(CONFIG_FOR_DLINK_DIR505_A1)        &&\
 536     !defined(CONFIG_FOR_DRAGINO_V2)             &&\
 537     !defined(CONFIG_FOR_GL_AR150)               &&\
 538     !defined(CONFIG_FOR_MESH_POTATO_V2)
 539         #define CONFIG_UPG_SCRIPTS_UBOOT_SIZE_BCKP_HEX  0x20000
 540 #endif
 541
 542 #endif /* _AP121_H */