imx: cpu: move common chip revision id's
authorAdrian Alonso <aalonso@freescale.com>
Mon, 12 Oct 2015 18:48:07 +0000 (13:48 -0500)
committerStefano Babic <sbabic@denx.de>
Fri, 30 Oct 2015 14:20:56 +0000 (15:20 +0100)
Move common chip revision id's to main cpu header file
mx25 generic include cpu header for chip revision

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
arch/arm/cpu/arm926ejs/mx25/generic.c
arch/arm/include/asm/arch-imx/cpu.h
arch/arm/include/asm/arch-mx25/imx-regs.h
arch/arm/include/asm/arch-mx5/imx-regs.h
arch/arm/include/asm/arch-mx6/imx-regs.h

index 8912098573f4915a341e827dabef8a7a0e28cb2e..0b1a8f4bbc2ad1bcb319e2ef45a477b8bd9cc494 100644 (file)
@@ -13,6 +13,7 @@
 #include <div64.h>
 #include <netdev.h>
 #include <asm/io.h>
+#include <asm/arch-imx/cpu.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
 
index 7e681e94d742588d4f32df4d39b8e9e0f520fde8..8a75902ee5d6f43407c0d1c6c98cd8a54ae86131 100644 (file)
 #define MXC_SOC_MX6            0x60
 #define MXC_SOC_MX7            0x70
 
+#define CHIP_REV_1_0            0x10
+#define CHIP_REV_1_1            0x11
+#define CHIP_REV_1_2            0x12
+#define CHIP_REV_1_5            0x15
+#define CHIP_REV_2_0            0x20
+#define CHIP_REV_2_5            0x25
+#define CHIP_REV_3_0            0x30
+
+#define BOARD_REV_1_0           0x0
+#define BOARD_REV_2_0           0x1
+#define BOARD_VER_OFFSET        0x8
+
 #define CS0_128                                        0
 #define CS0_64M_CS1_64M                                1
 #define CS0_64M_CS1_32M_CS2_32M                        2
index 78c4e9b08867a00252e84c0d9185de31d614d3a7..1b00ed7e6d4bd282a9c8bdbc170c389c0d579f11 100644 (file)
@@ -526,8 +526,4 @@ struct cspi_regs {
        IMX_CSPI2_BASE, \
        IMX_CSPI3_BASE
 
-#define CHIP_REV_1_0           0x10
-#define CHIP_REV_1_1           0x11
-#define CHIP_REV_1_2           0x12
-
 #endif                         /* _IMX_REGS_H */
index 5f0e1e63467589b56a2360dc4c2ced246591b6f0..e73cc0765326911f634a192dc251f29cc2abd7b8 100644 (file)
 #define DP_MFD_216     (4 - 1)
 #define DP_MFN_216     3
 
-#define CHIP_REV_1_0            0x10
-#define CHIP_REV_1_1            0x11
-#define CHIP_REV_2_0            0x20
-#define CHIP_REV_2_5           0x25
-#define CHIP_REV_3_0            0x30
-
-#define BOARD_REV_1_0           0x0
-#define BOARD_REV_2_0           0x1
-
-#define BOARD_VER_OFFSET       0x8
-
 #define IMX_IIM_BASE            (IIM_BASE_ADDR)
 
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
index 0e112e9d316751a5a74ba9476de74b8d7a8c784b..0de1ff994bf9e1713eedc3ca52484e47716f7804 100644 (file)
 #define WDOG3_BASE_ADDR (is_cpu_type(MXC_CPU_MX6UL) ?  \
                         MX6UL_WDOG3_BASE_ADDR :  MX6SX_WDOG3_BASE_ADDR)
 
-#define CHIP_REV_1_0                 0x10
-#define CHIP_REV_1_2                 0x12
-#define CHIP_REV_1_5                 0x15
-#define CHIP_REV_2_0                 0x20
 #if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
 #define IRAM_SIZE                    0x00040000
 #else