powerpc: Enable device tree support for MPC8548CDS

Add device tree for MPC8548CDS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 0e234cce55e3b930a4ea7b710fc474b532d9bd23..021c85f00f434e5359bf179f1c77bb171273ed68 100644 (file)
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0+
 
+dtb-$(CONFIG_TARGET_MPC8548CDS) += mpc8548cds.dtb mpc8548cds_36b.dtb
 dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb
 dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb
 dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb

diff --git a/arch/powerpc/dts/mpc8548-post.dtsi b/arch/powerpc/dts/mpc8548-post.dtsi
new file mode 100644 (file)
index 0000000..5533a4b
--- /dev/null
+++ b/arch/powerpc/dts/mpc8548-post.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * MPC8548 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+&soc {
+       #address-cells = <1>;
+       #size-cells = <1>;
+       device_type = "soc";
+       compatible = "fsl,mpc8548-immr", "simple-bus";
+       bus-frequency = <0x0>;
+
+       mpic: pic@40000 {
+               interrupt-controller;
+               #address-cells = <0>;
+               #interrupt-cells = <4>;
+               reg = <0x40000 0x40000>;
+               compatible = "fsl,mpic";
+               device_type = "open-pic";
+               big-endian;
+               single-cpu-affinity;
+               last-interrupt-source = <255>;
+       };
+};

diff --git a/arch/powerpc/dts/mpc8548.dtsi b/arch/powerpc/dts/mpc8548.dtsi
new file mode 100644 (file)
index 0000000..b24567d
--- /dev/null
+++ b/arch/powerpc/dts/mpc8548.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * MPC8548CDS Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
+/ {
+       #address-cells = <2>;
+       #size-cells = <2>;
+       interrupt-parent = <&mpic>;
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               PowerPC,8548@0 {
+                       device_type = "cpu";
+                       reg = <0>;
+               };
+       };
+};

diff --git a/arch/powerpc/dts/mpc8548cds.dts b/arch/powerpc/dts/mpc8548cds.dts
new file mode 100644 (file)
index 0000000..cceea34
--- /dev/null
+++ b/arch/powerpc/dts/mpc8548cds.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * MPC8548CDS Device Tree Source
+ *
+ * Copyright 2006 - 2012 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "mpc8548.dtsi"
+
+/ {
+       model = "fsl,MPC8548CDS";
+       compatible = "fsl,MPC8548CDS";
+       #address-cells = <2>;
+       #size-cells = <2>;
+       interrupt-parent = <&mpic>;
+
+       soc: soc8548@e0000000 {
+               ranges = <0x0 0x0 0xe0000000 0x100000>;
+       };
+};
+
+/include/ "mpc8548-post.dtsi"

diff --git a/arch/powerpc/dts/mpc8548cds_36b.dts b/arch/powerpc/dts/mpc8548cds_36b.dts
new file mode 100644 (file)
index 0000000..faff35c
--- /dev/null
+++ b/arch/powerpc/dts/mpc8548cds_36b.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * MPC8548CDS (36-bit address map) Device Tree Source
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "mpc8548.dtsi"
+
+/ {
+       model = "fsl,MPC8548CDS";
+       compatible = "fsl,MPC8548CDS";
+       #address-cells = <2>;
+       #size-cells = <2>;
+       interrupt-parent = <&mpic>;
+
+       soc: soc8548@fe0000000 {
+               ranges = <0x0 0xf 0xe0000000 0x100000>;
+       };
+};
+
+/include/ "mpc8548-post.dtsi"

diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index 672dc782119a9ace4f2aa84c9615915fb9f25c58..f259f1992cdd3fc6b5b7548eaa420b1e48263156 100644 (file)
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -1,8 +1,11 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF80000
 CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8548CDS=y
+CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds_36b"
+CONFIG_OF_CONTROL=y
 CONFIG_PHYS_64BIT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y

diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index 09726d283052bee6f2a0ef2e41d05cc334375407..72239da0c313fb662921ad1190bcf5a9b0d36951 100644 (file)
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -1,8 +1,11 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF80000
 CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8548CDS=y
+CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds"
+CONFIG_OF_CONTROL=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=10

diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index 4a2d11f1b6ff97a764084c61d9e2132b3d0a4521..f2420c3ad23a11c8ab0919064f90c96b25c85123 100644 (file)
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -1,8 +1,11 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF80000
 CONFIG_MPC85xx=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8548CDS=y
+CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds"
+CONFIG_OF_CONTROL=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="LEGACY"