Merge branch 'master' of git://git.denx.de/u-boot-sh
authorTom Rini <trini@konsulko.com>
Mon, 4 Mar 2019 21:35:40 +0000 (16:35 -0500)
committerTom Rini <trini@konsulko.com>
Mon, 4 Mar 2019 21:35:40 +0000 (16:35 -0500)
- Assorted PFC fixes

103 files changed:
arch/arm/Kconfig
arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
arch/powerpc/cpu/mpc85xx/Kconfig
arch/powerpc/cpu/mpc86xx/Kconfig
arch/powerpc/include/asm/u-boot.h
board/freescale/ls1088a/ls1088a.c
board/freescale/t104xrdb/ddr.h
configs/at91sam9n12ek_mmc_defconfig
configs/at91sam9n12ek_spiflash_defconfig
configs/at91sam9x5ek_mmc_defconfig
configs/at91sam9x5ek_spiflash_defconfig
configs/ls1043aqds_defconfig
configs/ls1043aqds_lpuart_defconfig
configs/ls1043aqds_nand_defconfig
configs/ls1043aqds_nor_ddr3_defconfig
configs/ls1043aqds_qspi_defconfig
configs/ls1043aqds_sdcard_ifc_defconfig
configs/ls1043aqds_sdcard_qspi_defconfig
configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
configs/ls1043aqds_tfa_defconfig
configs/ls1043ardb_SECURE_BOOT_defconfig
configs/ls1043ardb_defconfig
configs/ls1043ardb_nand_SECURE_BOOT_defconfig
configs/ls1043ardb_nand_defconfig
configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
configs/ls1043ardb_sdcard_defconfig
configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
configs/ls1043ardb_tfa_defconfig
configs/ls1046aqds_SECURE_BOOT_defconfig
configs/ls1046aqds_defconfig
configs/ls1046aqds_lpuart_defconfig
configs/ls1046aqds_nand_defconfig
configs/ls1046aqds_qspi_defconfig
configs/ls1046aqds_sdcard_ifc_defconfig
configs/ls1046aqds_sdcard_qspi_defconfig
configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
configs/ls1046aqds_tfa_defconfig
configs/ls1046ardb_emmc_defconfig
configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
configs/ls1046ardb_qspi_defconfig
configs/ls1046ardb_qspi_spl_defconfig
configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
configs/ls1046ardb_sdcard_defconfig
configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
configs/ls1046ardb_tfa_defconfig
configs/sama5d27_som1_ek_mmc1_defconfig
configs/sama5d36ek_cmp_mmc_defconfig
configs/sama5d36ek_cmp_spiflash_defconfig
configs/sama5d3_xplained_mmc_defconfig
configs/sama5d3xek_mmc_defconfig
configs/sama5d3xek_spiflash_defconfig
configs/sama5d4_xplained_mmc_defconfig
configs/sama5d4_xplained_spiflash_defconfig
configs/sama5d4ek_mmc_defconfig
configs/sama5d4ek_spiflash_defconfig
drivers/ddr/fsl/Kconfig
include/configs/B4860QDS.h
include/configs/BSC9132QDS.h
include/configs/MPC8536DS.h
include/configs/MPC8540ADS.h
include/configs/MPC8541CDS.h
include/configs/MPC8544DS.h
include/configs/MPC8548CDS.h
include/configs/MPC8555CDS.h
include/configs/MPC8560ADS.h
include/configs/MPC8568MDS.h
include/configs/MPC8569MDS.h
include/configs/MPC8572DS.h
include/configs/MPC8610HPCD.h
include/configs/MPC8641HPCN.h
include/configs/P1023RDB.h
include/configs/T102xRDB.h
include/configs/T1040QDS.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240RDB.h
include/configs/UCP1020.h
include/configs/km/kmp204x-common.h
include/configs/ls1012a_common.h
include/configs/ls1021aqds.h
include/configs/ls1021atwr.h
include/configs/ls1043a_common.h
include/configs/ls1043aqds.h
include/configs/ls1043ardb.h
include/configs/ls1046a_common.h
include/configs/ls1046aqds.h
include/configs/ls1046ardb.h
include/configs/ls1088a_common.h
include/configs/ls1088ardb.h
include/configs/ls2080a_common.h
include/configs/ls2080a_emu.h
include/configs/ls2080aqds.h
include/configs/ls2080ardb.h
include/configs/p1_p2_rdb_pc.h
include/configs/sbc8548.h
include/configs/socrates.h
include/configs/t4qds.h
include/configs/xpedite520x.h
include/configs/xpedite537x.h
include/fsl_sec.h
scripts/config_whitelist.txt

index ded7c11a4c2a53a11a77b86ed8f83a23f6d37792..f42eccef80dd21e182bd7dcdb38c0a8c6bb07bb4 100644 (file)
@@ -1005,6 +1005,7 @@ config TARGET_LS2080A_EMU
        select ARCH_MISC_INIT
        select ARM64
        select ARMV8_MULTIENTRY
+       select FSL_DDR_SYNC_REFRESH
        help
          Support for Freescale LS2080A_EMU platform
          The LS2080A Development System (EMULATOR) is a pre silicon
@@ -1031,6 +1032,7 @@ config TARGET_LS1088AQDS
        select ARMV8_MULTIENTRY
        select BOARD_LATE_INIT
        select SUPPORT_SPL
+       select FSL_DDR_INTERACTIVE if !SD_BOOT
        help
          Support for NXP LS1088AQDS platform
          The LS1088A Development System (QDS) is a high-performance
@@ -1047,6 +1049,8 @@ config TARGET_LS2080AQDS
        select SUPPORT_SPL
        imply SCSI
        imply SCSI_AHCI
+       select FSL_DDR_BIST
+       select FSL_DDR_INTERACTIVE if !SPL
        help
          Support for Freescale LS2080AQDS platform
          The LS2080A Development System (QDS) is a high-performance
@@ -1061,6 +1065,8 @@ config TARGET_LS2080ARDB
        select ARMV8_MULTIENTRY
        select BOARD_LATE_INIT
        select SUPPORT_SPL
+       select FSL_DDR_BIST
+       select FSL_DDR_INTERACTIVE if !SPL
        imply SCSI
        imply SCSI_AHCI
        help
@@ -1205,6 +1211,7 @@ config TARGET_LS1088ARDB
        select ARMV8_MULTIENTRY
        select BOARD_LATE_INIT
        select SUPPORT_SPL
+       select FSL_DDR_INTERACTIVE if !SD_BOOT
        help
          Support for NXP LS1088ARDB platform.
          The LS1088A Reference design board (RDB) is a high-performance
@@ -1223,6 +1230,7 @@ config TARGET_LS1021AQDS
        select LS1_DEEP_SLEEP
        select SUPPORT_SPL
        select SYS_FSL_DDR
+       select FSL_DDR_INTERACTIVE
        imply SCSI
 
 config TARGET_LS1021ATWR
@@ -1262,6 +1270,7 @@ config TARGET_LS1043AQDS
        select BOARD_EARLY_INIT_F
        select BOARD_LATE_INIT
        select SUPPORT_SPL
+       select FSL_DDR_INTERACTIVE if !SPL
        imply SCSI
        imply SCSI_AHCI
        help
@@ -1287,6 +1296,9 @@ config TARGET_LS1046AQDS
        select BOARD_LATE_INIT
        select DM_SPI_FLASH if DM_SPI
        select SUPPORT_SPL
+       select FSL_DDR_BIST if !SPL
+       select FSL_DDR_INTERACTIVE  if !SPL
+       select FSL_DDR_INTERACTIVE if !SPL
        imply SCSI
        help
          Support for Freescale LS1046AQDS platform.
@@ -1304,6 +1316,8 @@ config TARGET_LS1046ARDB
        select DM_SPI_FLASH if DM_SPI
        select POWER_MC34VR500
        select SUPPORT_SPL
+       select FSL_DDR_BIST
+       select FSL_DDR_INTERACTIVE if !SPL
        imply SCSI
        help
          Support for Freescale LS1046ARDB platform.
index 0e8649427e9c88033b7a8ffeafa9e766ad0be6a8..3bd993bebfbc0ee85cca479a53f29ebf8a5e6dd8 100644 (file)
@@ -43,7 +43,7 @@ struct icid_id_table icid_tbl[] = {
        SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID),
        SET_QE_ICID(FSL_QE_STREAM_ID),
 #ifdef CONFIG_FSL_CAAM
-       SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2),
+       SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END),
        SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3),
        SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4),
        SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5),
index 2da9adab5b919671a13de269e09b08a0a2bf07dc..abd847b5be025e1aa182b9ea36750a1adc18d0cb 100644 (file)
@@ -41,7 +41,7 @@ struct icid_id_table icid_tbl[] = {
        SET_ETR_ICID(FSL_ETR_STREAM_ID),
        SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID),
 #ifdef CONFIG_FSL_CAAM
-       SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2),
+       SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END),
        SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3),
        SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4),
        SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5),
index f375fe7115c1a49084f2b6327d3bddd4400178d1..f971af8d269072f6119c777e41b65309f1ca4b66 100644 (file)
@@ -9,6 +9,7 @@
 #include <asm/types.h>
 #include <fsl_qbman.h>
 #include <fsl_sec.h>
+#include <asm/armv8/sec_firmware.h>
 
 struct icid_id_table {
        const char *compat;
@@ -93,13 +94,18 @@ void fdt_fixup_icid(void *blob);
 
 #define SET_SEC_QI_ICID(streamid) \
        SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \
-               (((streamid) << 16) | (streamid)), \
-               offsetof(ccsr_sec_t, qilcr_ls) + \
+               0, offsetof(ccsr_sec_t, qilcr_ls) + \
                CONFIG_SYS_FSL_SEC_ADDR, \
                CONFIG_SYS_FSL_SEC_ADDR)
 
 #define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \
-       SET_ICID_ENTRY("fsl,sec-v4.0-job-ring", streamid, \
+       SET_ICID_ENTRY( \
+               (CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT && \
+               (FSL_SEC_JR##jr_num##_OFFSET ==  \
+                       SEC_JR3_OFFSET + CONFIG_SYS_FSL_SEC_OFFSET) \
+                       ? NULL \
+                       : "fsl,sec-v4.0-job-ring"), \
+               streamid, \
                (((streamid) << 16) | (streamid)), \
                offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \
                CONFIG_SYS_FSL_SEC_ADDR, \
index 309ca294601b2e26c1560ebcba114c6f89fecac4..0057f195b38719ae037afe1c5f22b1d1be1397f0 100644 (file)
@@ -37,6 +37,7 @@ config TARGET_B4860QDS
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_INTERACTIVE if !SPL_BUILD
        imply PANIC_HANG
 
 config TARGET_BSC9131RDB
@@ -51,6 +52,7 @@ config TARGET_BSC9132QDS
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select BOARD_EARLY_INIT_F
+       select FSL_DDR_INTERACTIVE
 
 config TARGET_C29XPCIE
        bool "Support C29XPCIE"
@@ -165,6 +167,7 @@ config TARGET_P1022DS
 config TARGET_P1023RDB
        bool "Support P1023RDB"
        select ARCH_P1023
+       select FSL_DDR_INTERACTIVE
        imply CMD_EEPROM
        imply PANIC_HANG
 
@@ -273,6 +276,7 @@ config TARGET_T1023RDB
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_INTERACTIVE
        imply CMD_EEPROM
        imply PANIC_HANG
 
@@ -282,6 +286,7 @@ config TARGET_T1024RDB
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_INTERACTIVE
        imply CMD_EEPROM
        imply PANIC_HANG
 
@@ -290,6 +295,7 @@ config TARGET_T1040QDS
        select ARCH_T1040
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select PHYS_64BIT
+       select FSL_DDR_INTERACTIVE
        imply CMD_EEPROM
        imply CMD_SATA
        imply PANIC_HANG
@@ -344,6 +350,8 @@ config TARGET_T2080QDS
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+       select FSL_DDR_INTERACTIVE
        imply CMD_SATA
 
 config TARGET_T2080RDB
@@ -360,6 +368,8 @@ config TARGET_T2081QDS
        select ARCH_T2081
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+       select FSL_DDR_INTERACTIVE
 
 config TARGET_T4160QDS
        bool "Support T4160QDS"
@@ -383,6 +393,7 @@ config TARGET_T4240QDS
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
        imply CMD_SATA
        imply PANIC_HANG
 
@@ -391,6 +402,7 @@ config TARGET_T4240RDB
        select ARCH_T4240
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
        imply CMD_SATA
        imply PANIC_HANG
 
@@ -402,6 +414,7 @@ config TARGET_KMP204X
        bool "Support kmp204x"
        select ARCH_P2041
        select PHYS_64BIT
+       select FSL_DDR_INTERACTIVE
        imply CMD_CRAMFS
        imply FS_CRAMFS
 
index 2cc180da38972bca7ba7e4890188f8a92b1b5a85..0f253051f26dd5205957abf5bfcf352df9662473 100644 (file)
@@ -21,6 +21,7 @@ config TARGET_MPC8610HPCD
 config TARGET_MPC8641HPCN
        bool "Support MPC8641HPCN"
        select ARCH_MPC8641
+       select FSL_DDR_INTERACTIVE
        imply SCSI
 
 config TARGET_XPEDITE517X
index 9e7e2d45e867a1c881d08c4c956dd4f04463fc51..1841565d0a854e5ede1a1b3e4ed54f2af2e796f5 100644 (file)
 #ifndef __U_BOOT_H__
 #define __U_BOOT_H__
 
+/* For image.h:image_check_target_arch() */
+#define IH_ARCH_DEFAULT IH_ARCH_PPC
+
 /* Use the generic board which requires a unified bd_info */
 #include <asm-generic/u-boot.h>
 #include <asm/ppc.h>
 
-/* For image.h:image_check_target_arch() */
-#define IH_ARCH_DEFAULT IH_ARCH_PPC
-
 #endif /* __U_BOOT_H__ */
index 953aab6e8839aa196c17e6b81ea3c6ab47c9f1b5..6d11a134dc9dd863889b81488976045a38ea1dee 100644 (file)
@@ -643,6 +643,11 @@ int arch_misc_init(void)
 #endif
 
 #ifdef CONFIG_FSL_MC_ENET
+void board_quiesce_devices(void)
+{
+       fsl_mc_ldpaa_exit(gd->bd);
+}
+
 void fdt_fixup_board_enet(void *fdt)
 {
        int offset;
@@ -650,7 +655,7 @@ void fdt_fixup_board_enet(void *fdt)
        offset = fdt_path_offset(fdt, "/fsl-mc");
 
        if (offset < 0)
-               offset = fdt_path_offset(fdt, "/fsl,dprc@0");
+               offset = fdt_path_offset(fdt, "/soc/fsl-mc");
 
        if (offset < 0) {
                printf("%s: ERROR: fsl-mc node not found in device tree (error %d)\n",
@@ -732,7 +737,7 @@ void fsl_fdt_fixup_flash(void *fdt)
 
 int ft_board_setup(void *blob, bd_t *bd)
 {
-       int err, i;
+       int i;
        u64 base[CONFIG_NR_DRAM_BANKS];
        u64 size[CONFIG_NR_DRAM_BANKS];
 
@@ -762,9 +767,6 @@ int ft_board_setup(void *blob, bd_t *bd)
 
 #ifdef CONFIG_FSL_MC_ENET
        fdt_fixup_board_enet(blob);
-       err = fsl_mc_ldpaa_exit(bd);
-       if (err)
-               return err;
 #endif
        if (is_pb_board())
                fixup_ls1088ardb_pb_banner(blob);
index 319fc59478088d6742fb27544e6a5e97fe910979..f9d667f6174b1549c7552373d5c12d9eee8e9051 100644 (file)
@@ -29,6 +29,7 @@ static const struct board_specific_parameters udimm0[] = {
         */
 #ifdef CONFIG_SYS_FSL_DDR4
        {2,  1600, 4, 8,     6, 0x07090A0c, 0x0e0f100a},
+       {1,  1600, 4, 8,     5, 0x0607080B, 0x0C0C0D09},
 #elif defined(CONFIG_SYS_FSL_DDR3)
        {2,  833,  4, 8,     6, 0x06060607, 0x08080807},
        {2,  833,  0, 8,     6, 0x06060607, 0x08080807},
index 853a2641fdde8ee3e3f7acd0187ac971d8719228..6b2cfe9c4226fa37f2c590e3fed53eb91facd330 100644 (file)
@@ -41,7 +41,6 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 273f91c59eb565950340c81fce3388d077c0cf00..63889355bfc8ce43f5dca95fc28c837caf2af4a7 100644 (file)
@@ -41,7 +41,6 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 5deabafe263ff24a5b8684d875b69c44ab7394bf..ff86f93e61602de935fdf746c7f0e80b3ac1b577 100644 (file)
@@ -43,7 +43,6 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 5f06231442eb48daf5a974cf89e83f116582441a..d0eebcdc75b5490b305f48e8e62446077167dad5 100644 (file)
@@ -43,7 +43,6 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 8bde83deda19904672639df2c5d87c55808f0bed..a0f9d62d3b010d0c9514323dae52e7c8a8b66027 100644 (file)
@@ -53,3 +53,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index c8ddbc28ab23615cb753e737e1f6e6a3faa52416..ff5ea65ffee3657afd27d661c0b144eb5a5baf43 100644 (file)
@@ -55,3 +55,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index c845b01831a69409e6a5ec0785a0fe167f2af876..f81ef5ecbdcef87ccf0aa3882ee04893e5386d24 100644 (file)
@@ -68,3 +68,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 3cabc68729a0eaadf8646337662825191cbb0554..e9394b391664717d639f902d8b8f8908508ae6b5 100644 (file)
@@ -54,3 +54,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 434f69c289ab849fc0fb58f18f13e65eab6e93ce..8783f8ef44b8ca2d0d1c2b92958dc46052185b24 100644 (file)
@@ -49,3 +49,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index bdbb12d3021876d8885ffe1a3783035b3b7fd63f..e876db3297f5acda3b5ee537d64c98a4080ea8f9 100644 (file)
@@ -68,3 +68,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 3b16f3e84f181ac1e8a557e69138195a90e2e0dc..23a47d6c3e44c255c853b90c3a6933ab7b47102b 100644 (file)
@@ -62,3 +62,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 096f6fb984b308b5adb6fdfc848e74a8e170b8f8..9a6e7dae2835c7d221cb249d0f07dcc38dc263ee 100644 (file)
@@ -57,3 +57,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index f33c9bd9a9712f284f66e74680ffa4627e0c956e..a6bc1e28d638f5685700f16e514da24f4a1a6b09 100644 (file)
@@ -58,3 +58,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 0a5154067454906825e0a0d1e2e8455fe36557a4..3f5e0b720aa5d659f2f98ebaf66770dd1be8d1fe 100644 (file)
@@ -48,3 +48,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 1462a44369411bc008810d5288a01cd6cb533bdf..b1b46b1737e867b9364f176d262e221476e35ce1 100644 (file)
@@ -46,3 +46,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 8a45f7c8d09ebde75e61ba4782aa28ce148a03a1..0feeb64f71e9a7f79f46055abc4da542a3cc6c9b 100644 (file)
@@ -65,3 +65,4 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 509f2f1e3ca394b798c91543cd619e87af96923c..a232b45a79458f10c4f50b947907006cc7ec5d22 100644 (file)
@@ -63,3 +63,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 33ce8acd084e5eb8b2283dcda0772d196561e6c1..753957f65809451c50a56de6462f25a1e9013fa1 100644 (file)
@@ -63,3 +63,4 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 91dac81e8b3f19536b0956abbe92129a17e51a70..23e54603bbc61b899f693f142c5bb5aa90b4d44e 100644 (file)
@@ -61,3 +61,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 0af259420548ca6b7aaef631b1eff56d8c7b0fda..ef01a167c4ef7b8a091604ac00c17b9e4045ec7d 100644 (file)
@@ -50,3 +50,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 93cd5450ddffbd7b318e4a8221f6e18e7dc1b5cf..43cb6f92bd04ecdb2ab401a2875de0d4236006b0 100644 (file)
@@ -50,3 +50,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 2a811ae62713a606dbaec498eea6e801837ab5eb..5ba600ee6728a111b0d4f1a8fc85935c35a08891 100644 (file)
@@ -2,10 +2,10 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1046AQDS=y
 CONFIG_SYS_TEXT_BASE=0x60100000
 CONFIG_SECURE_BOOT=y
+CONFIG_FSL_LS_PPA=y
 CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_NR_DRAM_BANKS=2
-CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_BOOTDELAY=10
@@ -55,3 +55,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index f7a35dfeb9d297aff266f55f4e081e0b0aac8f6d..b815fc9819cee4a4af405f16a361791237cdb8b0 100644 (file)
@@ -55,3 +55,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 5b5800a9bf20dae0f0792b1086bb86f31a94513e..9c7e6904ae9e723f90584003b1f648aa6cfb5fd1 100644 (file)
@@ -57,3 +57,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 4b594d5a87dda9262cbf860e450af8c9679cfcde..2d9169babdea850de66414b29ea505924f10c3ea 100644 (file)
@@ -62,3 +62,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 16fc81a46def9bcbaf397e034c5ee859938e9290..4cc19fe7ac76296eafd4a73477c1d3425cae84ff 100644 (file)
@@ -52,3 +52,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 9da8fe0d4f72d3e8bb1c61d7daa164d38a3f8d43..f11da29c79f9682617e8c17b2f97daba51c3bf6a 100644 (file)
@@ -71,3 +71,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index de8a2c2e3f450bfdd5f3a2f12df28d2ad5ef832c..a7620d23ad30e22994149397fe0300bd1185186b 100644 (file)
@@ -67,3 +67,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index f57dda591a51ff8e01562697c66532ca8ff13bc0..44d90576c1a6a26174ae3bed7e7da58625e61670 100644 (file)
@@ -57,3 +57,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index f77aa23024f20bf2bb4a8e1360efc9c5e656f47b..e4ccdc6d85f28d5a43f091ada2654654350ce5ed 100644 (file)
@@ -61,3 +61,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index f84b5ba4b3f57be79f41ca1d887c6b9c21bba8b6..4b4528986929525b158fd6173f4417e8c4e37e68 100644 (file)
@@ -63,3 +63,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index cd40abb2fe147408eaa6654592e9b08df47534b3..27309bfa33f718f25b59d5c7f263ac49083621ed 100644 (file)
@@ -49,3 +49,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index fa4a08f024c9c3f22c27e3b16696687add5e6b39..d2850480d6ff5a5c915ab92be5a878c11fafb1d2 100644 (file)
@@ -49,3 +49,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 184c137fe2a200251a085852c31a62fc26fba536..975cc580bda94596f8b4a34740970f5fe7671d17 100644 (file)
@@ -67,3 +67,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_SPL_GZIP=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 80c42c5bad9309636b3b4b81537649cf070ca441..643a52039a9628c132bd86b7a0518fadc9bd4171 100644 (file)
@@ -61,3 +61,4 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index daee64af02697e2a4f041405bdeb561313b61541..a7624967cfbee1f5aff9bf84b6763c34a603ae5e 100644 (file)
@@ -62,3 +62,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index ea70c01155f187c0928f2c7c6978d161737ecfac..93efb5c3a9f6221f55522c099c12d2a21a40a5d0 100644 (file)
@@ -50,3 +50,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index fdc2521504174ba22ab0b34a8ce2d61a55204d47..c86e182459fdea02dd1326bc08cf6da591fc8311 100644 (file)
@@ -51,3 +51,4 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
index 5f4abe86053b7c59519b658598fbedd68a558a31..9ba8d79e31038f9f50eb96cef8325eae373bdd91 100644 (file)
@@ -23,6 +23,7 @@ CONFIG_SD_BOOT=y
 CONFIG_BOOTDELAY=3
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwait"
+CONFIG_MISC_INIT_R=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_HUSH_PARSER=y
index ced445f17d3606ce86b5c4369e784e0dde8015e2..3026cab380bd7bb34b784634e7f8c3e1eeec1125 100644 (file)
@@ -43,7 +43,6 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 1f1fc8ee339db5d3a64c71779a5dc3ffd39f7fdd..04ca6a8e34f9ac80e70453e59628322b1fce3be4 100644 (file)
@@ -43,7 +43,6 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index ab5aedc2082a2c0448a116b480caf9a74c63af4c..f0995da20a77aa7a91f3e0d6239395f7497d3a9c 100644 (file)
@@ -61,7 +61,6 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
index 404af1ffade87a9ba53621bbd16958468fe13f16..548b0b87c0ba68f9c2fa64c6bd446dbea9da9371 100644 (file)
@@ -68,7 +68,6 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=4
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 43db3872e9f71bc77e748d54d6758ce3c514fe41..824fa2768cb6ef8a450400adbf2ab7535b01f701 100644 (file)
@@ -63,7 +63,6 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=4
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index cbfb645201aefeb288d89d4e2e8723ddb07e7273..9f15c9770597a62bd0d1b5567f09960e6a82b75a 100644 (file)
@@ -58,7 +58,6 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index ef0833905e248dd3beef77f4a22f50427d24e4f2..89cfee44ba6a2b7658af9294284c65781b3dd0f1 100644 (file)
@@ -59,7 +59,6 @@ CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=8
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index a121af410bc8d6965265275d5f20d23cf56c6887..9e2e1a95fb414bfc02642018c54c4b145a8829ce 100644 (file)
@@ -58,7 +58,6 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 87052d5a019df72303b2932684902cabe06627d8..c6ab3fd61aac22f57c78b999f1b617d2ea0f5583 100644 (file)
@@ -56,7 +56,6 @@ CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=8
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index c5bd8a88760f784f213d5b8e06ccd15679a0df39..1b73df82debc1dc47658dce9616537b68c5b8dc8 100644 (file)
@@ -20,6 +20,18 @@ config SYS_FSL_DDR_LE
        help
                Access DDR registers in little-endian
 
+config FSL_DDR_BIST
+       bool
+
+config FSL_DDR_INTERACTIVE
+       bool
+
+config FSL_DDR_SYNC_REFRESH
+       bool
+
+config FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+       bool
+
 menu "Freescale DDR controllers"
        depends on SYS_FSL_DDR
 
index 252e1272c3e470720b110f4071e8de1d12d99d87..42b333721611bb72c0a1aa44d9119b529de86027 100644 (file)
@@ -194,9 +194,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_DDR_RAW_TIMING
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_FSL_DDR_INTERACTIVE
-#endif
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS1    0x51
index 49bb38279a5acca06ef5d357982d8bbc8280bd8a..f385509dafe9cad2257659e9da10b4a04e374bbd 100644 (file)
 #define CONFIG_SYS_SPD_BUS_NUM         0
 #define SPD_EEPROM_ADDRESS1            0x54 /* I2C access */
 #define SPD_EEPROM_ADDRESS2            0x56 /* I2C access */
-#define CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
 
index 86a1233e322014416c118b96ec5073000c55695c..1413b3dcfe1f0ad19a18b66d43e7ad43085126d5 100644 (file)
@@ -83,7 +83,6 @@
 
 /* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 
index b8a9b5c638bc06ef572657e600726063e4f28ed5..13ca2c395df39aecf1eb769456e66b57da2c92ca 100644 (file)
@@ -67,7 +67,6 @@
 /* DDR Setup */
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
 
index 13ad04e279f191f22e8405f007e89a4fa81fa7a4..e00a56e2fd9fd447cf2f7168dff3cd17f07b2559 100644 (file)
@@ -41,7 +41,6 @@ extern unsigned long get_clock_freq(void);
 /* DDR Setup */
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
 
index 6ad0849cec7f7fa620723e68ec456c81281dd16a..280b873aee5814e8b186d80af77bb50ac50032d3 100644 (file)
@@ -45,7 +45,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 
index b09cbab292a6d44194bb96cbca2197720c3c9878..be600becfe8f499f42291c4a15e7fea29bf31e20 100644 (file)
@@ -56,7 +56,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 
index bac845682516fdb6f1f1f9dee31fa15601b362a0..5b3933412c2309b945f0520273c78a5d1d70b351 100644 (file)
@@ -41,7 +41,6 @@ extern unsigned long get_clock_freq(void);
 /* DDR Setup */
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
 
index d28a35f87b377aec8cc266762002b69ed57f10fc..5ba2b6d64348803c770d46e7c06298149fabe067 100644 (file)
@@ -66,7 +66,6 @@
 /* DDR Setup */
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
 
index 5da70bb83ed845128c6809435e323e0d6829ddef..9b3485ed4b7f8f46f31811b9130e91c22a02c0c6 100644 (file)
@@ -44,7 +44,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */
index 0edcc2ed72b63a9638cc0d38c1c0dfdd4790c749..de5a7ca959e4a7eef2488067677f1ca2a55a1702 100644 (file)
@@ -68,7 +68,6 @@ extern unsigned long get_clock_freq(void);
 #endif
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */
index cff3ca9bce6067092250b25abb877f5d742c4f37..13fbbb3044b8fbba26a67961c82c8e854daf39e5 100644 (file)
@@ -73,7 +73,6 @@
 
 /* DDR Setup */
 #define CONFIG_VERY_BIG_RAM
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 
index a3f29c5f9ea46c5aec0476ae64680101fa600a03..b534d4758bbef40326a0f9c461fcb783d483285e 100644 (file)
@@ -72,7 +72,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS                CONFIG_SYS_CCSRBAR_PHYS_LOW
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD for DDR */
 #define CONFIG_DDR_SPD
 
index bb6dd95d598a4151f8f935bea2d89302b4e66065..9318b190ae5f2593f4d40401a5c8e5fd6d5f1a6f 100644 (file)
@@ -97,7 +97,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 /*
  * DDR Setup
  */
-#define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 
index ada00ae8bbdf3fe4f7bbadf1e21795fa1a5b7315..4f6ee223853770714a83ee01a83ee2721b7fc50c 100644 (file)
@@ -59,7 +59,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1
 
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SDRAM_SIZE          512u    /* DDR is 512M */
 #define CONFIG_SYS_SPD_BUS_NUM          0
 #define SPD_EEPROM_ADDRESS              0x50
index c72be9fb387aded30efdf7652094e028f8e99524..b0f93abf983cbc27d073efc7fe4316fd8dd540e8 100644 (file)
@@ -236,7 +236,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_FSL_DDR_INTERACTIVE
 #if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM 0
index 2d5c96f3353ee2641e7c452a556e5b119a63c274..147ef7108435afc2f453c33b57f59d30186a4e17 100644 (file)
@@ -140,7 +140,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51
index 69ec109831a0f51606ffae402525d3bfec1b389e..9ca384cc0caf032390bea281d1e0f1b1a2a777fd 100644 (file)
@@ -189,9 +189,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR     2
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51
index 1d6a390b72dfe01f773c08e9d7fc57f1b7448eb8..446e4268ef686884780448d9f9981ca63e46fad6 100644 (file)
@@ -175,7 +175,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_DDR_SPD
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1    0x51
index 42252c7c42a8275c40557365ec6046a459a7fd75..f42a4f4af0fb99d0237d9b413be7ce97a8dd2d4a 100644 (file)
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   4
-#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 
 #define CONFIG_DDR_SPD
 
index 1bbe9d9b375755dd6c15c17b7372eaa336ef3706..6a0254a55be3318e21dac4084155312270f61c8f 100644 (file)
 #define CONFIG_DDR_SPD
 #endif
 #define CONFIG_SYS_SPD_BUS_NUM 1
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SYS_SDRAM_SIZE_LAW      LAW_SIZE_512M
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1
index c762c93ac0aa47c67fc28b0be14c61751d11ac49..d4da9dd213d48099c3930d7ce925a0215369e6ae 100644 (file)
@@ -94,7 +94,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x54
index 9bbf34883efa2ec1bdc451b680eb797e8cf4d639..04639c175f5acab9dcafa44ec1e319f24a22f090 100644 (file)
 
 #ifndef CONFIG_SPL_BUILD
 #define BOOT_TARGET_DEVICES(func) \
-       func(SCSI, scsi, 0) \
        func(MMC, mmc, 0) \
-       func(USB, usb, 0)
+       func(USB, usb, 0) \
+       func(SCSI, scsi, 0) \
+       func(DHCP, dhcp, na)
 #include <config_distro_bootcmd.h>
 #endif
 
index 4ad98c69e62362a51596eb178870836a9cee4f8c..d75ac4e57ea254dca904dea2b202b4569fa615c3 100644 (file)
@@ -89,7 +89,6 @@ unsigned long get_board_ddr_clk(void);
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0
 
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
 #ifndef CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
 #endif
index 2c91ae783b57c65ad5eaf76f9b901d445cdce551..4b6760b600dd14f2cb5cd360784a5e1f70868faf 100644 (file)
 
 #define BOOT_TARGET_DEVICES(func) \
        func(MMC, mmc, 0) \
-       func(USB, usb, 0)
+       func(USB, usb, 0) \
+       func(DHCP, dhcp, na)
 #include <config_distro_bootcmd.h>
 
 #ifdef CONFIG_LPUART
index 662b573ed9683a2e90d8f3abb9874a3a43904d07..f7e7877414f657a65d8cc2bd9c73fce77cfa5eac 100644 (file)
 #ifndef CONFIG_SPL_BUILD
 #define BOOT_TARGET_DEVICES(func) \
        func(MMC, mmc, 0) \
-       func(USB, usb, 0)
+       func(USB, usb, 0) \
+       func(DHCP, dhcp, na)
 #include <config_distro_bootcmd.h>
 #endif
 
                                "run scan_dev_for_boot; "       \
                        "fi; "                                  \
                "done\0"                        \
-       "scan_dev_for_boot="                                    \
-               "echo Scanning ${devtype} "                     \
-                       "${devnum}:${distro_bootpart}...; "     \
-               "for prefix in ${boot_prefixes}; do "           \
-                       "run scan_dev_for_scripts; "            \
-               "done;\0"                                       \
        "boot_a_script="                                        \
                "load ${devtype} ${devnum}:${distro_bootpart} " \
                        "${scriptaddr} ${prefix}${script}; "    \
index ed07d9f28e9a1865b9daf2813153e49afd71866b..52b47ad6704e4f7c29a042714b4411309b7d0a16 100644 (file)
@@ -28,10 +28,6 @@ unsigned long get_board_ddr_clk(void);
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0
 
-#ifndef CONFIG_SPL
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#endif
-
 #define CONFIG_DDR_ECC
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
index a0d39878b85e59940d22ced906a82d1f088f6675..6ab83d02a41ab2571ccfc59bcc3adab7cf074e81 100644 (file)
@@ -21,8 +21,6 @@
 
 #ifndef CONFIG_SPL
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#define CONFIG_FSL_DDR_BIST
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #endif
index 0266681c52bb012bce9c5adbf3a3d335ce99f271..d9fcd3af5efaf4766c433c59a9b871e4c1360826 100644 (file)
 #define BOOT_TARGET_DEVICES(func) \
        func(SCSI, scsi, 0) \
        func(MMC, mmc, 0) \
-       func(USB, usb, 0)
+       func(USB, usb, 0) \
+       func(DHCP, dhcp, na)
 #include <config_distro_bootcmd.h>
 #endif
 
                        "run scan_dev_for_boot; "            \
                  "fi; "                                   \
                "done\0"                                   \
-       "scan_dev_for_boot="                              \
-               "echo Scanning ${devtype} "               \
-                               "${devnum}:${distro_bootpart}...; "  \
-               "for prefix in ${boot_prefixes}; do "     \
-                       "run scan_dev_for_scripts; "      \
-               "done;"                                   \
-               "\0"                                      \
        "boot_a_script="                                  \
                "load ${devtype} ${devnum}:${distro_bootpart} "  \
                        "${scriptaddr} ${prefix}${script}; "    \
index 886fe723ba17ea50efc152d3c717c044ed121bf1..6e36baf4ca581ceb0bda761f0344cacdb1a5b591 100644 (file)
@@ -28,10 +28,6 @@ unsigned long get_board_ddr_clk(void);
 #define SPD_EEPROM_ADDRESS             0x51
 #define CONFIG_SYS_SPD_BUS_NUM         0
 
-#ifndef CONFIG_SPL
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#endif
-
 #define CONFIG_DDR_ECC
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
index 77b50dbdad6a9d28ed21293c5a552e2532b5ef8f..f22e863749b0ae6f6577e0ad5ffbbae844c88e9f 100644 (file)
 #define CONFIG_DDR_ECC
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
-#define CONFIG_FSL_DDR_BIST    /* enable built-in memory test */
-#ifndef CONFIG_SPL
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#endif
 
 #ifdef CONFIG_SD_BOOT
 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg
index b663937d8cfd5b4bca1cd8bf98e9ab8672a2f449..a80ce92881155e88181f770980d0e16ce3ba71c9 100644 (file)
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#if !defined(CONFIG_SD_BOOT)
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#endif
-
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY      0
index f52ea4d746c7e9dc1529af6628e2404c62ec069e..45af087dc6dee37d9ba4747babddacd6f9e469e7 100644 (file)
                                "run scan_dev_for_boot; "       \
                        "fi; "                                  \
                "done\0"                                        \
-       "scan_dev_for_boot="                                    \
-               "echo Scanning ${devtype} "                     \
-               "${devnum}:${distro_bootpart}...; "             \
-               "for prefix in ${boot_prefixes}; do "           \
-                       "run scan_dev_for_scripts; "            \
-               "done;\0"                                       \
        "boot_a_script="                                        \
                "load ${devtype} ${devnum}:${distro_bootpart} " \
                "${scriptaddr} ${prefix}${script}; "            \
                                "run scan_dev_for_boot; "       \
                        "fi; "                                  \
                "done\0"                                        \
-       "scan_dev_for_boot="                                    \
-               "echo Scanning ${devtype} "                     \
-               "${devnum}:${distro_bootpart}...; "             \
-               "for prefix in ${boot_prefixes}; do "           \
-                       "run scan_dev_for_scripts; "            \
-               "done;\0"                                       \
        "boot_a_script="                                        \
                "load ${devtype} ${devnum}:${distro_bootpart} " \
                "${scriptaddr} ${prefix}${script}; "            \
 
 #define BOOT_TARGET_DEVICES(func) \
        func(MMC, mmc, 0) \
-       func(SCSI, scsi, 0)
+       func(SCSI, scsi, 0) \
+       func(DHCP, dhcp, na)
 #include <config_distro_bootcmd.h>
 #endif
 
index 0a6c90dc8ba33412fcedae820ca247dc05f9e5fd..60a0b42503522578bedd610692e3a544a501dc2b 100644 (file)
@@ -34,9 +34,6 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#ifndef CONFIG_SPL
-#define CONFIG_FSL_DDR_INTERACTIVE     /* Interactive debugging */
-#endif
 #ifndef CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
 #endif
index 76ac5363c50078e9d6a58cd9f181d204a98a7a59..d5cb3e4df97293ce897ba33c55cf46eddae913aa 100644 (file)
@@ -24,8 +24,6 @@
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR      1
 #endif
 
-#define CONFIG_FSL_DDR_SYNC_REFRESH
-
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
 #define CONFIG_SYS_NOR_AMASK   IFC_AMASK(128*1024*1024)
 /*
index a23a4edaee223653c40a3946a5552a096f533df2..74c7dc4f8ab2f307635572785710d4f4264e9a10 100644 (file)
@@ -42,7 +42,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR      1
 #endif
-#define CONFIG_FSL_DDR_BIST    /* enable built-in memory test */
 
 /* SATA */
 #define CONFIG_SCSI_AHCI_PLAT
@@ -64,8 +63,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_ENV_SECT_SIZE           0x20000
 #endif
 
-/* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */
-
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
 #define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128*1024*1024)
 #define CONFIG_SYS_NOR_AMASK_EARLY     IFC_AMASK(64*1024*1024)
index ef0f4ff48e8118aa85e6b874c4ef032fedaa3797..e41ace668594892f502102da5705035dbc1928f2 100644 (file)
@@ -57,7 +57,6 @@ unsigned long get_board_sys_clk(void);
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR      1
 #endif
-#define CONFIG_FSL_DDR_BIST    /* enable built-in memory test */
 
 /* SATA */
 #define CONFIG_SCSI_AHCI_PLAT
@@ -80,7 +79,6 @@ unsigned long get_board_sys_clk(void);
 #endif
 
 #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT)
-/* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */
 
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
 #define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128*1024*1024)
@@ -333,7 +331,8 @@ unsigned long get_board_sys_clk(void);
 #define BOOT_TARGET_DEVICES(func) \
        func(USB, usb, 0) \
        func(MMC, mmc, 0) \
-       func(SCSI, scsi, 0)
+       func(SCSI, scsi, 0) \
+       func(DHCP, dhcp, na)
 #include <config_distro_bootcmd.h>
 
 #ifdef CONFIG_TFABOOT
@@ -428,12 +427,6 @@ unsigned long get_board_sys_clk(void);
                                "run scan_dev_for_boot; "       \
                        "fi; "                                  \
                "done\0"                                        \
-       "scan_dev_for_boot="                                    \
-               "echo Scanning ${devtype} "                     \
-                       "${devnum}:${distro_bootpart}...; "     \
-               "for prefix in ${boot_prefixes}; do "           \
-                       "run scan_dev_for_scripts; "            \
-               "done;\0"                                       \
        "boot_a_script="                                        \
                "load ${devtype} ${devnum}:${distro_bootpart} " \
                        "${scriptaddr} ${prefix}${script}; "    \
@@ -497,12 +490,6 @@ unsigned long get_board_sys_clk(void);
                                "run scan_dev_for_boot; "       \
                        "fi; "                                  \
                "done\0"                                        \
-       "scan_dev_for_boot="                                    \
-               "echo Scanning ${devtype} "                     \
-                       "${devnum}:${distro_bootpart}...; "     \
-               "for prefix in ${boot_prefixes}; do "           \
-                       "run scan_dev_for_scripts; "            \
-               "done;\0"                                       \
        "boot_a_script="                                        \
                "load ${devtype} ${devnum}:${distro_bootpart} " \
                        "${scriptaddr} ${prefix}${script}; "    \
index 0e1f9836a6485bc297c6b0bf992a820ecff06860..8fda0c1e226cc9c4efcc886c9605bfece3aebf63 100644 (file)
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM 1
 #define SPD_EEPROM_ADDRESS 0x52
-#undef CONFIG_FSL_DDR_INTERACTIVE
 
 #if (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_TARGET_P1020RDB_PD))
 #define CONFIG_SYS_SDRAM_SIZE_LAW      LAW_SIZE_2G
index f0b165591c9adbce6753fc6d7c5fd11af76b09e3..9df8604af712a368d5c4982583b0a42b5b944823 100644 (file)
@@ -83,7 +83,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #undef CONFIG_DDR_ECC                  /* only for ECC DDR module */
 /*
  * A hardware errata caused the LBC SDRAM SPD and the DDR2 SPD
index 9fa8917a9bc0b25956114fdba3ba79273bf71969..3f84fabdb60e03b1d8d6bf96abfd86fd39f4bc82 100644 (file)
@@ -60,7 +60,6 @@
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 
index bca5961206e75a1c0cca912de3bc89f497056dc9..bf375019128169b2144b53f4e9d3502887a7913d 100644 (file)
@@ -73,7 +73,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     2
 #define CONFIG_CHIP_SELECTS_PER_CTRL   4
-#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 
 #define CONFIG_DDR_SPD
 
index 206f0c13a4f12bef2772d41b18494a60683c9aee..5737cfee950cdde21aab0e485af593f9566385ff 100644 (file)
@@ -25,7 +25,6 @@
 /*
  * DDR config
  */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
index e6eea8dfc29c15a0df230d54299a69bce3d452c3..22dd3c036eb8c67a6f5bf5595fe0d7ae7a1948ab 100644 (file)
@@ -33,7 +33,6 @@
 /*
  * DDR config
  */
-#undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_MEM_INIT_VALUE          0xdeadbeef
index 16e3fcb5a1fdfc59d143101d24ca972d870dac87..be08a2b88b122e49fb724d00e24eeb00d51989b9 100644 (file)
@@ -121,10 +121,18 @@ typedef struct ccsr_sec {
        u32     chanum_ls;      /* CHA Number Register, LS */
        u32     secvid_ms;      /* SEC Version ID Register, MS */
        u32     secvid_ls;      /* SEC Version ID Register, LS */
+#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3)
+       u8      res9[0x6f020];
+#else
        u8      res9[0x6020];
+#endif
        u32     qilcr_ms;       /* Queue Interface LIODN CFG Register, MS */
        u32     qilcr_ls;       /* Queue Interface LIODN CFG Register, LS */
+#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3)
+       u8      res10[0x8ffd8];
+#else
        u8      res10[0x8fd8];
+#endif
 } ccsr_sec_t;
 
 #define SEC_CTPR_MS_AXI_LIODN          0x08000000
index 346c388d206da9504cb42170a4701afdb1ac02ff..db00376d92f616194c05139a7fef1795826de07e 100644 (file)
@@ -624,10 +624,6 @@ CONFIG_FSL_CADMUS
 CONFIG_FSL_CORENET
 CONFIG_FSL_CPLD
 CONFIG_FSL_DCU_SII9022A
-CONFIG_FSL_DDR_BIST
-CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
-CONFIG_FSL_DDR_INTERACTIVE
-CONFIG_FSL_DDR_SYNC_REFRESH
 CONFIG_FSL_DEEP_SLEEP
 CONFIG_FSL_DEVICE_DISABLE
 CONFIG_FSL_DIU_CH7301