AM654 allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, ROM stores a value at a particular
address. Add support for reading this information and determining
the boot media correctly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
#if defined(CONFIG_ARCH_OMAP2PLUS) \
|| defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) \
- || defined(CONFIG_EXYNOS4210)
+ || defined(CONFIG_EXYNOS4210) || defined(CONFIG_ARCH_K3)
/* Platform-specific defines */
#include <asm/arch/spl.h>
help
Describes the size of MCU Scratchpad RAM.
+config SYS_K3_BOOT_PARAM_TABLE_INDEX
+ hex
+ default 0x41c7fbfc if SOC_K3_AM6
+ help
+ Address at which ROM stores the value which determines if SPL
+ is booted up by primary boot media or secondary boot media.
+
endif
*/
#include <common.h>
+#include <asm/io.h>
#include <spl.h>
+#include <asm/arch/hardware.h>
#ifdef CONFIG_SPL_BUILD
+static void store_boot_index_from_rom(void)
+{
+ u32 *boot_index = (u32 *)K3_BOOT_PARAM_TABLE_INDEX_VAL;
+
+ *boot_index = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
+}
+
void board_init_f(ulong dummy)
{
+ /*
+ * Cannot delay this further as there is a chance that
+ * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
+ */
+ store_boot_index_from_rom();
+
/* Init DM early in-order to invoke system controller */
spl_early_init();
preloader_console_init();
}
-u32 spl_boot_device(void)
+static u32 __get_backup_bootmedia(u32 devstat)
{
+ u32 bkup_boot = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_MASK) >>
+ CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT;
+
+ switch (bkup_boot) {
+ case BACKUP_BOOT_DEVICE_USB:
+ return BOOT_DEVICE_USB;
+ case BACKUP_BOOT_DEVICE_UART:
+ return BOOT_DEVICE_UART;
+ case BACKUP_BOOT_DEVICE_ETHERNET:
+ return BOOT_DEVICE_ETHERNET;
+ case BACKUP_BOOT_DEVICE_MMC2:
+ return BOOT_DEVICE_MMC2;
+ case BACKUP_BOOT_DEVICE_SPI:
+ return BOOT_DEVICE_SPI;
+ case BACKUP_BOOT_DEVICE_HYPERFLASH:
+ return BOOT_DEVICE_HYPERFLASH;
+ case BACKUP_BOOT_DEVICE_I2C:
+ return BOOT_DEVICE_I2C;
+ };
+
return BOOT_DEVICE_RAM;
}
+
+static u32 __get_primary_bootmedia(u32 devstat)
+{
+ u32 bootmode = devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK;
+
+ if (bootmode == BOOT_DEVICE_OSPI || bootmode == BOOT_DEVICE_QSPI)
+ bootmode = BOOT_DEVICE_SPI;
+
+ return bootmode;
+}
+
+u32 spl_boot_device(void)
+{
+ u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
+ u32 bootindex = readl(K3_BOOT_PARAM_TABLE_INDEX_VAL);
+
+ if (bootindex == K3_PRIMARY_BOOTMODE)
+ return __get_primary_bootmedia(devstat);
+ else
+ return __get_backup_bootmedia(devstat);
+}
#endif
#ifndef CONFIG_SYSRESET
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * K3: AM6 SoC definitions, structures etc.
+ *
+ * (C) Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ */
+#ifndef __ASM_ARCH_AM6_HARDWARE_H
+#define __ASM_ARCH_AM6_HARDWARE_H
+
+#include <config.h>
+
+#define CTRL_MMR0_BASE 0x00100000
+#define CTRLMMR_MAIN_DEVSTAT (CTRL_MMR0_BASE + 0x30)
+
+#define CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK GENMASK(3, 0)
+#define CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT 0
+#define CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_MASK GENMASK(6, 4)
+#define CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT 4
+
+/* MCU SCRATCHPAD usage */
+#define K3_BOOT_PARAM_TABLE_INDEX_VAL CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
+
+#endif /* __ASM_ARCH_AM6_HARDWARE_H */
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ * Lokesh Vutla <lokeshvutla@ti.com>
+ */
+#ifndef _ASM_ARCH_AM6_SPL_H_
+#define _ASM_ARCH_AM6_SPL_H_
+
+#define BOOT_DEVICE_RAM 0x00
+#define BOOT_DEVICE_OSPI 0x01
+#define BOOT_DEVICE_QSPI 0x02
+#define BOOT_DEVICE_HYPERFLASH 0x03
+#define BOOT_DEVICE_SPI 0x04
+#define BOOT_DEVICE_I2C 0x05
+#define BOOT_DEVICE_MMC2 0x06
+#define BOOT_DEVICE_ETHERNET 0x07
+#define BOOT_DEVICE_USB 0x08
+#define BOOT_DEVICE_PCIE 0x09
+#define BOOT_DEVICE_UART 0x0a
+#define BOOT_DEVICE_NAND 0x0c
+#define BOOT_DEVICE_MMC1 0x0d
+#define BOOT_DEVICE_MMC2_2 0x0e
+
+#define BACKUP_BOOT_DEVICE_RAM 0x0
+#define BACKUP_BOOT_DEVICE_USB 0x1
+#define BACKUP_BOOT_DEVICE_UART 0x2
+#define BACKUP_BOOT_DEVICE_ETHERNET 0x3
+#define BACKUP_BOOT_DEVICE_MMC2 0x4
+#define BACKUP_BOOT_DEVICE_SPI 0x5
+#define BACKUP_BOOT_DEVICE_HYPERFLASH 0x6
+#define BACKUP_BOOT_DEVICE_I2C 0x7
+
+#define K3_PRIMARY_BOOTMODE 0x0
+#define K3_BACKUP_BOOTMODE 0x1
+
+#endif
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ * Lokesh Vutla <lokeshvutla@ti.com>
+ */
+#ifndef _ASM_ARCH_HARDWARE_H_
+#define _ASM_ARCH_HARDWARE_H_
+
+#ifdef CONFIG_SOC_K3_AM6
+#include "am6_hardware.h"
+#endif
+#endif /* _ASM_ARCH_HARDWARE_H_ */
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ * Lokesh Vutla <lokeshvutla@ti.com>
+ */
+#ifndef _ASM_ARCH_SPL_H_
+#define _ASM_ARCH_SPL_H_
+
+#ifdef CONFIG_SOC_K3_AM6
+#include "am6_spl.h"
+#endif
+#endif /* _ASM_ARCH_SPL_H_ */
projects / oweals / u-boot.git / commitdiff