armv8: ls1043a: add icid setup support
authorLaurentiu Tudor <laurentiu.tudor@nxp.com>
Mon, 27 Aug 2018 14:33:59 +0000 (17:33 +0300)
committerYork Sun <york.sun@nxp.com>
Thu, 27 Sep 2018 15:58:15 +0000 (08:58 -0700)
Reuse the existing ICID setup code done for LS1046A smmu enablement
and add the equivalent setup for LS1043A chips.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/Makefile
arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c [new file with mode: 0644]
arch/arm/cpu/armv8/fsl-layerscape/soc.c
arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
board/freescale/ls1043aqds/ls1043aqds.c
board/freescale/ls1043ardb/ls1043ardb.c

index 5d6f68aad676c585a289668f064e4876eae3d01e..91fdbad8be03ef012a3947f505e1d4a118b1bdfb 100644 (file)
@@ -29,6 +29,7 @@ endif
 ifneq ($(CONFIG_ARCH_LS1043A),)
 obj-$(CONFIG_SYS_HAS_SERDES) += ls1043a_serdes.o
 obj-$(CONFIG_ARMV8_PSCI) += ls1043a_psci.o
+obj-y += icid.o ls1043_ids.o
 endif
 
 ifneq ($(CONFIG_ARCH_LS1012A),)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
new file mode 100644 (file)
index 0000000..0e86494
--- /dev/null
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ */
+
+#include <common.h>
+#include <asm/arch-fsl-layerscape/immap_lsch2.h>
+#include <asm/arch-fsl-layerscape/fsl_icid.h>
+#include <asm/arch-fsl-layerscape/fsl_portals.h>
+#include <fsl_sec.h>
+
+#ifdef CONFIG_SYS_DPAA_QBMAN
+struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
+       SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+       SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+       SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+       SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+       SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+       SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+       SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+       SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+       SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+       SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+};
+#endif
+
+struct icid_id_table icid_tbl[] = {
+#ifdef CONFIG_SYS_DPAA_QBMAN
+       SET_QMAN_ICID(FSL_DPAA1_STREAM_ID_START),
+       SET_BMAN_ICID(FSL_DPAA1_STREAM_ID_START + 1),
+#endif
+
+       SET_SDHC_ICID(FSL_SDHC_STREAM_ID),
+
+       SET_USB_ICID(1, "snps,dwc3", FSL_USB1_STREAM_ID),
+       SET_USB_ICID(2, "snps,dwc3", FSL_USB2_STREAM_ID),
+       SET_USB_ICID(3, "snps,dwc3", FSL_USB3_STREAM_ID),
+
+       SET_SATA_ICID("fsl,ls1043a-ahci", FSL_SATA_STREAM_ID),
+       SET_QDMA_ICID("fsl,ls1043a-qdma", FSL_QDMA_STREAM_ID),
+       SET_EDMA_ICID(FSL_EDMA_STREAM_ID),
+       SET_ETR_ICID(FSL_ETR_STREAM_ID),
+       SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID),
+       SET_QE_ICID(FSL_QE_STREAM_ID),
+#ifdef CONFIG_FSL_CAAM
+       SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2),
+       SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3),
+       SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4),
+       SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5),
+       SET_SEC_JR_ICID_ENTRY(3, FSL_DPAA1_STREAM_ID_START + 6),
+       SET_SEC_RTIC_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 7),
+       SET_SEC_RTIC_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 8),
+       SET_SEC_RTIC_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 9),
+       SET_SEC_RTIC_ICID_ENTRY(3, FSL_DPAA1_STREAM_ID_START + 10),
+       SET_SEC_DECO_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 11),
+       SET_SEC_DECO_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 12),
+#endif
+};
+
+int icid_tbl_sz = ARRAY_SIZE(icid_tbl);
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+struct fman_icid_id_table fman_icid_tbl[] = {
+       /* port id, icid */
+       SET_FMAN_ICID_ENTRY(0x02, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x03, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x04, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x05, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x06, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x07, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x08, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x09, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x0a, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x0b, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x0c, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x0d, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x28, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x29, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x2a, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x2b, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x2c, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x2d, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x10, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x11, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x30, FSL_DPAA1_STREAM_ID_END),
+       SET_FMAN_ICID_ENTRY(0x31, FSL_DPAA1_STREAM_ID_END),
+};
+
+int fman_icid_tbl_sz = ARRAY_SIZE(fman_icid_tbl);
+#endif
index 3f15cb08ffbd401012048df52a064a060f2dc145..54fb0745f903ad93b0cca8dfc5d3a5ddbef0fb5c 100644 (file)
@@ -634,7 +634,7 @@ void fsl_lsch2_early_init_f(void)
        erratum_a008997();
        erratum_a009007();
 
-#ifdef CONFIG_ARCH_LS1046A
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
        set_icids();
 #endif
 }
index a70c866651a0fcc02062c820acd34e71591468f9..a3f473fe28b5c99b87ac0aa41581e94311142eac 100644 (file)
@@ -68,6 +68,10 @@ void fdt_fixup_icid(void *blob);
 #define SET_DEBUG_ICID(streamid) \
        SET_SCFG_ICID(NULL, streamid, debug_icid, 0)
 
+#define SET_QE_ICID(streamid) \
+       SET_SCFG_ICID("fsl,qe", streamid, qe_icid,\
+               QE_BASE_ADDR)
+
 #define SET_QMAN_ICID(streamid) \
        SET_ICID_ENTRY("fsl,qman", streamid, streamid, \
                offsetof(struct ccsr_qman, liodnr) + \
index 4fba57242bc2284844955449a12d7f2faf2b4765..44cc509b53fbda7f3eab026784d0d12f874206c7 100644 (file)
@@ -14,6 +14,7 @@
 #include <asm/arch/fdt.h>
 #include <asm/arch/mmu.h>
 #include <asm/arch/soc.h>
+#include <asm/arch-fsl-layerscape/fsl_icid.h>
 #include <ahci.h>
 #include <hwconfig.h>
 #include <mmc.h>
@@ -353,6 +354,8 @@ int ft_board_setup(void *blob, bd_t *bd)
        fdt_fixup_board_enet(blob);
 #endif
 
+       fdt_fixup_icid(blob);
+
        reg = QIXIS_READ(brdcfg[0]);
        reg = (reg & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT;
 
index e7d8650d27656a7451c09516ef54dda41e0fed7d..f31f0ec515dc7a19c2ed477a1eb329f160cfb3fc 100644 (file)
@@ -9,6 +9,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
 #include <asm/arch/soc.h>
+#include <asm/arch-fsl-layerscape/fsl_icid.h>
 #include <fdt_support.h>
 #include <hwconfig.h>
 #include <ahci.h>
@@ -177,6 +178,8 @@ int ft_board_setup(void *blob, bd_t *bd)
        fdt_fixup_fman_ethernet(blob);
 #endif
 
+       fdt_fixup_icid(blob);
+
        /*
         * qe-hdlc and usb multi-use the pins,
         * when set hwconfig to qe-hdlc, delete usb node.