arm: dts: imx7: colibri: split dt for raw NAND and eMMC devices
authorStefan Agner <stefan.agner@toradex.com>
Tue, 8 Jan 2019 11:42:29 +0000 (12:42 +0100)
committerStefano Babic <sbabic@denx.de>
Mon, 28 Jan 2019 12:02:08 +0000 (13:02 +0100)
In preparation of adding CONFIG_DM_MMC support use separate device
trees for raw NAND and eMMC devices.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
arch/arm/dts/Makefile
arch/arm/dts/imx7-colibri-emmc.dts [new file with mode: 0644]
arch/arm/dts/imx7-colibri-rawnand.dts [new file with mode: 0644]
arch/arm/dts/imx7-colibri.dts [deleted file]
arch/arm/dts/imx7-colibri.dtsi [new file with mode: 0644]
board/toradex/colibri_imx7/MAINTAINERS
configs/colibri_imx7_defconfig

index 0e0bad9471ada6616a3f0ce4b1f6f16738369a56..46f1d693dc20d2cdcf49bf9e032d2a16205aa48c 100644 (file)
@@ -464,8 +464,7 @@ dtb-$(CONFIG_MX6UL) += \
 
 dtb-$(CONFIG_MX6ULL) += imx6ull-14x14-evk.dtb
 
-dtb-$(CONFIG_MX7) += imx7-colibri.dtb \
-       imx7d-sdb.dtb \
+dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \
        imx7d-sdb-qspi.dtb
 
 dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
diff --git a/arch/arm/dts/imx7-colibri-emmc.dts b/arch/arm/dts/imx7-colibri-emmc.dts
new file mode 100644 (file)
index 0000000..295ca05
--- /dev/null
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2019 Toradex AG
+ */
+
+/dts-v1/;
+#include "imx7-colibri.dtsi"
+
+/ {
+       model = "Toradex Colibri iMX7D 1GB (eMMC)";
+       compatible = "toradex,imx7d-colibri-emmc", "fsl,imx7d";
+
+       chosen {
+               stdout-path = &uart1;
+       };
+};
diff --git a/arch/arm/dts/imx7-colibri-rawnand.dts b/arch/arm/dts/imx7-colibri-rawnand.dts
new file mode 100644 (file)
index 0000000..4eb86fb
--- /dev/null
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2019 Toradex AG
+ */
+
+/dts-v1/;
+#include "imx7-colibri.dtsi"
+
+/ {
+       model = "Toradex Colibri iMX7S/D";
+       compatible = "toradex,imx7-colibri", "fsl,imx7";
+
+       chosen {
+               stdout-path = &uart1;
+       };
+};
+
+&gpmi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpmi_nand>;
+       fsl,use-minimum-ecc;
+       nand-on-flash-bbt;
+       nand-ecc-mode = "hw";
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_gpmi_nand: gpmi-nand-grp {
+               fsl,pins = <
+                       MX7D_PAD_SD3_CLK__NAND_CLE              0x71
+                       MX7D_PAD_SD3_CMD__NAND_ALE              0x71
+                       MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B       0x71
+                       MX7D_PAD_SAI1_TX_DATA__NAND_READY_B     0x74
+                       MX7D_PAD_SD3_STROBE__NAND_RE_B          0x71
+                       MX7D_PAD_SD3_RESET_B__NAND_WE_B         0x71
+                       MX7D_PAD_SD3_DATA0__NAND_DATA00         0x71
+                       MX7D_PAD_SD3_DATA1__NAND_DATA01         0x71
+                       MX7D_PAD_SD3_DATA2__NAND_DATA02         0x71
+                       MX7D_PAD_SD3_DATA3__NAND_DATA03         0x71
+                       MX7D_PAD_SD3_DATA4__NAND_DATA04         0x71
+                       MX7D_PAD_SD3_DATA5__NAND_DATA05         0x71
+                       MX7D_PAD_SD3_DATA6__NAND_DATA06         0x71
+                       MX7D_PAD_SD3_DATA7__NAND_DATA07         0x71
+               >;
+       };
+};
diff --git a/arch/arm/dts/imx7-colibri.dts b/arch/arm/dts/imx7-colibri.dts
deleted file mode 100644 (file)
index dca501b..0000000
+++ /dev/null
@@ -1,124 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * Copyright 2016 Toradex AG
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include "imx7d.dtsi"
-
-/ {
-       model = "Toradex Colibri iMX7S/D";
-       compatible = "toradex,imx7-colibri", "fsl,imx7";
-
-       chosen {
-               stdout-path = &uart1;
-       };
-};
-
-&gpmi {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_gpmi_nand>;
-       fsl,use-minimum-ecc;
-       nand-on-flash-bbt;
-       nand-ecc-mode = "hw";
-       status = "okay";
-};
-
-&i2c1 {
-       pinctrl-names = "default", "gpio";
-       pinctrl-0 = <&pinctrl_i2c1>;
-       pinctrl-1 = <&pinctrl_i2c1_gpio>;
-       sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
-       scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
-       status = "okay";
-
-       rn5t567@33 {
-               compatible = "ricoh,rn5t567";
-               reg = <0x33>;
-       };
-};
-
-&i2c4 {
-       pinctrl-names = "default", "gpio";
-       pinctrl-0 = <&pinctrl_i2c4>;
-       pinctrl-1 = <&pinctrl_i2c4_gpio>;
-       sda-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
-       scl-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
-       status = "okay";
-};
-
-&uart1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
-       uart-has-rtscts;
-       fsl,dte-mode;
-       status = "okay";
-};
-
-&iomuxc {
-       pinctrl_gpmi_nand: gpmi-nand-grp {
-               fsl,pins = <
-                       MX7D_PAD_SD3_CLK__NAND_CLE              0x71
-                       MX7D_PAD_SD3_CMD__NAND_ALE              0x71
-                       MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B       0x71
-                       MX7D_PAD_SAI1_TX_DATA__NAND_READY_B     0x74
-                       MX7D_PAD_SD3_STROBE__NAND_RE_B          0x71
-                       MX7D_PAD_SD3_RESET_B__NAND_WE_B         0x71
-                       MX7D_PAD_SD3_DATA0__NAND_DATA00         0x71
-                       MX7D_PAD_SD3_DATA1__NAND_DATA01         0x71
-                       MX7D_PAD_SD3_DATA2__NAND_DATA02         0x71
-                       MX7D_PAD_SD3_DATA3__NAND_DATA03         0x71
-                       MX7D_PAD_SD3_DATA4__NAND_DATA04         0x71
-                       MX7D_PAD_SD3_DATA5__NAND_DATA05         0x71
-                       MX7D_PAD_SD3_DATA6__NAND_DATA06         0x71
-                       MX7D_PAD_SD3_DATA7__NAND_DATA07         0x71
-               >;
-       };
-
-       pinctrl_i2c4: i2c4-grp {
-               fsl,pins = <
-                       MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA      0x4000007f
-                       MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL      0x4000007f
-               >;
-       };
-
-       pinctrl_i2c4_gpio: i2c4-gpio-grp {
-                       fsl,pins = <
-                       MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9     0x4000007f
-                       MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8     0x4000007f
-               >;
-       };
-
-       pinctrl_uart1: uart1-grp {
-               fsl,pins = <
-                       MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX    0x79
-                       MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX    0x79
-                       MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS    0x79
-                       MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS    0x79
-               >;
-       };
-
-       pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
-               fsl,pins = <
-                       MX7D_PAD_SD2_DATA1__GPIO5_IO15          0x14 /* DCD */
-                       MX7D_PAD_SD2_DATA0__GPIO5_IO14          0x14 /* DTR */
-               >;
-       };
-};
-
-&iomuxc_lpsr {
-       pinctrl_i2c1: i2c1-grp {
-               fsl,pins = <
-                       MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA      0x4000007f
-                       MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL      0x4000007f
-               >;
-       };
-
-       pinctrl_i2c1_gpio: i2c1-gpio-grp {
-               fsl,pins = <
-                       MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5     0x4000007f
-                       MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4     0x4000007f
-               >;
-       };
-};
diff --git a/arch/arm/dts/imx7-colibri.dtsi b/arch/arm/dts/imx7-colibri.dtsi
new file mode 100644 (file)
index 0000000..4729511
--- /dev/null
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2016-2019 Toradex AG
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include "imx7d.dtsi"
+
+&i2c1 {
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+       scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+       status = "okay";
+
+       rn5t567@33 {
+               compatible = "ricoh,rn5t567";
+               reg = <0x33>;
+       };
+};
+
+&i2c4 {
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       sda-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
+       scl-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
+       uart-has-rtscts;
+       fsl,dte-mode;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_i2c4: i2c4-grp {
+               fsl,pins = <
+                       MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA      0x4000007f
+                       MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL      0x4000007f
+               >;
+       };
+
+       pinctrl_i2c4_gpio: i2c4-gpio-grp {
+                       fsl,pins = <
+                       MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9     0x4000007f
+                       MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8     0x4000007f
+               >;
+       };
+
+       pinctrl_uart1: uart1-grp {
+               fsl,pins = <
+                       MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX    0x79
+                       MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX    0x79
+                       MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS    0x79
+                       MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS    0x79
+               >;
+       };
+
+       pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
+               fsl,pins = <
+                       MX7D_PAD_SD2_DATA1__GPIO5_IO15          0x14 /* DCD */
+                       MX7D_PAD_SD2_DATA0__GPIO5_IO14          0x14 /* DTR */
+               >;
+       };
+};
+
+&iomuxc_lpsr {
+       pinctrl_i2c1: i2c1-grp {
+               fsl,pins = <
+                       MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA      0x4000007f
+                       MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL      0x4000007f
+               >;
+       };
+
+       pinctrl_i2c1_gpio: i2c1-gpio-grp {
+               fsl,pins = <
+                       MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5     0x4000007f
+                       MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4     0x4000007f
+               >;
+       };
+};
index 9c1d42aa8cb2e5f9afe100e4a5046b29c3f818c5..f55f8045f455cb1a0a2ad760eb4905038a938b2e 100644 (file)
@@ -8,3 +8,6 @@ F:      board/toradex/colibri_imx7/
 F:     include/configs/colibri_imx7.h
 F:     configs/colibri_imx7_defconfig
 F:     configs/colibri_imx7_emmc_defconfig
+F:     arch/arm/dts/imx7-colibri.dtsi
+F:     arch/arm/dts/imx7-colibri-emmc.dts
+F:     arch/arm/dts/imx7-colibri-rawnand.dts
index 5a496236db0167ddd1b411b5a014290d412ad0de..2e4350c1a656a6b781de9825921c679cfdf7237d 100644 (file)
@@ -44,7 +44,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:512k(mx7-bcb),1536k(u-boot1)ro,1536k
 CONFIG_CMD_UBI=y
 CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
-CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri"
+CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-rawnand"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DFU_MMC=y