arm: drop eSDHC clock getting in mxc_get_clock() for layerscape
authorYangbo Lu <yangbo.lu@nxp.com>
Tue, 12 Nov 2019 11:28:38 +0000 (19:28 +0800)
committerPeng Fan <peng.fan@nxp.com>
Wed, 27 Nov 2019 08:55:56 +0000 (16:55 +0800)
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms,
eSDHC clock getting do not have to use it. It uses global data
gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more
than one eSDHC controllers on SoC, they use same reference clock.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
arch/arm/cpu/armv7/ls102xa/clock.c
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
arch/arm/include/asm/arch-fsl-layerscape/clock.h
arch/arm/include/asm/arch-ls102xa/clock.h

index 30c7b37f1a9decfedb6b75aabf4f061ee3665923..7a1053cebb4a52255bbf408f9eebb74fbcdf42b3 100644 (file)
@@ -109,8 +109,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
        switch (clk) {
        case MXC_I2C_CLK:
                return get_bus_freq(0) / 2;
-       case MXC_ESDHC_CLK:
-               return get_bus_freq(0);
        case MXC_DSPI_CLK:
                return get_bus_freq(0) / 2;
        case MXC_UART_CLK:
index df4df9aca798ce25edba8e0f6db9a9eb43db5d21..6d82cfeb58ec781630e03c82fca3ff23d0a5f0f0 100644 (file)
@@ -227,16 +227,6 @@ ulong get_ddr_freq(ulong dummy)
        return gd->mem_clk;
 }
 
-#ifdef CONFIG_FSL_ESDHC
-int get_sdhc_freq(ulong dummy)
-{
-       if (!gd->arch.sdhc_clk)
-               get_clocks();
-
-       return gd->arch.sdhc_clk;
-}
-#endif
-
 int get_serial_clock(void)
 {
        return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV;
@@ -264,11 +254,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
        switch (clk) {
        case MXC_I2C_CLK:
                return get_i2c_freq(0);
-#if defined(CONFIG_FSL_ESDHC)
-       case MXC_ESDHC_CLK:
-       case MXC_ESDHC2_CLK:
-               return get_sdhc_freq(0);
-#endif
        case MXC_DSPI_CLK:
                return get_dspi_freq(0);
 #ifdef CONFIG_FSL_LPUART
index bbd550b03656341fb3f9465ed4a370a063bdfc7f..ede96742aad160d7cba23302368926f707594995 100644 (file)
@@ -236,16 +236,6 @@ int get_dspi_freq(ulong dummy)
        return get_bus_freq(0) / CONFIG_SYS_FSL_DSPI_CLK_DIV;
 }
 
-#ifdef CONFIG_FSL_ESDHC
-int get_sdhc_freq(ulong dummy)
-{
-       if (!gd->arch.sdhc_clk)
-               get_clocks();
-
-       return gd->arch.sdhc_clk;
-}
-#endif
-
 int get_serial_clock(void)
 {
        return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV;
@@ -256,11 +246,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
        switch (clk) {
        case MXC_I2C_CLK:
                return get_i2c_freq(0);
-#if defined(CONFIG_FSL_ESDHC)
-       case MXC_ESDHC_CLK:
-       case MXC_ESDHC2_CLK:
-               return get_sdhc_freq(0);
-#endif
        case MXC_DSPI_CLK:
                return get_dspi_freq(0);
        default:
index b37a08d265382dbbde18783e5afa2d41d7f72111..95d6156476f4494affea3897b665ab6c77a83700 100644 (file)
@@ -14,8 +14,6 @@ enum mxc_clock {
        MXC_ARM_CLK = 0,
        MXC_BUS_CLK,
        MXC_UART_CLK,
-       MXC_ESDHC_CLK,
-       MXC_ESDHC2_CLK,
        MXC_I2C_CLK,
        MXC_DSPI_CLK,
 };
index bf67df561a0da31a79a6c9f842a58170cf06c7af..e66e57f7598cec1df4f1d23882595c60bbb2ac8e 100644 (file)
@@ -12,7 +12,6 @@
 enum mxc_clock {
        MXC_ARM_CLK = 0,
        MXC_UART_CLK,
-       MXC_ESDHC_CLK,
        MXC_I2C_CLK,
        MXC_DSPI_CLK,
 };