freescale/powerpc: Rename the config CONFIG_SECURE_BOOT name

Rename the CONFIG_SECURE_BOOT name to CONFIG_NXP_ESBC to avoid
conflicts with UEFI secure boot.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index c038a6ddb0f4143520e0e23efe1ffff2619a10c9..8cc82f80b4652f0301435fb96a2df927b623cbb5 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -1208,8 +1208,8 @@ config FSL_LAW
        help
                Use Freescale common code for Local Access Window
 
-config SECURE_BOOT
-       bool    "Secure Boot"
+config NXP_ESBC
+       bool    "NXP_ESBC"
        help
                Enable Freescale Secure Boot feature. Normally selected
                by defconfig. If unsure, do not change.

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index cac928079042beaabf15ed903af215c4a209cd61..c2b2ef20414eeb877598d050b86d50d8c8b33822 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -38,7 +38,7 @@
 #ifdef CONFIG_FSL_CAAM
 #include <fsl_sec.h>
 #endif
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET)
+#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_CORENET)
 #include <asm/fsl_pamu.h>
 #include <fsl_secboot_err.h>
 #endif
@@ -440,7 +440,7 @@ ulong cpu_init_f(void)
 #ifdef CONFIG_SYS_DCSRBAR_PHYS
        ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 #endif
-#if defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SYS_RAMBOOT)
+#if defined(CONFIG_NXP_ESBC) && !defined(CONFIG_SYS_RAMBOOT)
        struct law_entry law;
 #endif
 #ifdef CONFIG_ARCH_MPC8548
@@ -460,7 +460,7 @@ ulong cpu_init_f(void)
        disable_tlb(14);
        disable_tlb(15);
 
-#if defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SYS_RAMBOOT)
+#if defined(CONFIG_NXP_ESBC) && !defined(CONFIG_SYS_RAMBOOT)
        /* Disable the LAW created for NOR flash by the PBI commands */
        law = find_law(CONFIG_SYS_PBI_FLASH_BASE);
        if (law.index != -1)
@@ -963,7 +963,7 @@ int cpu_init_r(void)
        fman_enet_init();
 #endif
 
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET)
+#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_CORENET)
        if (pamu_init() < 0)
                fsl_secboot_handle_error(ERROR_ESBC_PAMU_INIT);
 #endif

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index dbc705388c9610195f89776620e4aa29fa644e44..38e907f5ad51830c8fbfb5b8e1e9d695eca32101 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -33,7 +33,7 @@
 #endif
 
 #if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) && \
-       !defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
+       !defined(CONFIG_NXP_ESBC) && !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 #define NOR_BOOT
 #endif
 
@@ -123,7 +123,7 @@ _start_e500:
 #endif
 
 
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC) && \
+#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_E500MC) && \
        !defined(CONFIG_E6500)
        /* ISBC uses L2 as stack.
         * Disable L2 cache here so that u-boot can enable it later
@@ -467,7 +467,7 @@ nexti:      mflr    r1              /* R1 = our PC */
        blt     1b
 
 #if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(MINIMAL_SPL) && \
-       !defined(CONFIG_SECURE_BOOT)
+       !defined(CONFIG_NXP_ESBC)
 /*
  * TLB entry for debuggging in AS1
  * Create temporary TLB entry in AS0 to handle debug exception
@@ -1065,7 +1065,7 @@ create_init_ram_area:
                0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR, \
                0, r6
 
-#elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT)
+#elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NXP_ESBC)
        /* create a temp mapping in AS = 1 for Flash mapping
         * created by PBL for ISBC code
         */
@@ -1080,7 +1080,7 @@ create_init_ram_area:
  * and for targets with CONFIG_SPL like T1, T2, T4, only for
  * u-boot-spl i.e. CONFIG_SPL_BUILD
  */
-#elif defined(CONFIG_RAMBOOT_PBL) && defined(CONFIG_SECURE_BOOT) && \
+#elif defined(CONFIG_RAMBOOT_PBL) && defined(CONFIG_NXP_ESBC) && \
        (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
        /* create a temp mapping in AS = 1 for mapping CONFIG_SYS_MONITOR_BASE
         * to L3 Address configured by PBL for ISBC code

diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c
index 30f35e25e3e21967957cdae746ac8eb85489c8e4..ca9e6aa8eb102cafeb7c44c4bd40c25c6d445e85 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/law.c
+++ b/arch/powerpc/cpu/mpc8xxx/law.c
@@ -259,7 +259,7 @@ void init_laws(void)
 #error FSL_HW_NUM_LAWS can not be greater than 32 w/o code changes
 #endif
 
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500) && \
+#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_E500) && \
                                                !defined(CONFIG_E500MC)
        /* ISBC (Boot ROM) creates a LAW 0 entry for non PBL platforms,
         * which is not disabled before transferring the control to uboot.
@@ -268,7 +268,7 @@ void init_laws(void)
        disable_law(0);
 #endif
 
-#if !defined(CONFIG_SECURE_BOOT)
+#if !defined(CONFIG_NXP_ESBC)
        /*
         * if any non DDR LAWs has been created earlier, remove them before
         * LAW table is parsed.

diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h
index 64c10074a896d2dd2001ee10826d17d25915c0bd..035bf1246766ba7c65281b4780a77041ef3c262d 100644 (file)
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -7,7 +7,7 @@
 #define __FSL_SECURE_BOOT_H
 #include <asm/config_mpc85xx.h>
 
-#ifdef CONFIG_SECURE_BOOT
+#ifdef CONFIG_NXP_ESBC
 #if defined(CONFIG_FSL_CORENET)
 #define CONFIG_SYS_PBI_FLASH_BASE              0xc0000000
 #elif defined(CONFIG_TARGET_BSC9132QDS)
@@ -74,7 +74,7 @@
  */
 #define CONFIG_FSL_ISBC_KEY_EXT
 #endif
-#endif /* #ifdef CONFIG_SECURE_BOOT */
+#endif /* #ifdef CONFIG_NXP_ESBC */
 
 #ifdef CONFIG_CHAIN_OF_TRUST
 #ifdef CONFIG_SPL_BUILD

diff --git a/board/freescale/common/p_corenet/tlb.c b/board/freescale/common/p_corenet/tlb.c
index 3d9459b133a869138850a923ed110bbfa5e7c33b..c0ab1a5fd14e337ba4ef0998a4fb683ee78068dd 100644 (file)
--- a/board/freescale/common/p_corenet/tlb.c
+++ b/board/freescale/common/p_corenet/tlb.c
@@ -43,7 +43,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
        /* *I*** - Covers boot page */
 #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR)
 
-#if !defined(CONFIG_SECURE_BOOT)
+#if !defined(CONFIG_NXP_ESBC)
        /*
         * *I*G - L3SRAM. When L3 is used as 1M SRAM, the address of the
         * SRAM is at 0xfff00000, it covered the 0xfffff000.

diff --git a/board/freescale/t104xrdb/tlb.c b/board/freescale/t104xrdb/tlb.c
index 6511c04f31a19617642fa0101888922bc100d87d..9dcba7933ff99c0bbf8b336b111129e765b67306 100644 (file)
--- a/board/freescale/t104xrdb/tlb.c
+++ b/board/freescale/t104xrdb/tlb.c
@@ -28,7 +28,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
        /* TLB 1 */
        /* *I*** - Covers boot page */
 #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR) && \
-       !defined(CONFIG_SECURE_BOOT)
+       !defined(CONFIG_NXP_ESBC)
        /*
         * *I*G - L3SRAM. When L3 is used as 256K SRAM, the address of the
         * SRAM is at 0xfffc0000, it covered the 0xfffff000.
@@ -37,7 +37,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 0, BOOKE_PAGESZ_256K, 1),
 
-#elif defined(CONFIG_SECURE_BOOT) && defined(CONFIG_SPL_BUILD)
+#elif defined(CONFIG_NXP_ESBC) && defined(CONFIG_SPL_BUILD)
        /*
         * *I*G - L3SRAM. When L3 is used as 256K SRAM, in case of Secure Boot
         * the physical address of the SRAM is at 0xbffc0000,

diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig
index 3eb310716c3d59d80778f4961fab1bbbf82b21d0..80735e92b3a6e580d6a9b4d029fc5517f5e25b84 100644 (file)
--- a/configs/B4860QDS_SECURE_BOOT_defconfig
+++ b/configs/B4860QDS_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_B4860QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
index af1bc88b3ac897fffb364dcc1bce69bb4cc856df..adcc983c13afbf0038433fb633fa00a35cb24826 100644 (file)
--- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
index abc0886de38d056e8b7106b894cd185707145a31..5f4c1c2483e478ec6ba291eab5099fa8f6142e8e 100644 (file)
--- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
index 81c3b3b73e5d3a64bbd11b7f46e02a261110748d..cade39d7e2b425cbd8caf9492c74f69b061f60ce 100644 (file)
--- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x8FF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
index dca12608aad21609d4a42f4be687187238787c40..1ea17b58c32274441260020832e169870e89cac6 100644 (file)
--- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x8FF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
index 1e5c7627dcfa82777298fa88d35b6a7f7befcdf2..f264ca8f060272de7dc066fe5f8723d67a583b53 100644 (file)
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
index 1203bdb46d5db4070079bc15e0ad4634cd3ab0e4..1ab09ec9c6fc3eb0b02043c923280828226d187f 100644 (file)
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
index a0e9cd8d1f35119ea413d7610697d31a7e1e348e..edc640e5ca537ac5b8f93b8aecf8e2eb83ee5bee 100644 (file)
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
index f086438cd2fef721d34714750b11ac16b12b575d..8411bddcb96d88616be033be7f30cbd4da3dad40 100644 (file)
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig
index a256315c681dc7c3ac5f4d59fed0b83498694d75..50ba06f6a6d414301ec04068f115fcf9118c5acb 100644 (file)
--- a/configs/C29XPCIE_NOR_SECBOOT_defconfig
+++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_C29XPCIE=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
index 8629f8aa4210c72f60d737494dc535d5857ec489..f887ec05e7175f97370060ba3352410781797f0a 100644 (file)
--- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
+++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_C29XPCIE=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
index 51b648806d634c357d973def8ca8c1bca285bdec..17fa25f37a4f50ef6d578a65bdeed4af04b602ad 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
index b14e7deaf69d68dd30fdc217d98f754d3871c0dd..99e8b40580349d8acfdea71ceac410eaea097ea7 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
index b24f704aad244d7d3601c681e2af1e45ed5e493f..10f17ed6c6dead5dcdce3b65b495a40515138126 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
index 036f8e8a446b681e3600678cc226acc658e497c7..96eb27cdb57b5382a6afb738f55898c9baf1cd6f 100644 (file)
--- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
index 349fc95ee1c775a434ba98bd423f114568c3ca88..7b58ee80d2da61871585175c1bbe74811092ad5c 100644 (file)
--- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
index 0fa105ce70c6ade7659588c61623dbdef56f82cd..37f066a1e95b57adc441f3a974a9e557e08b21e1 100644 (file)
--- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
index dcc7d11d514ec009fd25cc986e59b2273b9a4c54..f304be67a919f5b170d998408cccbdc826b2db4b 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
index 6ed4467323628b714d4d3cc5d64b4afa9dde8d2e..4c7f46460969cce1664575123f46089a9511f792 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
index 6f43d694eaccdae6b0baf07102ed4958772a3d3a..aef1f3fb3b72879988edac15ea7cfa674179fc7e 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
index 8e76629ad598ddeb5091e8a53fbff794c8a22e12..844e4a088dfe767993ac47bddb7e4206d91506c8 100644 (file)
--- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
index cc2a04f710b1c260c6712b1b9b21c0957625841c..bcfb589095a51713168588534578ea4dd51666cb 100644 (file)
--- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
index 78aef8395a0b050de7198c8f25a70841fb4a781c..af9bee18cb4f7cde81bb80534d7bb054690f6653 100644 (file)
--- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig
index 91514e1641bc647d35b3c8a65f3817f418e7cda6..cf254d5a101722093d4cd09d4912215bd096032b 100644 (file)
--- a/configs/P2041RDB_SECURE_BOOT_defconfig
+++ b/configs/P2041RDB_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P2041RDB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig
index d83206342e5655ec9d6463485a80e7ef3f3c51b2..dc3c69b2dedfe5224a2d066ef82cbd93f3a0e2e0 100644 (file)
--- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig
index 483e39324681142f04703c59e2d1c46417fb2155..2250e49a254871ae45e4af64ecd64683e26a8297 100644 (file)
--- a/configs/P3041DS_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig
index e6b1207d0e226542c99ed7b46b010ad6c9e1fc91..9f4cb9d89007109c37c031a6f79bd832df6bfe08 100644 (file)
--- a/configs/P4080DS_SECURE_BOOT_defconfig
+++ b/configs/P4080DS_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P4080DS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig
index 85f04ac323d17c1cae576fd4966dd47f75755aed..ad3bd81d1d13c972383af4fc63aff1658bdb8d8b 100644 (file)
--- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5020DS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig
index 85fa7bdfbfa974261affff7d88fcfd75edb9c723..01131a5c5b1eb458ae357f07d4d7e67f0591603d 100644 (file)
--- a/configs/P5020DS_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5020DS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig
index c085e68efbe980eb1ad9d529e013d327676c7c87..9a92c0000ed400bb79a69dd83fe67cf0302a30eb 100644 (file)
--- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig
index 22b4d4ebda0bd4f33a0698c6bf95fa262b071ada..817b6dcd178a0a3c63a2dd756218e71631185350 100644 (file)
--- a/configs/P5040DS_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig
index 886aba79df3050f2d83985489375c0b7f5f17d55..1deffd8aeeb96a2c085e298fea8fe14cc6f8fda4 100644 (file)
--- a/configs/T1023RDB_SECURE_BOOT_defconfig
+++ b/configs/T1023RDB_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1023RDB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
index 423d64265ceb265ae8715db87cf8c13435898546..15c3bf91673cd5330fc0f666d18564449f1ad813 100644 (file)
--- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig
index 9d6bc986117d987874db0006f2ac74c909ddfd48..c60ab389c1c522cdf722c2084564a3e2f042987b 100644 (file)
--- a/configs/T1024QDS_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig
index cb751dfc71aa699867283f31a5e57ed36a4defd8..a67d50d587fa83ef9d43f12d21c12cc09a650979 100644 (file)
--- a/configs/T1024RDB_SECURE_BOOT_defconfig
+++ b/configs/T1024RDB_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig
index 7391eff2a389fb105366806eabd4ddbfc812bb68..e59f8d736ed79f7f4848bbf8f07c36a14eaf2c71 100644 (file)
--- a/configs/T1040D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1040D4RDB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig
index 9cd30e57049e78a5b78ba21a59f2b7bb2aa709a9..e411274a9d4ce9f6e62dbe9936fd1adac45602e1 100644 (file)
--- a/configs/T1040QDS_SECURE_BOOT_defconfig
+++ b/configs/T1040QDS_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1040QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig
index 5f482c3f6019f7baf99b10288c04fda3124ceef5..376d52d2cbbad4b61db9c0017c3bbe385bf01908 100644 (file)
--- a/configs/T1040RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040RDB_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1040RDB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig
index d52521c96c8898a3ca88f4d38cd12b3bec31a624..55541be9758ae86b1957b1aec1e1ea0bcef34c7b 100644 (file)
--- a/configs/T1042D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
index 721641270b559fe5a4a53dc381b667e5ddd2d6f0..e11757d3f0acc8bd6513409ca55f2b7251cc56b0 100644 (file)
--- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
@@ -2,7 +2,7 @@ CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x30001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y

diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig
index a255e085b9ff60fcab7de70f18844b87d36b2174..fc9144a03df9567cdc239f19216b3b4f83995cfd 100644 (file)
--- a/configs/T1042RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042RDB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index dea847925314eb05966bda6bc50db1906717a5ea..12b9e403a5291e466b35635a9f03404a45440a85 100644 (file)
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y

diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig
index 120bfccadec6bf63fa937ef95b35b56278de3192..90dd565397be68b4366117e73e65556a0699a77c 100644 (file)
--- a/configs/T2080RDB_SECURE_BOOT_defconfig
+++ b/configs/T2080RDB_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig
index fafcdd52ccebf4883103b95897768df1d7edf08f..81bb19768165113b3376cc0bd7266beaf53ebee1 100644 (file)
--- a/configs/T4160QDS_SECURE_BOOT_defconfig
+++ b/configs/T4160QDS_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T4160QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig
index 55a7f19dd55f733b9b2c3d9bf2ab758681eaf510..2c6a7ff16fa5d25a34e2739228aaa991e6e8b8a0 100644 (file)
--- a/configs/T4240QDS_SECURE_BOOT_defconfig
+++ b/configs/T4240QDS_SECURE_BOOT_defconfig
@@ -1,6 +1,6 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_SECURE_BOOT=y
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240QDS=y
 # CONFIG_SYS_MALLOC_F is not set

diff --git a/doc/README.mpc85xx b/doc/README.mpc85xx
index 93ed641df30eade78d8cf8f84f58528bbeed6079..8464e7f4d8a654079905c2453af70ca6f7df19b5 100644 (file)
--- a/doc/README.mpc85xx
+++ b/doc/README.mpc85xx
@@ -28,11 +28,11 @@ Major Config Switches during various boot Modes
 NOR boot
                !defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SPL)
 NOR boot Secure
-               !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT)
+               !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NXP_ESBC)
 RAMBOOT(SD, SPI & NAND boot)
                 defined(CONFIG_SYS_RAMBOOT)
 RAMBOOT Secure (SD, SPI & NAND)
-                defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT)
+                defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NXP_ESBC)
 NAND SPL BOOT
                 defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NAND_SPL)
 
@@ -93,7 +93,7 @@ B) !defined(CONFIG_SYS_RAMBOOT) i.e. NOR boot
    1) TLB entry to overcome e500 v1/v2 debug restriction
        Location          : Label "_start_e500"
        TLB Entry  : CONFIG_SYS_PPC_E500_DEBUG_TLB
-#if defined(CONFIG_SECURE_BOOT)
+#if defined(CONFIG_NXP_ESBC)
        EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW
        Properties : 1M, AS1, I, G, IPROT
 #else
@@ -104,7 +104,7 @@ B) !defined(CONFIG_SYS_RAMBOOT) i.e. NOR boot
    2) TLB entry for working in AS1
        Location          : Label "create_init_ram_area"
        TLB Entry  : 15
-#if defined(CONFIG_SECURE_BOOT)
+#if defined(CONFIG_NXP_ESBC)
        EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW
        Properties : 1M, AS1, I, G, IPROT
 #else

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 1152bca03be6491b3e4deb94cedfaef9bb14d16e..344e19d2c55c375c7666a23096a3f09baa2cd5d5 100644 (file)
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -29,7 +29,7 @@
 #endif
 
 #ifdef CONFIG_SPIFLASH
-#ifdef CONFIG_SECURE_BOOT
+#ifdef CONFIG_NXP_ESBC
 #define CONFIG_RAMBOOT_SPIFLASH
 #define CONFIG_RESET_VECTOR_ADDRESS    0x110bfffc
 #else
@@ -50,7 +50,7 @@
 #endif
 
 #ifdef CONFIG_NAND
-#ifdef CONFIG_SECURE_BOOT
+#ifdef CONFIG_NXP_ESBC
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 53ee1484d05da52c3aa80dab9bae84797a1082ac..7cc3db943e509bd763518311b1f7c3bcae6f2511 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -13,7 +13,7 @@
 
 #ifdef CONFIG_RAMBOOT_PBL
 
-#ifndef CONFIG_SECURE_BOOT
+#ifndef CONFIG_NXP_ESBC
 #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg
 #else
 #define CONFIG_SYS_FSL_PBL_PBI \
@@ -32,7 +32,7 @@
 #define BOOT_PAGE_OFFSET               0x27000
 
 #ifdef CONFIG_NAND
-#ifdef CONFIG_SECURE_BOOT
+#ifdef CONFIG_NXP_ESBC
 #define CONFIG_U_BOOT_HDR_SIZE         (16 << 10)
 /*
  * HDR would be appended at end of image and copied to DDR along
@@ -163,7 +163,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 #define CONFIG_ENV_SIZE                        0x2000
 #define CONFIG_ENV_OFFSET              (512 * 0x800)
 #elif defined(CONFIG_NAND)
-#ifdef CONFIG_SECURE_BOOT
+#ifdef CONFIG_NXP_ESBC
 #define CONFIG_RAMBOOT_NAND
 #define CONFIG_BOOTSCRIPT_COPY_RAM
 #endif

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 60e09c19399d805b5d8e946a9b3f59e65826a315..df602f696461b16fed3770dbc7ca21658926ee16 100644 (file)
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -12,7 +12,7 @@
 #include "../board/freescale/common/ics307_clk.h"
 
 #ifdef CONFIG_RAMBOOT_PBL
-#ifdef CONFIG_SECURE_BOOT
+#ifdef CONFIG_NXP_ESBC
 #define CONFIG_RAMBOOT_TEXT_BASE       CONFIG_SYS_TEXT_BASE
 #define CONFIG_RESET_VECTOR_ADDRESS    0xfffffffc
 #ifdef CONFIG_NAND