mpc8308: Migrate system io config to Kconfig
authorMario Six <mario.six@gdsys.cc>
Mon, 21 Jan 2019 08:18:11 +0000 (09:18 +0100)
committerMario Six <mario.six@gdsys.cc>
Tue, 21 May 2019 05:52:33 +0000 (07:52 +0200)
Migrate the system IO configuration setting to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
17 files changed:
arch/powerpc/cpu/mpc83xx/Kconfig
arch/powerpc/cpu/mpc83xx/cpu_init.c
arch/powerpc/cpu/mpc83xx/sysio/Kconfig [new file with mode: 0644]
arch/powerpc/cpu/mpc83xx/sysio/Kconfig.mpc8308 [new file with mode: 0644]
arch/powerpc/cpu/mpc83xx/sysio/sysio.h [new file with mode: 0644]
configs/MPC8308RDB_defconfig
configs/hrcon_defconfig
configs/hrcon_dh_defconfig
configs/mpc8308_p1m_defconfig
configs/strider_con_defconfig
configs/strider_con_dp_defconfig
configs/strider_cpu_defconfig
configs/strider_cpu_dp_defconfig
include/configs/MPC8308RDB.h
include/configs/hrcon.h
include/configs/mpc8308_p1m.h
include/configs/strider.h

index 96376837abb6f397aef84694fe528966d29658ce..9f7b3a2e0197656931b82da4e50479cb19d31900 100644 (file)
@@ -294,6 +294,7 @@ source "arch/powerpc/cpu/mpc83xx/bats/Kconfig"
 source "arch/powerpc/cpu/mpc83xx/lblaw/Kconfig"
 source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig"
 source "arch/powerpc/cpu/mpc83xx/hid/Kconfig"
+source "arch/powerpc/cpu/mpc83xx/sysio/Kconfig"
 
 menu "Legacy options"
 
index 5ce7b794b264abc77ab227490cc472dd47d72767..3df01ee1ca10fb257f774b507440385266bfd76c 100644 (file)
@@ -14,6 +14,7 @@
 
 #include "lblaw/lblaw.h"
 #include "elbc/elbc.h"
+#include "sysio/sysio.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/powerpc/cpu/mpc83xx/sysio/Kconfig b/arch/powerpc/cpu/mpc83xx/sysio/Kconfig
new file mode 100644 (file)
index 0000000..9e1f158
--- /dev/null
@@ -0,0 +1,7 @@
+menu "System I/O configuration"
+
+if ARCH_MPC8308
+source "arch/powerpc/cpu/mpc83xx/sysio/Kconfig.mpc8308"
+endif
+
+endmenu
diff --git a/arch/powerpc/cpu/mpc83xx/sysio/Kconfig.mpc8308 b/arch/powerpc/cpu/mpc83xx/sysio/Kconfig.mpc8308
new file mode 100644 (file)
index 0000000..de62171
--- /dev/null
@@ -0,0 +1,323 @@
+choice
+       prompt "SPI group"
+
+config SICR_SPI_SPI
+       bool "SPI"
+
+config SICR_SPI_MSRCID
+       bool "MSRCID"
+
+config SICR_SPI_LSRCID
+       bool "LSRCID"
+
+endchoice
+
+choice
+       prompt "UART group"
+
+config SICR_UART_SPI
+       bool "UART"
+
+config SICR_UART_MSRCID
+       bool "MSRCID"
+
+config SICR_UART_LSRCID
+       bool "LSRCID"
+
+endchoice
+
+choice
+       prompt "IRQ group"
+
+config SICR_IRQ_SPI
+       bool "IRQ"
+
+config SICR_IRQ_MCP_CKSTOP
+       bool "MCP/CKSTOP"
+
+config SICR_IRQ_INTA
+       bool "INTA"
+
+endchoice
+
+choice
+       prompt "I2C2 group"
+
+config SICR_I2C2_I2C
+       bool "IRQ"
+
+config SICR_I2C2_CKSTOP
+       bool "CKSTOP"
+
+endchoice
+
+choice
+       prompt "ETSEC1 A group"
+
+config SICR_ETSEC1_A_TSEC2
+       bool "TSEC1"
+
+config SICR_ETSEC1_A_TSEC_GTX_CLK125
+       bool "TSEC1 GTX_CLK125"
+
+endchoice
+
+choice
+       prompt "eSDHC A group"
+
+config SICR_ESDHC_A_SD
+       bool "SD"
+
+config SICR_ESDHC_A_GTM
+       bool "GTM"
+
+config SICR_ESDHC_A_GPIO
+       bool "GPIO"
+
+endchoice
+
+choice
+       prompt "eSDHC B group"
+
+config SICR_ESDHC_B_SD
+       bool "SD"
+
+config SICR_ESDHC_B_GTM
+       bool "GTM"
+
+config SICR_ESDHC_B_GPIO
+       bool "GPIO"
+
+endchoice
+
+choice
+       prompt "eSDHC C group"
+
+config SICR_ESDHC_C_SD
+       bool "SD"
+
+config SICR_ESDHC_C_GTM
+       bool "GTM"
+
+config SICR_ESDHC_C_GPIO
+       bool "GPIO"
+
+endchoice
+
+choice
+       prompt "GPIO A group"
+
+config SICR_GPIO_A_GPIO
+       bool "GPIO"
+
+config SICR_GPIO_A_TSEC2
+       bool "TSEC2"
+
+endchoice
+
+choice
+       prompt "GPIO B group"
+
+config SICR_GPIO_B_GPIO
+       bool "GPIO"
+
+config SICR_GPIO_B_TSEC2
+       bool "TSEC2"
+
+config SICR_GPIO_B_TSEC_GTX_CLK125
+       bool "TSEC2 GTX_CLK125"
+
+endchoice
+
+choice
+       prompt "IEEE1588 A group"
+
+config SICR_IEEE1588_A_TSEC
+       bool "TSEC"
+
+config SICR_IEEE1588_A_GPIO
+       bool "GPIO"
+
+endchoice
+
+choice
+       prompt "USB group"
+
+config SICR_USB_TSEC
+       bool "USB"
+
+endchoice
+
+choice
+       prompt "GTM group"
+
+config SICR_GTM_TSEC
+       bool "GTM"
+
+config SICR_GTM_GPIO
+       bool "GPIO"
+
+endchoice
+
+choice
+       prompt "IEEE1588 B group"
+
+config SICR_IEEE1588_B_GPIO
+       bool "GPIO"
+
+endchoice
+
+choice
+       prompt "ETSEC2 group"
+
+config SICR_ETSEC2_TSEC2
+       bool "TSEC2"
+
+config SICR_ETSEC2_GPIO
+       bool "GPIO"
+
+endchoice
+
+choice
+       prompt "GPIO selection"
+
+config SICR_GPIOSEL_GPIO
+       bool "GPIO_A, GPIO_B"
+
+config SICR_GPIOSEL_IEEE1588
+       bool "IEEE1588_A, IEEE1588_B, ETSEC2"
+
+endchoice
+
+choice
+       prompt "IEEE1588 timer output buffer impedance"
+
+config SICR_TMROBI_3_3_V
+       bool "40 Ohm, 3.3V"
+
+config SICR_TMROBI_2_5_V
+       bool "40 Ohm, 2.5V"
+
+endchoice
+
+choice
+       prompt "TSEC1 output buffer impedance"
+
+config SICR_TMSOBI1_3_3_V
+       bool "40 Ohm, 3.3V"
+
+config SICR_TMSOBI1_2_5_V
+       bool "40 Ohm, 2.5V"
+
+endchoice
+
+choice
+       prompt "TSEC2 output buffer impedance"
+
+config SICR_TMSOBI2_3_3_V
+       bool "40 Ohm, 3.3V"
+
+config SICR_TMSOBI2_2_5_V
+       bool "40 Ohm, 2.5V"
+
+endchoice
+
+config SICRL_SPI
+       hex
+       default 0x0 if SICR_SPI_SPI
+       default 0x10000000 if SICR_SPI_MSRCID
+       default 0x30000000 if SICR_SPI_LSRCID
+
+config SICRL_UART
+       hex
+       default 0x0 if SICR_UART_SPI
+       default 0x4000000 if SICR_UART_MSRCID
+       default 0xc000000 if SICR_UART_LSRCID
+
+config SICRL_IRQ
+       hex
+       default 0x0 if SICR_IRQ_SPI
+       default 0x1000000 if SICR_IRQ_MCP_CKSTOP
+       default 0x3000000 if SICR_IRQ_INTA
+
+config SICRL_I2C2
+       hex
+       default 0x0 if SICR_I2C2_I2C
+       default 0x100000 if SICR_I2C2_CKSTOP
+
+config SICRL_ETSEC1_A
+       hex
+       default 0x0 if SICR_ETSEC1_A_TSEC2
+       default 0x40 if SICR_ETSEC1_A_TSEC_GTX_CLK125
+
+config SICRH_ESDHC_A
+       hex
+       default 0x0 if SICR_ESDHC_A_SD
+       default 0x40000000 if SICR_ESDHC_A_GTM
+       default 0xc0000000 if SICR_ESDHC_A_GPIO
+
+config SICRH_ESDHC_B
+       hex
+       default 0x0 if SICR_ESDHC_B_SD
+       default 0x10000000 if SICR_ESDHC_B_GTM
+       default 0x30000000 if SICR_ESDHC_B_GPIO
+
+config SICRH_ESDHC_C
+       hex
+       default 0x0 if SICR_ESDHC_C_SD
+       default 0x4000000 if SICR_ESDHC_C_GTM
+       default 0xc000000 if SICR_ESDHC_C_GPIO
+
+config SICRH_GPIO_A
+       hex
+       default 0x0 if SICR_GPIO_A_GPIO
+       default 0x1000000 if SICR_GPIO_A_TSEC2
+
+config SICRH_GPIO_B
+       hex
+       default 0x0 if SICR_GPIO_B_GPIO
+       default 0x400000 if SICR_GPIO_B_TSEC2
+       default 0x800000 if SICR_GPIO_B_TSEC_GTX_CLK125
+
+config SICRH_IEEE1588_A
+       hex
+       default 0x100000 if SICR_IEEE1588_A_TSEC
+       default 0x300000 if SICR_IEEE1588_A_GPIO
+
+config SICRH_USB
+       hex
+       default 0x40000 if SICR_USB_TSEC
+
+config SICRH_GTM
+       hex
+       default 0x10000 if SICR_GTM_TSEC
+       default 0x30000 if SICR_GTM_GPIO
+
+config SICRH_IEEE1588_B
+       hex
+       default 0xc000 if SICR_IEEE1588_B_GPIO
+
+config SICRH_ETSEC2
+       hex
+       default 0x1000 if SICR_ETSEC2_TSEC2
+       default 0x3000 if SICR_ETSEC2_GPIO
+
+config SICRH_GPIOSEL
+       hex
+       default 0x0 if SICR_GPIOSEL_GPIO
+       default 0x100 if SICR_GPIOSEL_IEEE1588
+
+config SICRH_TMROBI
+       hex
+       default 0x0 if SICR_TMROBI_3_3_V
+       default 0x10 if SICR_TMROBI_2_5_V
+
+config SICRH_TMSOBI1
+       hex
+       default 0x0 if SICR_TMSOBI1_3_3_V
+       default 0x2 if SICR_TMSOBI1_2_5_V
+
+config SICRH_TMSOBI2
+       hex
+       default 0x0 if SICR_TMSOBI2_3_3_V
+       default 0x1 if SICR_TMSOBI2_2_5_V
diff --git a/arch/powerpc/cpu/mpc83xx/sysio/sysio.h b/arch/powerpc/cpu/mpc83xx/sysio/sysio.h
new file mode 100644 (file)
index 0000000..f8c2f10
--- /dev/null
@@ -0,0 +1,32 @@
+#ifdef CONFIG_ARCH_MPC8308
+
+#ifndef CONFIG_SYS_SICRL
+#define CONFIG_SYS_SICRL (\
+       CONFIG_SICRL_SPI |\
+       CONFIG_SICRL_UART |\
+       CONFIG_SICRL_IRQ |\
+       CONFIG_SICRL_I2C2 |\
+       CONFIG_SICRL_ETSEC1_A \
+)
+#endif
+
+#ifndef CONFIG_SYS_SICRH
+#define CONFIG_SYS_SICRH (\
+       CONFIG_SICRH_ESDHC_A |\
+       CONFIG_SICRH_ESDHC_B |\
+       CONFIG_SICRH_ESDHC_C |\
+       CONFIG_SICRH_GPIO_A |\
+       CONFIG_SICRH_GPIO_B |\
+       CONFIG_SICRH_IEEE1588_A |\
+       CONFIG_SICRH_USB |\
+       CONFIG_SICRH_GTM |\
+       CONFIG_SICRH_IEEE1588_B |\
+       CONFIG_SICRH_ETSEC2 |\
+       CONFIG_SICRH_GPIOSEL |\
+       CONFIG_SICRH_TMROBI |\
+       CONFIG_SICRH_TMSOBI1 |\
+       CONFIG_SICRH_TMSOBI2 \
+)
+#endif
+
+#endif
index e674848a6c41f426ca2a349285c44f6d57027c18..9be515567c14ffb2d804fa38ff261db4079fd359 100644 (file)
@@ -62,6 +62,14 @@ CONFIG_HID0_FINAL_EMCP=y
 CONFIG_HID0_FINAL_DPM=y
 CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
+CONFIG_SICR_GPIO_A_TSEC2=y
+CONFIG_SICR_GPIO_B_TSEC_GTX_CLK125=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
index 2046b6067ddf447a8e410a8857f37dd2185c2d09..3442c9c797eb881442f360616ca292a87396aed1 100644 (file)
@@ -58,6 +58,15 @@ CONFIG_HID0_FINAL_EMCP=y
 CONFIG_HID0_FINAL_DPM=y
 CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
+CONFIG_SICR_GPIO_A_GPIO=y
+CONFIG_SICR_GPIO_B_GPIO=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_ETSEC2_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_CMD_IOLOOP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index e9d427be366ec2ea1718670688872d0b3b7fdbd0..5de0eaa4d0fd2e287f564df19dfdff8d7453bf3e 100644 (file)
@@ -58,6 +58,15 @@ CONFIG_HID0_FINAL_EMCP=y
 CONFIG_HID0_FINAL_DPM=y
 CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
+CONFIG_SICR_GPIO_A_GPIO=y
+CONFIG_SICR_GPIO_B_GPIO=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_ETSEC2_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_CMD_IOLOOP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index b0da1c07047e765360ffd48c47efdd600c6290c1..26601ff0a682225b674ebf9d63ffa76e523b6d88 100644 (file)
@@ -60,6 +60,14 @@ CONFIG_HID0_FINAL_EMCP=y
 CONFIG_HID0_FINAL_DPM=y
 CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
+CONFIG_SICR_ESDHC_A_GPIO=y
+CONFIG_SICR_ESDHC_B_GPIO=y
+CONFIG_SICR_ESDHC_C_GTM=y
+CONFIG_SICR_GPIO_A_TSEC2=y
+CONFIG_SICR_GPIO_B_TSEC2=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=5
index 82db1696735d403c5ead81f46648379f7053503b..1244652c79ca007b617395b3a9b7ab7ce1b1395e 100644 (file)
@@ -57,6 +57,15 @@ CONFIG_HID0_FINAL_EMCP=y
 CONFIG_HID0_FINAL_DPM=y
 CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC2=y
+CONFIG_SICR_GPIO_A_GPIO=y
+CONFIG_SICR_GPIO_B_GPIO=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_ETSEC2_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_CMD_IOLOOP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index b9f43273b0ebf6baba7622893cc024c65fc3a155..05040b056e4645d10c3469a66b798958984039d1 100644 (file)
@@ -57,6 +57,15 @@ CONFIG_HID0_FINAL_EMCP=y
 CONFIG_HID0_FINAL_DPM=y
 CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC2=y
+CONFIG_SICR_GPIO_A_GPIO=y
+CONFIG_SICR_GPIO_B_GPIO=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_ETSEC2_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_CMD_IOLOOP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 5dc1ddf9230501547d5d3c5b41f4b3240cc8ba79..fbae6546d72480c71a2d3efadf251a18ab661e68 100644 (file)
@@ -57,6 +57,15 @@ CONFIG_HID0_FINAL_EMCP=y
 CONFIG_HID0_FINAL_DPM=y
 CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC2=y
+CONFIG_SICR_GPIO_A_GPIO=y
+CONFIG_SICR_GPIO_B_GPIO=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_ETSEC2_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_CMD_IOLOOP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index 093f3e6b8bd081134ab9cef897372c277533326c..e3405707e53447957d6ee3400210a3a151551453 100644 (file)
@@ -57,6 +57,15 @@ CONFIG_HID0_FINAL_EMCP=y
 CONFIG_HID0_FINAL_DPM=y
 CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC2=y
+CONFIG_SICR_GPIO_A_GPIO=y
+CONFIG_SICR_GPIO_B_GPIO=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_ETSEC2_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_CMD_IOLOOP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
index e825cfbd174fcffe439f09a1e777f6b2b990c057..7ba44044f77b9ad83a92c767bf2665b8481c552e 100644 (file)
 #define CONFIG_TSEC1
 #define CONFIG_VSC7385_ENET
 
-/*
- * System IO Config
- */
-#define CONFIG_SYS_SICRH (\
-       SICRH_ESDHC_A_SD |\
-       SICRH_ESDHC_B_SD |\
-       SICRH_ESDHC_C_SD |\
-       SICRH_GPIO_A_TSEC2 |\
-       SICRH_GPIO_B_TSEC2_GTX_CLK125 |\
-       SICRH_IEEE1588_A_GPIO |\
-       SICRH_USB |\
-       SICRH_GTM_GPIO |\
-       SICRH_IEEE1588_B_GPIO |\
-       SICRH_ETSEC2_CRS |\
-       SICRH_GPIOSEL_1 |\
-       SICRH_TMROBI_V3P3 |\
-       SICRH_TSOBI1_V2P5 |\
-       SICRH_TSOBI2_V2P5)      /* 0x01b7d103 */
-#define CONFIG_SYS_SICRL (\
-       SICRL_SPI_PF0 |\
-       SICRL_UART_PF0 |\
-       SICRL_IRQ_PF0 |\
-       SICRL_I2C2_PF0 |\
-       SICRL_ETSEC1_GTX_CLK125)        /* 0x00000040 */
-
 /*
  * SERDES
  */
index e8a4b7adf67356beccd4f5daf6b0d2998c1be0b8..23e0da9624aafe1f62eededf15455e1652fa9a77 100644 (file)
 
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC83xx_ESDHC_ADDR
 
-/*
- * System IO Config
- */
-#define CONFIG_SYS_SICRH (\
-       SICRH_ESDHC_A_SD |\
-       SICRH_ESDHC_B_SD |\
-       SICRH_ESDHC_C_SD |\
-       SICRH_GPIO_A_GPIO |\
-       SICRH_GPIO_B_GPIO |\
-       SICRH_IEEE1588_A_GPIO |\
-       SICRH_USB |\
-       SICRH_GTM_GPIO |\
-       SICRH_IEEE1588_B_GPIO |\
-       SICRH_ETSEC2_GPIO |\
-       SICRH_GPIOSEL_1 |\
-       SICRH_TMROBI_V3P3 |\
-       SICRH_TSOBI1_V2P5 |\
-       SICRH_TSOBI2_V2P5)      /* 0x0037f103 */
-#define CONFIG_SYS_SICRL (\
-       SICRL_SPI_PF0 |\
-       SICRL_UART_PF0 |\
-       SICRL_IRQ_PF0 |\
-       SICRL_I2C2_PF0 |\
-       SICRL_ETSEC1_GTX_CLK125)        /* 0x00000000 */
-
 /*
  * SERDES
  */
index 76846c43d015f7e2f4fac91472616b0e0c957284..d0eac0a2efedf89955e76882256028beaea01e86 100644 (file)
 #define CONFIG_TSEC1
 #define CONFIG_TSEC2
 
-/*
- * System IO Config
- */
-#define CONFIG_SYS_SICRH (\
-       SICRH_ESDHC_A_GPIO |\
-       SICRH_ESDHC_B_GPIO |\
-       SICRH_ESDHC_C_GTM |\
-       SICRH_GPIO_A_TSEC2 |\
-       SICRH_GPIO_B_TSEC2_TX_CLK |\
-       SICRH_IEEE1588_A_GPIO |\
-       SICRH_USB |\
-       SICRH_GTM_GPIO |\
-       SICRH_IEEE1588_B_GPIO |\
-       SICRH_ETSEC2_CRS |\
-       SICRH_GPIOSEL_1 |\
-       SICRH_TMROBI_V3P3 |\
-       SICRH_TSOBI1_V3P3 |\
-       SICRH_TSOBI2_V3P3)      /* 0xf577d100 */
-#define CONFIG_SYS_SICRL (\
-       SICRL_SPI_PF0 |\
-       SICRL_UART_PF0 |\
-       SICRL_IRQ_PF0 |\
-       SICRL_I2C2_PF0 |\
-       SICRL_ETSEC1_TX_CLK)    /* 0x00000000 */
-
 #define CONFIG_SYS_GPIO1_PRELIM
 /* GPIO Default input/output settings */
 #define CONFIG_SYS_GPIO1_DIR        0x7AAF8C00
index fe2d89f2a61cb2008c5be698f42ff2e440f74aea..8afd17d1b00048a28a530c6151b15447181efde1 100644 (file)
 
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC83xx_ESDHC_ADDR
 
-/*
- * System IO Config
- */
-#define CONFIG_SYS_SICRH (\
-       SICRH_ESDHC_A_SD |\
-       SICRH_ESDHC_B_SD |\
-       SICRH_ESDHC_C_SD |\
-       SICRH_GPIO_A_GPIO |\
-       SICRH_GPIO_B_GPIO |\
-       SICRH_IEEE1588_A_GPIO |\
-       SICRH_USB |\
-       SICRH_GTM_GPIO |\
-       SICRH_IEEE1588_B_GPIO |\
-       SICRH_ETSEC2_GPIO |\
-       SICRH_GPIOSEL_1 |\
-       SICRH_TMROBI_V3P3 |\
-       SICRH_TSOBI1_V2P5 |\
-       SICRH_TSOBI2_V2P5)      /* 0x0037f103 */
-#define CONFIG_SYS_SICRL (\
-       SICRL_SPI_PF0 |\
-       SICRL_UART_PF0 |\
-       SICRL_IRQ_PF0 |\
-       SICRL_I2C2_PF0 |\
-       SICRL_ETSEC1_TX_CLK)    /* 0x00000000 */
-
 /*
  * SERDES
  */