mmc: Move tegra loopback disable option to be under tegra

This is a configuration option specific to the tegra controller.

Doing it this way makes it show up directly under the tegra controller
option, indented one level, as "Disable external clock loopback".

The way it is now, it shows up at the end of the controller list, not
indented, as if it's some kind of generic MMC configuration option.

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 66097ce0e7b0c4aa8c24e9be241b9ac625665a09..c6812f65173cebf093c9f39d33a6c1bce65d694f 100644 (file)
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -592,6 +592,17 @@ config MMC_SDHCI_TEGRA
 
          If unsure, say N.
 
+config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
+       bool "Disable external clock loopback"
+       depends on MMC_SDHCI_TEGRA && TEGRA124
+       help
+         Disable the external clock loopback and use the internal one on SDMMC3
+         as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits
+         being set to 0xfffd according to the TRM.
+
+         TODO(marcel.ziswiler@toradex.com): Move to device tree controlled
+         approach once proper kernel integration made it mainline.
+
 config MMC_SDHCI_ZYNQ
        bool "Arasan SDHCI controller support"
        depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL
@@ -671,17 +682,6 @@ config MMC_MTK
 
 endif
 
-config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
-       bool "Disable external clock loopback"
-       depends on MMC_SDHCI_TEGRA && TEGRA124
-       help
-         Disable the external clock loopback and use the internal one on SDMMC3
-         as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits
-         being set to 0xfffd according to the TRM.
-
-         TODO(marcel.ziswiler@toradex.com): Move to device tree controlled
-         approach once proper kernel integration made it mainline.
-
 config FSL_ESDHC
        bool "Freescale/NXP eSDHC controller support"
        help