armv8: fsl-layerscape: properly configure qdma ICID

The ICIDs for the qdma device are not configured through SCFG but
through some registers found in the actual device register block.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
index a3f473fe28b5c99b87ac0aa41581e94311142eac..f375fe7115c1a49084f2b6327d3bddd4400178d1 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
@@ -55,7 +55,11 @@ void fdt_fixup_icid(void *blob);
                CONFIG_SYS_FSL_ESDHC_ADDR)
 
 #define SET_QDMA_ICID(compat, streamid) \
-       SET_SCFG_ICID(compat, streamid, dma_icid,\
+       SET_ICID_ENTRY(compat, streamid, (1 << 31) | (streamid), \
+               QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \
+               QDMA_BASE_ADDR), \
+       SET_ICID_ENTRY(NULL, streamid, (1 << 31) | (streamid), \
+               QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \
                QDMA_BASE_ADDR)
 
 #define SET_EDMA_ICID(streamid) \

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 4d0f16f21c2b04f124e261f7a07c3d5b7e6aa64d..b4b7c3492e9b27912d1e641329240dd71a924dac 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -94,6 +94,7 @@
 #define AHCI_BASE_ADDR                         (CONFIG_SYS_IMMR + 0x02200000)
 
 #define QDMA_BASE_ADDR                         (CONFIG_SYS_IMMR + 0x07380000)
+#define QMAN_CQSIDR_REG                                0x20a80
 
 #define CONFIG_SYS_PCIE1_PHYS_ADDR             0x4000000000ULL
 #define CONFIG_SYS_PCIE2_PHYS_ADDR             0x4800000000ULL