ARC: HSDK: Enable on-chip reset controller

As the driver of on-chip reset controller became available
we are ready to enable it.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

diff --git a/arch/arc/dts/hsdk.dts b/arch/arc/dts/hsdk.dts
index 34ef3a620a38a9db8a44e8f88358dc8f19c7a121..cf2ce8a1f6c93506cb5ad00e4320a8d2002b33a7 100644 (file)
--- a/arch/arc/dts/hsdk.dts
+++ b/arch/arc/dts/hsdk.dts
@@ -6,6 +6,7 @@
 
 #include "skeleton.dtsi"
 #include "dt-bindings/clock/snps,hsdk-cgu.h"
+#include "dt-bindings/reset/snps,hsdk-reset.h"
 
 / {
        model = "snps,hsdk";
@@ -62,6 +63,12 @@
                #clock-cells = <1>;
        };
 
+       cgu_rst: reset-controller@f00008a0 {
+               compatible = "snps,hsdk-reset";
+               #reset-cells = <1>;
+               reg = <0xf00008a0 0x4>, <0xf0000ff0 0x4>;
+       };
+
        uart0: serial0@f0005000 {
                compatible = "snps,dw-apb-uart";
                reg = <0xf0005000 0x1000>;

diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig
index 4830158d55a119fc70964eb73cba5156385900d8..84b22ed7c04743319229fa9a61e275ca5a39863d 100644 (file)
--- a/configs/hsdk_defconfig
+++ b/configs/hsdk_defconfig
@@ -47,6 +47,7 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
+CONFIG_DM_RESET=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_ANNOUNCE=y