ARM: bcm283x: Set memory map at run-time
authorMatthias Brugger <mbrugger@suse.com>
Tue, 19 Nov 2019 15:01:05 +0000 (16:01 +0100)
committerMatthias Brugger <mbrugger@suse.com>
Sun, 24 Nov 2019 09:46:28 +0000 (10:46 +0100)
For bcm283x based on arm64 we also have to change the mm_region.
Add assign this in mach_cpu_init() so we can create now one binary
for RPi3 and RPi4.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
arch/arm/mach-bcm283x/init.c
board/raspberrypi/rpi/rpi.c

index b3f3dfabea8e76cc7ebae8a515b145e4455bbf49..6fb41a99b26288fc8d67b0e32d2be9bf98efb7a1 100644 (file)
 #include <dm/device.h>
 #include <fdt_support.h>
 
+#ifdef CONFIG_ARM64
+#include <asm/armv8/mmu.h>
+
+static struct mm_region bcm283x_mem_map[] = {
+       {
+               .virt = 0x00000000UL,
+               .phys = 0x00000000UL,
+               .size = 0x3f000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                        PTE_BLOCK_INNER_SHARE
+       }, {
+               .virt = 0x3f000000UL,
+               .phys = 0x3f000000UL,
+               .size = 0x01000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* List terminator */
+               0,
+       }
+};
+
+static struct mm_region bcm2711_mem_map[] = {
+       {
+               .virt = 0x00000000UL,
+               .phys = 0x00000000UL,
+               .size = 0xfe000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                        PTE_BLOCK_INNER_SHARE
+       }, {
+               .virt = 0xfe000000UL,
+               .phys = 0xfe000000UL,
+               .size = 0x01800000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* List terminator */
+               0,
+       }
+};
+
+struct mm_region *mem_map = bcm283x_mem_map;
+
+/*
+ * I/O address space varies on different chip versions.
+ * We set the base address by inspecting the DTB.
+ */
+static const struct udevice_id board_ids[] = {
+       { .compatible = "brcm,bcm2837", .data = (ulong)&bcm283x_mem_map},
+       { .compatible = "brcm,bcm2838", .data = (ulong)&bcm2711_mem_map},
+       { .compatible = "brcm,bcm2711", .data = (ulong)&bcm2711_mem_map},
+       { },
+};
+
+static void _rpi_update_mem_map(struct mm_region *pd)
+{
+       int i;
+
+       for (i = 0; i < 2; i++) {
+               mem_map[i].virt = pd[i].virt;
+               mem_map[i].phys = pd[i].phys;
+               mem_map[i].size = pd[i].size;
+               mem_map[i].attrs = pd[i].attrs;
+       }
+}
+
+static void rpi_update_mem_map(void)
+{
+       int ret;
+       struct mm_region *mm;
+       const struct udevice_id *of_match = board_ids;
+
+       while (of_match->compatible) {
+               ret = fdt_node_check_compatible(gd->fdt_blob, 0,
+                                               of_match->compatible);
+               if (!ret) {
+                       mm = (struct mm_region *)of_match->data;
+                       _rpi_update_mem_map(mm);
+                       break;
+               }
+
+               of_match++;
+       }
+}
+#else
+static void rpi_update_mem_map(void) {}
+#endif
+
 unsigned long rpi_bcm283x_base = 0x3f000000;
 
 int arch_cpu_init(void)
@@ -24,6 +114,8 @@ int mach_cpu_init(void)
        int ret, soc_offset;
        u64 io_base, size;
 
+       rpi_update_mem_map();
+
        /* Get IO base from device tree */
        soc_offset = fdt_path_offset(gd->fdt_blob, "/soc");
        if (soc_offset < 0)
index e84a1db14a14c484ef3f889a3eb713526417fcad..3d4afaf653aa9d6932f077c45faa9666eb030a56 100644 (file)
@@ -251,51 +251,6 @@ static uint32_t rev_scheme;
 static uint32_t rev_type;
 static const struct rpi_model *model;
 
-#ifdef CONFIG_ARM64
-#ifndef CONFIG_BCM2711
-static struct mm_region bcm283x_mem_map[] = {
-       {
-               .virt = 0x00000000UL,
-               .phys = 0x00000000UL,
-               .size = 0x3f000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-                        PTE_BLOCK_INNER_SHARE
-       }, {
-               .virt = 0x3f000000UL,
-               .phys = 0x3f000000UL,
-               .size = 0x01000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               /* List terminator */
-               0,
-       }
-};
-#else
-static struct mm_region bcm283x_mem_map[] = {
-       {
-               .virt = 0x00000000UL,
-               .phys = 0x00000000UL,
-               .size = 0xfe000000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-                        PTE_BLOCK_INNER_SHARE
-       }, {
-               .virt = 0xfe000000UL,
-               .phys = 0xfe000000UL,
-               .size = 0x01800000UL,
-               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-                        PTE_BLOCK_NON_SHARE |
-                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, {
-               /* List terminator */
-               0,
-       }
-};
-#endif
-struct mm_region *mem_map = bcm283x_mem_map;
-#endif
-
 int dram_init(void)
 {
        ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1);