mips: mtmips: add support for mt7628-rfb
authorWeijie Gao <weijie.gao@mediatek.com>
Tue, 21 Apr 2020 07:28:49 +0000 (09:28 +0200)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Mon, 27 Apr 2020 18:30:13 +0000 (20:30 +0200)
This patch adds support for mt7628 reference board. SPL_DM and DT are not
enabled for SPL to save about 17KiB for u-boot-spl.bin.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
arch/mips/dts/Makefile
arch/mips/dts/mediatek,mt7628-rfb.dts [new file with mode: 0644]
arch/mips/mach-mtmips/Kconfig
board/mediatek/mt7628/Kconfig [new file with mode: 0644]
board/mediatek/mt7628/MAINTAINERS [new file with mode: 0644]
board/mediatek/mt7628/Makefile [new file with mode: 0644]
board/mediatek/mt7628/board.c [new file with mode: 0644]
configs/mt7628_rfb_defconfig [new file with mode: 0644]
include/configs/mt7628.h [new file with mode: 0644]

index c9d75596f250f83206bff1cafcb209ac59d36c20..cbd0c8bc8b8bad4cf1616bad2716b7cb9f3a66fe 100644 (file)
@@ -17,6 +17,7 @@ dtb-$(CONFIG_BOARD_COMTREND_CT5361) += comtrend,ct-5361.dtb
 dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
 dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
 dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
+dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb
 dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
 dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
 dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f@st1704.dtb
diff --git a/arch/mips/dts/mediatek,mt7628-rfb.dts b/arch/mips/dts/mediatek,mt7628-rfb.dts
new file mode 100644 (file)
index 0000000..6ff36da
--- /dev/null
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+/dts-v1/;
+
+#include "mt7628a.dtsi"
+
+/ {
+       compatible = "mediatek,mt7628-rfb", "ralink,mt7628a-soc";
+       model = "MediaTek MT7628 RFB";
+
+       aliases {
+               serial0 = &uart0;
+               spi0 = &spi0;
+       };
+
+       chosen {
+               stdout-path = &uart0;
+       };
+};
+
+&pinctrl {
+       state_default: pin_state {
+               pleds {
+                       groups = "p0led", "p1led", "p2led", "p3led", "p4led";
+                       function = "led";
+               };
+       };
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&spi0 {
+       status = "okay";
+       num-cs = <2>;
+
+       spi-flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               spi-max-frequency = <25000000>;
+               reg = <0>;
+       };
+};
+
+&eth {
+       mediatek,wan-port = <0>;
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&ephy_router_mode>;
+};
+
+&mmc {
+       bus-width = <4>;
+       cap-sd-highspeed;
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&sd_router_mode>;
+
+       status = "okay";
+};
index 5a5f2e3f80d89a4f19c60174b6ca17d035a0fd65..60cc0f8f25e02981996295fbf6c7104bd2e275fc 100644 (file)
@@ -79,6 +79,14 @@ config BOARD_LINKIT_SMART_7688
          ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
          a MT7688 (PCIe).
 
+config BOARD_MT7628_RFB
+       bool "MediaTek MT7628 RFB"
+       depends on SOC_MT7628
+       help
+         The reference design of MT7628. The board has 128 MiB DDR2, 8 MiB
+         SPI-NOR flash, 1 built-in switch with 5 ports, 1 UART, 1 USB host,
+         1 SDXC, 1 PCIe socket and JTAG pins.
+
 endchoice
 
 config SPL_UART2_SPIS_PINMUX
@@ -90,6 +98,7 @@ config SPL_UART2_SPIS_PINMUX
          (shared with SPIS) rather than the usual GPIO 20/21.
 
 source "board/gardena/smart-gateway-mt7688/Kconfig"
+source "board/mediatek/mt7628/Kconfig"
 source "board/seeed/linkit-smart-7688/Kconfig"
 
 endmenu
diff --git a/board/mediatek/mt7628/Kconfig b/board/mediatek/mt7628/Kconfig
new file mode 100644 (file)
index 0000000..d6b6f9d
--- /dev/null
@@ -0,0 +1,12 @@
+if BOARD_MT7628_RFB
+
+config SYS_BOARD
+       default "mt7628"
+
+config SYS_VENDOR
+       default "mediatek"
+
+config SYS_CONFIG_NAME
+       default "mt7628"
+
+endif
diff --git a/board/mediatek/mt7628/MAINTAINERS b/board/mediatek/mt7628/MAINTAINERS
new file mode 100644 (file)
index 0000000..032fd0e
--- /dev/null
@@ -0,0 +1,7 @@
+MT7628_RFB BOARD
+M:     Weijie Gao <weijie.gao@mediatek.com>
+S:     Maintained
+F:     board/mediatek/mt7628
+F:     include/configs/mt7628.h
+F:     configs/mt7628_rfb_defconfig
+F:     arch/mips/dts/mediatek,mt7628-rfb.dts
diff --git a/board/mediatek/mt7628/Makefile b/board/mediatek/mt7628/Makefile
new file mode 100644 (file)
index 0000000..db129c5
--- /dev/null
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += board.o
diff --git a/board/mediatek/mt7628/board.c b/board/mediatek/mt7628/board.c
new file mode 100644 (file)
index 0000000..f837a06
--- /dev/null
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
+ *
+ * Author: Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+#include <common.h>
diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig
new file mode 100644 (file)
index 0000000..a96c65a
--- /dev/null
@@ -0,0 +1,47 @@
+CONFIG_MIPS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x30000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x20000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL=y
+CONFIG_ARCH_MTMIPS=y
+CONFIG_BOARD_MT7628_RFB=y
+CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_FIT=y
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_NOR_SUPPORT=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_DM is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_NFS is not set
+# CONFIG_PARTITIONS is not set
+CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7628-rfb"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+# CONFIG_INPUT is not set
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_MT7628_ETH=y
+# CONFIG_SPECIFY_CONSOLE_INDEX is not set
+CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
+CONFIG_LZMA=y
+CONFIG_SPL_LZMA=y
diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h
new file mode 100644 (file)
index 0000000..9b9218d
--- /dev/null
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+#ifndef __CONFIG_MT7628_H
+#define __CONFIG_MT7628_H
+
+#define CONFIG_SYS_HZ                  1000
+#define CONFIG_SYS_MIPS_TIMER_FREQ     290000000
+
+#define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_MALLOC_LEN          0x100000
+#define CONFIG_SYS_BOOTPARAMS_LEN      0x20000
+
+#define CONFIG_SYS_SDRAM_BASE          0x80000000
+#define CONFIG_SYS_LOAD_ADDR           0x80010000
+
+#define CONFIG_SYS_INIT_SP_OFFSET      0x80000
+
+#define CONFIG_SYS_BOOTM_LEN           0x1000000
+
+#define CONFIG_SYS_MAXARGS             16
+#define CONFIG_SYS_CBSIZE              1024
+
+/* Serial SPL */
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)
+#define CONFIG_SYS_NS16550_MEM32
+#define CONFIG_SYS_NS16550_CLK         40000000
+#define CONFIG_SYS_NS16550_REG_SIZE    -4
+#define CONFIG_SYS_NS16550_COM1                0xb0000c00
+#define CONFIG_CONS_INDEX              1
+#endif
+
+/* Serial common */
+#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200, \
+                                         230400, 460800, 921600 }
+
+/* SPL */
+#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#define CONFIG_SYS_UBOOT_START         CONFIG_SYS_TEXT_BASE
+#define CONFIG_SPL_BSS_START_ADDR      0x80010000
+#define CONFIG_SPL_BSS_MAX_SIZE                0x10000
+#define CONFIG_SPL_MAX_SIZE            0x10000
+#define CONFIG_SPL_PAD_TO              0
+
+/* Dummy value */
+#define CONFIG_SYS_UBOOT_BASE          0
+
+#endif /* __CONFIG_MT7628_H */