board: fsl: lx2160a: fix SDHC1_DAT4 signal routing

The SDHC1_DAT4 signal could be routes to SDHC1_VS or SDHC1
adapter slot for SDHC1 usage. When SDHC1 is selected in RCW,
do not force to route it to SDHC1 adapter slot if find it
has already been configued for SDHC1_VS.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 971c76bf504cf522599d3857ac90ae8dcce9460c..4b20bb440f724eaef11e79618da200aa2d2879b7 100644 (file)
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -480,10 +480,16 @@ int config_board_mux(void)
                reg11 = SET_CFG_MUX3_SDHC1_SPI(reg11, 0x01);
                QIXIS_WRITE(brdcfg[11], reg11);
        } else {
-               /*  Routes {SDHC1_DAT4} to SDHC1 adapter slot */
+               /*
+                * If {SDHC1_DAT4} has been configured to route to SDHC1_VS,
+                * do not change it.
+                * Otherwise route {SDHC1_DAT4} to SDHC1 adapter slot.
+                */
                reg11 = QIXIS_READ(brdcfg[11]);
-               reg11 = SET_CFG_MUX2_SDHC1_SPI(reg11, 0x00);
-               QIXIS_WRITE(brdcfg[11], reg11);
+               if ((reg11 & 0x30) != 0x30) {
+                       reg11 = SET_CFG_MUX2_SDHC1_SPI(reg11, 0x00);
+                       QIXIS_WRITE(brdcfg[11], reg11);
+               }
 
                /* - Routes {SDHC1_DAT5, SDHC1_DAT6} to SDHC1 adapter slot.
                 * {SDHC1_DAT7, SDHC1_DS } to SDHC1 adapter slot.