ARM: DRA7: emif: Enable interleaving for higher address space

Given that DRA7/OMAP5 SoCs can support more than 2GB of memory,
enable interleaving for this higher memory to increase performance.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c
index 36738847b12c095630c61770d9b1da6a5997ad30..697d6e02dae5999f1de95f7d82d019522dad1f08 100644 (file)
--- a/arch/arm/cpu/armv7/omap-common/emif-common.c
+++ b/arch/arm/cpu/armv7/omap-common/emif-common.c
@@ -1329,6 +1329,8 @@ void dmm_init(u32 base)
                        &hw_lisa_map_regs->dmm_lisa_map_1);
                writel(lisa_map_regs->dmm_lisa_map_0,
                        &hw_lisa_map_regs->dmm_lisa_map_0);
+
+               setbits_le32(MA_PRIORITY, MA_HIMEM_INTERLEAVE_UN_MASK);
        }
 
        /*

diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h
index b03cf5a8c4ed4d6bcefe1dcee67f48d1dff7ed5d..31831302aafea071b57646b719b8b9e87816ace2 100644 (file)
--- a/arch/arm/include/asm/emif.h
+++ b/arch/arm/include/asm/emif.h
@@ -545,6 +545,9 @@
 
 /* Memory Adapter */
 #define MA_BASE                                0x482AF040
+#define MA_PRIORITY                    0x482A2000
+#define MA_HIMEM_INTERLEAVE_UN_SHIFT   8
+#define MA_HIMEM_INTERLEAVE_UN_MASK    (1 << 8)
 
 /* DMM_LISA_MAP */
 #define EMIF_SYS_ADDR_SHIFT            24