arm: socfpga: dts: Adding drvsel and smplsel to dts
authorChin Liang See <clsee@altera.com>
Thu, 26 Nov 2015 01:44:11 +0000 (09:44 +0800)
committerMarek Vasut <marex@denx.de>
Mon, 30 Nov 2015 12:30:19 +0000 (13:30 +0100)
Adding new node drvsel and smplsel for SDMMC

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
arch/arm/dts/socfpga_arria5.dtsi
arch/arm/dts/socfpga_cyclone5.dtsi

index 5175f03da4f1aed0f7b41f9a7299cbd1b64bee8e..fa0bd7d2f93db5110c5205744b2e79a823fb663c 100644 (file)
@@ -25,6 +25,8 @@
                        bus-width = <4>;
                        cap-mmc-highspeed;
                        cap-sd-highspeed;
+                       drvsel = <3>;
+                       smplsel = <0>;
                };
 
                sysmgr@ffd08000 {
index de362099db686a5093ae24d461293ac984fe4850..040b2362111e530d7accc223ec24386077c90a54 100644 (file)
@@ -25,6 +25,8 @@
                        bus-width = <4>;
                        cap-mmc-highspeed;
                        cap-sd-highspeed;
+                       drvsel = <3>;
+                       smplsel = <0>;
                };
 
                sysmgr@ffd08000 {