arm: armv8 correct value passed to __asm_dcache_all

>From source code comments:
"x0: 0 flush & invalidate, 1 invalidate only"

Current value 0xffff can make invalidate work, since we only judge whether
input value is 0 or not, see following code:
"
    tbz     w1, #0, 1f
    dc      isw, x9
    b       2f
1:  dc      cisw, x9      /* clean & invalidate by set/way */
2:  subs    x6, x6, #1    /* decrement the way */
"

Later we may add "2 clean only" support. So following the comments,
correct value from 0xffff to 1.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>

diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S
index d8462365006288d6820415ba66003f2f26fddf3b..ab8c08917ad7c5ba1b9e48799b629c3f9f0f5286 100644 (file)
--- a/arch/arm/cpu/armv8/cache.S
+++ b/arch/arm/cpu/armv8/cache.S
@@ -112,7 +112,7 @@ ENDPROC(__asm_flush_dcache_all)
 
 ENTRY(__asm_invalidate_dcache_all)
        mov     x16, lr
-       mov     x0, #0xffff
+       mov     x0, #0x1
        bl      __asm_dcache_all
        mov     lr, x16
        ret