x86: Reserve PCIe ECAM address range in the E820 table
authorBin Meng <bmeng.cn@gmail.com>
Wed, 22 Jul 2015 08:21:15 +0000 (01:21 -0700)
committerSimon Glass <sjg@chromium.org>
Tue, 28 Jul 2015 16:36:25 +0000 (10:36 -0600)
We should mark PCIe ECAM address range in the E820 table as reserved
otherwise kernel will not attempt to use ECAM.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/x86/Kconfig
arch/x86/lib/fsp/fsp_dram.c
arch/x86/lib/zimage.c

index cbbaa4f2ce6db901a2ccf8941710332a0c696f4e..e8968a7182bbcbc0b64722b4667b97fcc7c00ac4 100644 (file)
@@ -369,4 +369,14 @@ config PCIE_ECAM_BASE
          assigned to PCI devices - i.e. the memory and prefetch regions, as
          passed to pci_set_region().
 
+config PCIE_ECAM_SIZE
+       hex
+       default 0x10000000
+       help
+         This is the size of memory-mapped address of PCI configuration space,
+         which is only available through the Enhanced Configuration Access
+         Mechanism (ECAM) with PCI Express. Each bus consumes 1 MiB memory,
+         so a default 0x10000000 size covers all of the 256 buses which is the
+         maximum number of PCI buses as defined by the PCI specification.
+
 endmenu
index 4c0a7c82ca22923a0874f1bc8ee4c7cecdee6a8c..28552fa15a0e32b8601cb177a7ff26b58d727304 100644 (file)
@@ -77,5 +77,11 @@ unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
                num_entries++;
        }
 
+       /* Mark PCIe ECAM address range as reserved */
+       entries[num_entries].addr = CONFIG_PCIE_ECAM_BASE;
+       entries[num_entries].size = CONFIG_PCIE_ECAM_SIZE;
+       entries[num_entries].type = E820_RESERVED;
+       num_entries++;
+
        return num_entries;
 }
index 144471c5bb7c49458382803c260c31f0938358f8..a1ec57e8d3ea478e1d75babac788f71eafd89e18 100644 (file)
@@ -61,8 +61,11 @@ __weak unsigned install_e820_map(unsigned max_entries,
        entries[2].addr = ISA_END_ADDRESS;
        entries[2].size = gd->ram_size - ISA_END_ADDRESS;
        entries[2].type = E820_RAM;
+       entries[3].addr = CONFIG_PCIE_ECAM_BASE;
+       entries[3].size = CONFIG_PCIE_ECAM_SIZE;
+       entries[3].type = E820_RESERVED;
 
-       return 3;
+       return 4;
 }
 
 static void build_command_line(char *command_line, int auto_boot)