}
#endif
+static void erratum_a009929(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009929
+ struct ccsr_gur *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
+ u32 __iomem *dcsr_cop_ccp = (void *)CONFIG_SYS_DCSR_COP_CCP_ADDR;
+ u32 rstrqmr1 = gur_in32(&gur->rstrqmr1);
+
+ rstrqmr1 |= 0x00000400;
+ gur_out32(&gur->rstrqmr1, rstrqmr1);
+ writel(0x01000000, dcsr_cop_ccp);
+#endif
+}
+
void fsl_lsch2_early_init_f(void)
{
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
*/
out_le32(&cci->slave[4].snoop_ctrl,
CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN);
+
+ /* Erratum */
+ erratum_a009929();
}
#endif
#define GICD_BASE 0x01401000
#define GICC_BASE 0x01402000
+#define CONFIG_SYS_FSL_ERRATUM_A009929
#else
#error SoC not defined
#endif
#define CONFIG_SYS_IMMR 0x01000000
#define CONFIG_SYS_DCSRBAR 0x20000000
-#define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x00220000)
+#define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x00140000)
+#define CONFIG_SYS_DCSR_COP_CCP_ADDR (CONFIG_SYS_DCSRBAR + 0x02008040)
#define CONFIG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000)
#define CONFIG_SYS_CCI400_ADDR (CONFIG_SYS_IMMR + 0x00180000)
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
-config ROCKCHIP_SPL_HDR
- string "Header of rockchip's spl loader"
- help
- Rockchip's bootrom requires the spl loader to start with a 4-bytes
- header. The content of this header depends on the chip type.
-
-config ROCKCHIP_MAX_SPL_SIZE
- hex "Max size of rockchip's spl loader"
- help
- Different chip may have different sram size. And if we want to jump
- back to the bootrom after spl, we may need to reserve some sram space
- for the bootrom.
- The max spl loader size should be sram size minus reserved
- size(if needed)
-
config SYS_MALLOC_F
default y
config TARGET_EVB_RK3036
bool "EVB_RK3036"
+config TARGET_KYLIN_RK3036
+ bool "KYLIN_RK3036"
+
config SYS_SOC
default "rockchip"
config SYS_MALLOC_F_LEN
default 0x400
-config ROCKCHIP_SPL_HDR
- default "RK30"
-
-config ROCKCHIP_MAX_SPL_SIZE
- default 0x1000
-
config ROCKCHIP_COMMON
bool "Support rk common fuction"
source "board/evb_rk3036/evb_rk3036/Kconfig"
+source "board/kylin/kylin_rk3036/Kconfig"
endif
static void sdram_all_config(struct rk3036_sdram_priv *priv)
{
u32 os_reg = 0;
+ u32 cs1_row = 0;
struct rk3036_ddr_config config = priv->ddr_config;
+ if (config.rank > 1)
+ cs1_row = config.cs1_row - 13;
+
os_reg = config.ddr_type << DDR_TYPE_SHIFT |
0 << DDR_CHN_CNT_SHIFT |
(config.rank - 1) << DDR_RANK_CNT_SHIFT |
(config.col - 1) << DDR_COL_SHIFT |
(config.bank == 3 ? 0 : 1) << DDR_BANK_SHIFT |
(config.cs0_row - 13) << DDR_CS0_ROW_SHIFT |
- (config.cs1_row - 13) << DDR_CS1_ROW_SHIFT |
+ cs1_row << DDR_CS1_ROW_SHIFT |
1 << DDR_BW_SHIFT | config.bw << DDR_DIE_BW_SHIFT;
writel(os_reg, &priv->grf->os_reg[1]);
}
WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to
the keyboard and battery functions.
-config ROCKCHIP_SPL_HDR
- default "RK32"
-
-config ROCKCHIP_MAX_SPL_SIZE
- default 0x8000
-
config SYS_SOC
default "rockchip"
#PBL preamble and RCW header
aa55aa55 01ee0100
# serdes protocol
-0810000f 0c000000 00000000 00000000
-14550002 80004012 e0106000 61002000
+08100010 0a000000 00000000 00000000
+14550002 80004012 e0106000 c1002000
00000000 00000000 00000000 00038800
00000000 00001100 00000096 00000001
aa55aa55 01ee0100
# RCW
# Enable IFC; disable QSPI
-0810000f 0c000000 00000000 00000000
-14550002 80004012 60040000 61002000
+08100010 0a000000 00000000 00000000
+14550002 80004012 60040000 c1002000
00000000 00000000 00000000 00038800
00000000 00001100 00000096 00000001
#PBL preamble and RCW header
aa55aa55 01ee0100
# serdes protocol
-0810000f 0c000000 00000000 00000000
-14550002 80004012 e0106000 61002000
+08100010 0a000000 00000000 00000000
+14550002 80004012 e0106000 c1002000
00000000 00000000 00000000 00038800
00000000 00001100 00000096 00000001
#PBL preamble and RCW header
aa55aa55 01ee0100
# RCW
-0810000f 0c000000 00000000 00000000
-14550002 80004012 60040000 61002000
+08100010 0a000000 00000000 00000000
+14550002 80004012 60040000 c1002000
00000000 00000000 00000000 00038800
00000000 00001100 00000096 00000001
--- /dev/null
+if TARGET_KYLIN_RK3036
+
+config SYS_BOARD
+ default "kylin_rk3036"
+
+config SYS_VENDOR
+ default "kylin"
+
+config SYS_CONFIG_NAME
+ default "kylin_rk3036"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
--- /dev/null
+#
+# (C) Copyright 2015 Google, Inc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += kylin_rk3036.o
--- /dev/null
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/uart.h>
+#include <asm/arch/sdram_rk3036.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void get_ddr_config(struct rk3036_ddr_config *config)
+{
+ /* K4B4G1646Q config */
+ config->ddr_type = 3;
+ config->rank = 1;
+ config->cs0_row = 15;
+ config->cs1_row = 15;
+
+ /* 8bank */
+ config->bank = 3;
+ config->col = 10;
+
+ /* 16bit bw */
+ config->bw = 1;
+}
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = sdram_size();
+
+ return 0;
+}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
#ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE
if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) {
if (!(gd->flags & GD_FLG_SPL_INIT))
- panic("spl_init must be called before heap reloc");
+ panic_str("spl_init must be called before heap reloc");
ptr -= CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN;
gd->malloc_base = ptr;
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
--- /dev/null
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3036=y
+CONFIG_TARGET_KYLIN_RK3036=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CLK=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_RESET=y
+CONFIG_LED=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_ROCKCHIP_DWMMC=y
+CONFIG_ROCKCHIP_3036_PINCTRL=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_RAM=y
+CONFIG_DM_MMC=y
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
To create a suitable image and write it to the board:
- ./firefly-rk3288/tools/mkimage -T rkimage -d \
+ ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
To write an image that boots from an SD card (assumed to be /dev/sdc):
- ./firefly-rk3288/tools/mkimage -T rksd -d \
+ ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
sudo dd if=out of=/dev/sdc seek=64 && \
sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
=>
For evb_rk3036 board:
- ./evb-rk3036/tools/mkimage -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
+ ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
cat evb-rk3036/u-boot-dtb.bin >> out && \
sudo dd if=out of=/dev/sdc seek=64
To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
- ./chromebook_jerry/tools/mkimage -T rkspi -d chromebook_jerry/spl/u-boot-spl-dtb.bin out
+ ./chromebook_jerry/tools/mkimage -n rk3036 -T rkspi -d chromebook_jerry/spl/u-boot-spl-dtb.bin out
dd if=spl.bin of=out.bin bs=128K conv=sync
cat chromebook_jerry/u-boot-dtb.img out.bin
dd if=out.bin of=out.bin.pad bs=4M conv=sync
mmc->block_dev.blksz = mmc->read_bl_len;
mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
-#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
+#if !defined(CONFIG_SPL_BUILD) || \
+ (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
+ !defined(CONFIG_USE_TINY_PRINTF))
sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
(mmc->cid[3] >> 16) & 0xffff);
int off;
uint32_t ph;
phys_addr_t paddr = CONFIG_SYS_CCSRBAR_PHYS + info->compat_offset;
+#ifndef CONFIG_SYS_FMAN_V3
u64 dtsec1_addr = (u64)CONFIG_SYS_CCSRBAR_PHYS +
CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET;
+#endif
off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
if (off == -FDT_ERR_NOTFOUND)
/* board code might have caused offset to change */
off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
+#ifndef CONFIG_SYS_FMAN_V3
/* Don't disable FM1-DTSEC1 MAC as its used for MDIO */
if (paddr != dtsec1_addr)
+#endif
fdt_status_disabled(blob, off); /* disable the MAC node */
/* disable the fsl,dpa-ethernet node that points to the MAC */
struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
u32 rcwsr13 = in_be32(&gur->rcwsr[13]);
- if (is_device_disabled(port)) {
- printf("%s:%d: port(%d) is disabled\n", __func__,
- __LINE__, port);
+ if (is_device_disabled(port))
return PHY_INTERFACE_MODE_NONE;
- }
if ((port == FM1_10GEC1) && (is_serdes_configured(XFI_FM1_MAC9)))
return PHY_INTERFACE_MODE_XGMII;
if (port == FM1_DTSEC3)
if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC1) ==
FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII) {
- printf("%s:%d: port(FM1_DTSEC3) is OK\n",
- __func__, __LINE__);
return PHY_INTERFACE_MODE_RGMII;
}
if (port == FM1_DTSEC4)
if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC2) ==
FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII) {
- printf("%s:%d: port(FM1_DTSEC4) is OK\n",
- __func__, __LINE__);
return PHY_INTERFACE_MODE_RGMII;
}
goto out;
}
- if (MC_VER_MAJOR != mc_ver_info.major) {
- printf("fsl-mc: ERROR: Firmware major version mismatch (found: %d, expected: %d)\n",
- mc_ver_info.major, MC_VER_MAJOR);
- printf("fsl-mc: Update the Management Complex firmware\n");
-
- error = -ENODEV;
- goto out;
- }
-
- if (MC_VER_MINOR != mc_ver_info.minor)
- printf("fsl-mc: WARNING: Firmware minor version mismatch (found: %d, expected: %d)\n",
- mc_ver_info.minor, MC_VER_MINOR);
-
printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
reg_gsr & GSR_FS_MASK);
--- /dev/null
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/rk3036_common.h>
+
+#endif
ifdef CONFIG_SPL_BUILD
# SPL U-Boot may use full-printf, tiny-printf or none at all
ifdef CONFIG_USE_TINY_PRINTF
-obj-$(CONFIG_SPL_SERIAL_SUPPORT) += tiny-printf.o
+obj-$(CONFIG_SPL_SERIAL_SUPPORT) += tiny-printf.o panic.o strto.o
else
-obj-$(CONFIG_SPL_SERIAL_SUPPORT) += vsprintf.o
+obj-$(CONFIG_SPL_SERIAL_SUPPORT) += vsprintf.o panic.o strto.o
endif
else
# Main U-Boot always uses the full printf support
-obj-y += vsprintf.o
+obj-y += vsprintf.o panic.o strto.o
endif
subdir-ccflags-$(CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED) += -O2
--- /dev/null
+/*
+ * linux/lib/vsprintf.c
+ *
+ * Copyright (C) 1991, 1992 Linus Torvalds
+ */
+
+/* vsprintf.c -- Lars Wirzenius & Linus Torvalds. */
+/*
+ * Wirzenius wrote this portably, Torvalds fucked it up :-)
+ */
+
+#include <common.h>
+#if !defined(CONFIG_PANIC_HANG)
+#include <command.h>
+#endif
+
+static void panic_finish(void) __attribute__ ((noreturn));
+
+static void panic_finish(void)
+{
+ putc('\n');
+#if defined(CONFIG_PANIC_HANG)
+ hang();
+#else
+ udelay(100000); /* allow messages to go out */
+ do_reset(NULL, 0, 0, NULL);
+#endif
+ while (1)
+ ;
+}
+
+void panic_str(const char *str)
+{
+ puts(str);
+ panic_finish();
+}
+
+void panic(const char *fmt, ...)
+{
+ va_list args;
+ va_start(args, fmt);
+ vprintf(fmt, args);
+ va_end(args);
+ panic_finish();
+}
--- /dev/null
+/*
+ * linux/lib/vsprintf.c
+ *
+ * Copyright (C) 1991, 1992 Linus Torvalds
+ */
+
+/* vsprintf.c -- Lars Wirzenius & Linus Torvalds. */
+/*
+ * Wirzenius wrote this portably, Torvalds fucked it up :-)
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <linux/ctype.h>
+
+unsigned long simple_strtoul(const char *cp, char **endp,
+ unsigned int base)
+{
+ unsigned long result = 0;
+ unsigned long value;
+
+ if (*cp == '0') {
+ cp++;
+ if ((*cp == 'x') && isxdigit(cp[1])) {
+ base = 16;
+ cp++;
+ }
+
+ if (!base)
+ base = 8;
+ }
+
+ if (!base)
+ base = 10;
+
+ while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
+ ? toupper(*cp) : *cp)-'A'+10) < base) {
+ result = result*base + value;
+ cp++;
+ }
+
+ if (endp)
+ *endp = (char *)cp;
+
+ return result;
+}
+
+int strict_strtoul(const char *cp, unsigned int base, unsigned long *res)
+{
+ char *tail;
+ unsigned long val;
+ size_t len;
+
+ *res = 0;
+ len = strlen(cp);
+ if (len == 0)
+ return -EINVAL;
+
+ val = simple_strtoul(cp, &tail, base);
+ if (tail == cp)
+ return -EINVAL;
+
+ if ((*tail == '\0') ||
+ ((len == (size_t)(tail - cp) + 1) && (*tail == '\n'))) {
+ *res = val;
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+long simple_strtol(const char *cp, char **endp, unsigned int base)
+{
+ if (*cp == '-')
+ return -simple_strtoul(cp + 1, endp, base);
+
+ return simple_strtoul(cp, endp, base);
+}
+
+unsigned long ustrtoul(const char *cp, char **endp, unsigned int base)
+{
+ unsigned long result = simple_strtoul(cp, endp, base);
+ switch (**endp) {
+ case 'G':
+ result *= 1024;
+ /* fall through */
+ case 'M':
+ result *= 1024;
+ /* fall through */
+ case 'K':
+ case 'k':
+ result *= 1024;
+ if ((*endp)[1] == 'i') {
+ if ((*endp)[2] == 'B')
+ (*endp) += 3;
+ else
+ (*endp) += 2;
+ }
+ }
+ return result;
+}
+
+unsigned long long ustrtoull(const char *cp, char **endp, unsigned int base)
+{
+ unsigned long long result = simple_strtoull(cp, endp, base);
+ switch (**endp) {
+ case 'G':
+ result *= 1024;
+ /* fall through */
+ case 'M':
+ result *= 1024;
+ /* fall through */
+ case 'K':
+ case 'k':
+ result *= 1024;
+ if ((*endp)[1] == 'i') {
+ if ((*endp)[2] == 'B')
+ (*endp) += 3;
+ else
+ (*endp) += 2;
+ }
+ }
+ return result;
+}
+
+unsigned long long simple_strtoull(const char *cp, char **endp,
+ unsigned int base)
+{
+ unsigned long long result = 0, value;
+
+ if (*cp == '0') {
+ cp++;
+ if ((*cp == 'x') && isxdigit(cp[1])) {
+ base = 16;
+ cp++;
+ }
+
+ if (!base)
+ base = 8;
+ }
+
+ if (!base)
+ base = 10;
+
+ while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp - '0'
+ : (islower(*cp) ? toupper(*cp) : *cp) - 'A' + 10) < base) {
+ result = result * base + value;
+ cp++;
+ }
+
+ if (endp)
+ *endp = (char *) cp;
+
+ return result;
+}
+
+long trailing_strtoln(const char *str, const char *end)
+{
+ const char *p;
+
+ if (!end)
+ end = str + strlen(str);
+ for (p = end - 1; p > str; p--) {
+ if (!isdigit(*p))
+ return simple_strtoul(p + 1, NULL, 10);
+ }
+
+ return -1;
+}
+
+long trailing_strtol(const char *str)
+{
+ return trailing_strtoln(str, NULL);
+}
out_dgt(dgt);
}
-int printf(const char *fmt, ...)
+int vprintf(const char *fmt, va_list va)
{
- va_list va;
char ch;
char *p;
unsigned int num;
char buf[12];
unsigned int div;
- va_start(va, fmt);
-
while ((ch = *(fmt++))) {
if (ch != '%') {
putc(ch);
}
abort:
- va_end(va);
return 0;
}
+
+int printf(const char *fmt, ...)
+{
+ va_list va;
+ int ret;
+
+ va_start(va, fmt);
+ ret = vprintf(fmt, va);
+ va_end(va);
+
+ return ret;
+}
#include <linux/types.h>
#include <linux/string.h>
#include <linux/ctype.h>
-#include <errno.h>
#include <common.h>
-#if !defined(CONFIG_PANIC_HANG)
-#include <command.h>
-#endif
#include <div64.h>
#define noinline __attribute__((noinline))
-unsigned long simple_strtoul(const char *cp, char **endp,
- unsigned int base)
-{
- unsigned long result = 0;
- unsigned long value;
-
- if (*cp == '0') {
- cp++;
- if ((*cp == 'x') && isxdigit(cp[1])) {
- base = 16;
- cp++;
- }
-
- if (!base)
- base = 8;
- }
-
- if (!base)
- base = 10;
-
- while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
- ? toupper(*cp) : *cp)-'A'+10) < base) {
- result = result*base + value;
- cp++;
- }
-
- if (endp)
- *endp = (char *)cp;
-
- return result;
-}
-
-int strict_strtoul(const char *cp, unsigned int base, unsigned long *res)
-{
- char *tail;
- unsigned long val;
- size_t len;
-
- *res = 0;
- len = strlen(cp);
- if (len == 0)
- return -EINVAL;
-
- val = simple_strtoul(cp, &tail, base);
- if (tail == cp)
- return -EINVAL;
-
- if ((*tail == '\0') ||
- ((len == (size_t)(tail - cp) + 1) && (*tail == '\n'))) {
- *res = val;
- return 0;
- }
-
- return -EINVAL;
-}
-
-long simple_strtol(const char *cp, char **endp, unsigned int base)
-{
- if (*cp == '-')
- return -simple_strtoul(cp + 1, endp, base);
-
- return simple_strtoul(cp, endp, base);
-}
-
-unsigned long ustrtoul(const char *cp, char **endp, unsigned int base)
-{
- unsigned long result = simple_strtoul(cp, endp, base);
- switch (**endp) {
- case 'G':
- result *= 1024;
- /* fall through */
- case 'M':
- result *= 1024;
- /* fall through */
- case 'K':
- case 'k':
- result *= 1024;
- if ((*endp)[1] == 'i') {
- if ((*endp)[2] == 'B')
- (*endp) += 3;
- else
- (*endp) += 2;
- }
- }
- return result;
-}
-
-unsigned long long ustrtoull(const char *cp, char **endp, unsigned int base)
-{
- unsigned long long result = simple_strtoull(cp, endp, base);
- switch (**endp) {
- case 'G':
- result *= 1024;
- /* fall through */
- case 'M':
- result *= 1024;
- /* fall through */
- case 'K':
- case 'k':
- result *= 1024;
- if ((*endp)[1] == 'i') {
- if ((*endp)[2] == 'B')
- (*endp) += 3;
- else
- (*endp) += 2;
- }
- }
- return result;
-}
-
-unsigned long long simple_strtoull(const char *cp, char **endp,
- unsigned int base)
-{
- unsigned long long result = 0, value;
-
- if (*cp == '0') {
- cp++;
- if ((*cp == 'x') && isxdigit(cp[1])) {
- base = 16;
- cp++;
- }
-
- if (!base)
- base = 8;
- }
-
- if (!base)
- base = 10;
-
- while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp - '0'
- : (islower(*cp) ? toupper(*cp) : *cp) - 'A' + 10) < base) {
- result = result * base + value;
- cp++;
- }
-
- if (endp)
- *endp = (char *) cp;
-
- return result;
-}
-
-long trailing_strtoln(const char *str, const char *end)
-{
- const char *p;
-
- if (!end)
- end = str + strlen(str);
- for (p = end - 1; p > str; p--) {
- if (!isdigit(*p))
- return simple_strtoul(p + 1, NULL, 10);
- }
-
- return -1;
-}
-
-long trailing_strtol(const char *str)
-{
- return trailing_strtoln(str, NULL);
-}
-
/* we use this so that we can do without the ctype library */
#define is_digit(c) ((c) >= '0' && (c) <= '9')
return i;
}
-static void panic_finish(void) __attribute__ ((noreturn));
-
-static void panic_finish(void)
-{
- putc('\n');
-#if defined(CONFIG_PANIC_HANG)
- hang();
-#else
- udelay(100000); /* allow messages to go out */
- do_reset(NULL, 0, 0, NULL);
-#endif
- while (1)
- ;
-}
-
-void panic_str(const char *str)
-{
- puts(str);
- panic_finish();
-}
-
-void panic(const char *fmt, ...)
-{
- va_list args;
- va_start(args, fmt);
- vprintf(fmt, args);
- va_end(args);
- panic_finish();
-}
void __assert_fail(const char *assertion, const char *file, unsigned line,
const char *function)
rsa-sign.o rsa-verify.o rsa-checksum.o \
rsa-mod-exp.o)
-ROCKCHIP_OBS = $(if $(CONFIG_ARCH_ROCKCHIP),lib/rc4.o rkcommon.o rkimage.o rksd.o,)
+ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o
# common objs for dumpimage and mkimage
dumpimage-mkimage-objs := aisimage.o \
# TODO(sjg@chromium.org): Is this correct on Mac OS?
-ifneq ($(CONFIG_ARCH_ROCKCHIP),)
-HOST_EXTRACFLAGS += \
- -DCONFIG_ROCKCHIP_MAX_SPL_SIZE=$(CONFIG_ROCKCHIP_MAX_SPL_SIZE) \
- -DCONFIG_ROCKCHIP_SPL_HDR="\"$(CONFIG_ROCKCHIP_SPL_HDR)\""
-endif
-
ifneq ($(CONFIG_MX23)$(CONFIG_MX28),)
# Add CONFIG_MXS into host CFLAGS, so we can check whether or not register
# the mxsimage support within tools/mxsimage.c .
uint8_t reserved2[2];
};
+/**
+ * struct spl_info - spl info for each chip
+ *
+ * @imagename: Image name(passed by "mkimage -n")
+ * @spl_hdr: Boot ROM requires a 4-bytes spl header
+ * @spl_size: Spl size(include extra 4-bytes spl header)
+ */
+struct spl_info {
+ const char *imagename;
+ const char *spl_hdr;
+ const uint32_t spl_size;
+};
+
+static struct spl_info spl_infos[] = {
+ { "rk3036", "RK30", 0x1000 },
+ { "rk3288", "RK32", 0x8000 },
+};
+
static unsigned char rc4_key[16] = {
124, 78, 3, 4, 85, 5, 9, 7,
45, 44, 123, 56, 23, 13, 23, 17
};
-int rkcommon_set_header(void *buf, uint file_size)
+static struct spl_info *rkcommon_get_spl_info(char *imagename)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(spl_infos); i++)
+ if (!strncmp(imagename, spl_infos[i].imagename, 6))
+ return spl_infos + i;
+
+ return NULL;
+}
+
+int rkcommon_check_params(struct image_tool_params *params)
+{
+ int i;
+
+ if (rkcommon_get_spl_info(params->imagename) != NULL)
+ return 0;
+
+ fprintf(stderr, "ERROR: imagename (%s) is not supported!\n",
+ strlen(params->imagename) > 0 ? params->imagename : "NULL");
+
+ fprintf(stderr, "Available imagename:");
+ for (i = 0; i < ARRAY_SIZE(spl_infos); i++)
+ fprintf(stderr, "\t%s", spl_infos[i].imagename);
+ fprintf(stderr, "\n");
+
+ return -1;
+}
+
+const char *rkcommon_get_spl_hdr(struct image_tool_params *params)
+{
+ struct spl_info *info = rkcommon_get_spl_info(params->imagename);
+
+ /*
+ * info would not be NULL, because of we checked params before.
+ */
+ return info->spl_hdr;
+}
+
+int rkcommon_get_spl_size(struct image_tool_params *params)
+{
+ struct spl_info *info = rkcommon_get_spl_info(params->imagename);
+
+ /*
+ * info would not be NULL, because of we checked params before.
+ */
+ return info->spl_size;
+}
+
+int rkcommon_set_header(void *buf, uint file_size,
+ struct image_tool_params *params)
{
struct header0_info *hdr;
- if (file_size > CONFIG_ROCKCHIP_MAX_SPL_SIZE)
+ if (file_size > rkcommon_get_spl_size(params))
return -ENOSPC;
memset(buf, '\0', RK_INIT_OFFSET * RK_BLK_SIZE);
RK_BLK_SIZE = 512,
RK_INIT_OFFSET = 4,
RK_MAX_BOOT_SIZE = 512 << 10,
+ RK_SPL_HDR_START = RK_INIT_OFFSET * RK_BLK_SIZE,
+ RK_SPL_HDR_SIZE = 4,
+ RK_SPL_START = RK_SPL_HDR_START + RK_SPL_HDR_SIZE,
+ RK_IMAGE_HEADER_LEN = RK_SPL_START,
};
+/**
+ * rkcommon_check_params() - check params
+ *
+ * @return 0 if OK, -1 if ERROR.
+ */
+int rkcommon_check_params(struct image_tool_params *params);
+
+/**
+ * rkcommon_get_spl_hdr() - get 4-bytes spl hdr for a Rockchip boot image
+ *
+ * Rockchip's bootrom requires the spl loader to start with a 4-bytes
+ * header. The content of this header depends on the chip type.
+ */
+const char *rkcommon_get_spl_hdr(struct image_tool_params *params);
+
+/**
+ * rkcommon_get_spl_size() - get spl size for a Rockchip boot image
+ *
+ * Different chip may have different sram size. And if we want to jump
+ * back to the bootrom after spl, we may need to reserve some sram space
+ * for the bootrom.
+ * The spl loader size should be sram size minus reserved size(if needed)
+ */
+int rkcommon_get_spl_size(struct image_tool_params *params);
+
/**
* rkcommon_set_header() - set up the header for a Rockchip boot image
*
* @file_size: Size of the file we want the boot ROM to load, in bytes
* @return 0 if OK, -ENOSPC if too large
*/
-int rkcommon_set_header(void *buf, uint file_size);
+int rkcommon_set_header(void *buf, uint file_size,
+ struct image_tool_params *params);
#endif
#include "imagetool.h"
#include <image.h>
+#include "rkcommon.h"
static uint32_t header;
static void rkimage_set_header(void *buf, struct stat *sbuf, int ifd,
struct image_tool_params *params)
{
- memcpy(buf, CONFIG_ROCKCHIP_SPL_HDR, 4);
+ memcpy(buf + RK_SPL_HDR_START, rkcommon_get_spl_hdr(params),
+ RK_SPL_HDR_SIZE);
}
static int rkimage_extract_subimage(void *buf, struct image_tool_params *params)
#include "mkimage.h"
#include "rkcommon.h"
-enum {
- RKSD_SPL_HDR_START = RK_INIT_OFFSET * RK_BLK_SIZE,
- RKSD_SPL_START = RKSD_SPL_HDR_START + 4,
- RKSD_HEADER_LEN = RKSD_SPL_START,
-};
-
-static char dummy_hdr[RKSD_HEADER_LEN];
-
-static int rksd_check_params(struct image_tool_params *params)
-{
- return 0;
-}
+static char dummy_hdr[RK_IMAGE_HEADER_LEN];
static int rksd_verify_header(unsigned char *buf, int size,
struct image_tool_params *params)
unsigned int size;
int ret;
- size = params->file_size - RKSD_SPL_HDR_START;
- ret = rkcommon_set_header(buf, size);
+ size = params->file_size - RK_SPL_HDR_START;
+ ret = rkcommon_set_header(buf, size, params);
if (ret) {
/* TODO(sjg@chromium.org): This method should return an error */
printf("Warning: SPL image is too large (size %#x) and will not boot\n",
size);
}
- memcpy(buf + RKSD_SPL_HDR_START, CONFIG_ROCKCHIP_SPL_HDR, 4);
+ memcpy(buf + RK_SPL_HDR_START, rkcommon_get_spl_hdr(params),
+ RK_SPL_HDR_SIZE);
}
static int rksd_extract_subimage(void *buf, struct image_tool_params *params)
{
int pad_size;
- pad_size = RKSD_SPL_HDR_START + CONFIG_ROCKCHIP_MAX_SPL_SIZE;
+ pad_size = RK_SPL_HDR_START + rkcommon_get_spl_size(params);
debug("pad_size %x\n", pad_size);
return pad_size - params->file_size;
U_BOOT_IMAGE_TYPE(
rksd,
"Rockchip SD Boot Image support",
- RKSD_HEADER_LEN,
+ RK_IMAGE_HEADER_LEN,
dummy_hdr,
- rksd_check_params,
+ rkcommon_check_params,
rksd_verify_header,
rksd_print_header,
rksd_set_header,
#include "rkcommon.h"
enum {
- RKSPI_SPL_HDR_START = RK_INIT_OFFSET * RK_BLK_SIZE,
- RKSPI_SPL_START = RKSPI_SPL_HDR_START + 4,
- RKSPI_HEADER_LEN = RKSPI_SPL_START,
RKSPI_SECT_LEN = RK_BLK_SIZE * 4,
};
-static char dummy_hdr[RKSPI_HEADER_LEN];
-
-static int rkspi_check_params(struct image_tool_params *params)
-{
- return 0;
-}
+static char dummy_hdr[RK_IMAGE_HEADER_LEN];
static int rkspi_verify_header(unsigned char *buf, int size,
struct image_tool_params *params)
int ret;
size = params->orig_file_size;
- ret = rkcommon_set_header(buf, size);
+ ret = rkcommon_set_header(buf, size, params);
debug("size %x\n", size);
if (ret) {
/* TODO(sjg@chromium.org): This method should return an error */
size);
}
- memcpy(buf + RKSPI_SPL_HDR_START, CONFIG_ROCKCHIP_SPL_HDR, 4);
+ memcpy(buf + RK_SPL_HDR_START, rkcommon_get_spl_hdr(params),
+ RK_SPL_HDR_SIZE);
/*
* Spread the image out so we only use the first 2KB of each 4KB
{
int pad_size;
- pad_size = (CONFIG_ROCKCHIP_MAX_SPL_SIZE + 0x7ff) / 0x800 * 0x800;
+ pad_size = (rkcommon_get_spl_size(params) + 0x7ff) / 0x800 * 0x800;
params->orig_file_size = pad_size;
/* We will double the image size due to the SPI format */
pad_size *= 2;
- pad_size += RKSPI_SPL_HDR_START;
+ pad_size += RK_SPL_HDR_START;
debug("pad_size %x\n", pad_size);
return pad_size - params->file_size;
U_BOOT_IMAGE_TYPE(
rkspi,
"Rockchip SPI Boot Image support",
- RKSPI_HEADER_LEN,
+ RK_IMAGE_HEADER_LEN,
dummy_hdr,
- rkspi_check_params,
+ rkcommon_check_params,
rkspi_verify_header,
rkspi_print_header,
rkspi_set_header,
projects / oweals / u-boot.git / commitdiff