armv8: lx2160a: Add LX2160A SoC Support
authorPriyanka Jain <priyanka.jain@nxp.com>
Mon, 29 Oct 2018 09:17:09 +0000 (09:17 +0000)
committerYork Sun <york.sun@nxp.com>
Thu, 6 Dec 2018 22:37:19 +0000 (14:37 -0800)
commit4909b89ec763f0c7030fa8474f9b6c5df866b01f
tree4e2258c0a30e5576116e258d5597aa7168a1facb
parentd6fdec211f7913c97917ba262fa257fdcb6b000e
armv8: lx2160a: Add LX2160A SoC Support

LX2160A Soc is based on Layerscape Chassis Generation 3.2
architecture with features:
 16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC,
 2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers,
 3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs,
 4 TZASC instances, etc.

SoC personalites:
LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs
LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs

Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
16 files changed:
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
arch/arm/cpu/armv8/fsl-layerscape/Makefile
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c [new file with mode: 0644]
arch/arm/dts/fsl-lx2160a.dtsi [new file with mode: 0644]
arch/arm/include/asm/arch-fsl-layerscape/config.h
arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
arch/arm/include/asm/arch-fsl-layerscape/soc.h
arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
drivers/ddr/fsl/Kconfig
drivers/net/ldpaa_eth/Makefile
drivers/net/ldpaa_eth/lx2160a.c [new file with mode: 0644]