include/dt-bindings/clock/r8a7791-clock.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Copyright 2013 Ideas On Board SPRL
   4  */
   5
   6 #ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
   7 #define __DT_BINDINGS_CLOCK_R8A7791_H__
   8
   9 /* CPG */
  10 #define R8A7791_CLK_MAIN                0
  11 #define R8A7791_CLK_PLL0                1
  12 #define R8A7791_CLK_PLL1                2
  13 #define R8A7791_CLK_PLL3                3
  14 #define R8A7791_CLK_LB                  4
  15 #define R8A7791_CLK_QSPI                5
  16 #define R8A7791_CLK_SDH                 6
  17 #define R8A7791_CLK_SD0                 7
  18 #define R8A7791_CLK_Z                   8
  19 #define R8A7791_CLK_RCAN                9
  20 #define R8A7791_CLK_ADSP                10
  21
  22 /* MSTP0 */
  23 #define R8A7791_CLK_MSIOF0              0
  24
  25 /* MSTP1 */
  26 #define R8A7791_CLK_VCP0                1
  27 #define R8A7791_CLK_VPC0                3
  28 #define R8A7791_CLK_JPU                 6
  29 #define R8A7791_CLK_SSP1                9
  30 #define R8A7791_CLK_TMU1                11
  31 #define R8A7791_CLK_3DG                 12
  32 #define R8A7791_CLK_2DDMAC              15
  33 #define R8A7791_CLK_FDP1_1              18
  34 #define R8A7791_CLK_FDP1_0              19
  35 #define R8A7791_CLK_TMU3                21
  36 #define R8A7791_CLK_TMU2                22
  37 #define R8A7791_CLK_CMT0                24
  38 #define R8A7791_CLK_TMU0                25
  39 #define R8A7791_CLK_VSP1_DU1            27
  40 #define R8A7791_CLK_VSP1_DU0            28
  41 #define R8A7791_CLK_VSP1_S              31
  42
  43 /* MSTP2 */
  44 #define R8A7791_CLK_SCIFA2              2
  45 #define R8A7791_CLK_SCIFA1              3
  46 #define R8A7791_CLK_SCIFA0              4
  47 #define R8A7791_CLK_MSIOF2              5
  48 #define R8A7791_CLK_SCIFB0              6
  49 #define R8A7791_CLK_SCIFB1              7
  50 #define R8A7791_CLK_MSIOF1              8
  51 #define R8A7791_CLK_SCIFB2              16
  52 #define R8A7791_CLK_SYS_DMAC1           18
  53 #define R8A7791_CLK_SYS_DMAC0           19
  54
  55 /* MSTP3 */
  56 #define R8A7791_CLK_TPU0                4
  57 #define R8A7791_CLK_SDHI2               11
  58 #define R8A7791_CLK_SDHI1               12
  59 #define R8A7791_CLK_SDHI0               14
  60 #define R8A7791_CLK_MMCIF0              15
  61 #define R8A7791_CLK_IIC0                18
  62 #define R8A7791_CLK_PCIEC               19
  63 #define R8A7791_CLK_IIC1                23
  64 #define R8A7791_CLK_SSUSB               28
  65 #define R8A7791_CLK_CMT1                29
  66 #define R8A7791_CLK_USBDMAC0            30
  67 #define R8A7791_CLK_USBDMAC1            31
  68
  69 /* MSTP4 */
  70 #define R8A7791_CLK_IRQC                7
  71 #define R8A7791_CLK_INTC_SYS            8
  72
  73 /* MSTP5 */
  74 #define R8A7791_CLK_AUDIO_DMAC1         1
  75 #define R8A7791_CLK_AUDIO_DMAC0         2
  76 #define R8A7791_CLK_ADSP_MOD            6
  77 #define R8A7791_CLK_THERMAL             22
  78 #define R8A7791_CLK_PWM                 23
  79
  80 /* MSTP7 */
  81 #define R8A7791_CLK_EHCI                3
  82 #define R8A7791_CLK_HSUSB               4
  83 #define R8A7791_CLK_HSCIF2              13
  84 #define R8A7791_CLK_SCIF5               14
  85 #define R8A7791_CLK_SCIF4               15
  86 #define R8A7791_CLK_HSCIF1              16
  87 #define R8A7791_CLK_HSCIF0              17
  88 #define R8A7791_CLK_SCIF3               18
  89 #define R8A7791_CLK_SCIF2               19
  90 #define R8A7791_CLK_SCIF1               20
  91 #define R8A7791_CLK_SCIF0               21
  92 #define R8A7791_CLK_DU1                 23
  93 #define R8A7791_CLK_DU0                 24
  94 #define R8A7791_CLK_LVDS0               26
  95
  96 /* MSTP8 */
  97 #define R8A7791_CLK_IPMMU_SGX           0
  98 #define R8A7791_CLK_MLB                 2
  99 #define R8A7791_CLK_VIN2                9
 100 #define R8A7791_CLK_VIN1                10
 101 #define R8A7791_CLK_VIN0                11
 102 #define R8A7791_CLK_ETHERAVB            12
 103 #define R8A7791_CLK_ETHER               13
 104 #define R8A7791_CLK_SATA1               14
 105 #define R8A7791_CLK_SATA0               15
 106
 107 /* MSTP9 */
 108 #define R8A7791_CLK_GYROADC             1
 109 #define R8A7791_CLK_GPIO7               4
 110 #define R8A7791_CLK_GPIO6               5
 111 #define R8A7791_CLK_GPIO5               7
 112 #define R8A7791_CLK_GPIO4               8
 113 #define R8A7791_CLK_GPIO3               9
 114 #define R8A7791_CLK_GPIO2               10
 115 #define R8A7791_CLK_GPIO1               11
 116 #define R8A7791_CLK_GPIO0               12
 117 #define R8A7791_CLK_RCAN1               15
 118 #define R8A7791_CLK_RCAN0               16
 119 #define R8A7791_CLK_QSPI_MOD            17
 120 #define R8A7791_CLK_I2C5                25
 121 #define R8A7791_CLK_IICDVFS             26
 122 #define R8A7791_CLK_I2C4                27
 123 #define R8A7791_CLK_I2C3                28
 124 #define R8A7791_CLK_I2C2                29
 125 #define R8A7791_CLK_I2C1                30
 126 #define R8A7791_CLK_I2C0                31
 127
 128 /* MSTP10 */
 129 #define R8A7791_CLK_SSI_ALL             5
 130 #define R8A7791_CLK_SSI9                6
 131 #define R8A7791_CLK_SSI8                7
 132 #define R8A7791_CLK_SSI7                8
 133 #define R8A7791_CLK_SSI6                9
 134 #define R8A7791_CLK_SSI5                10
 135 #define R8A7791_CLK_SSI4                11
 136 #define R8A7791_CLK_SSI3                12
 137 #define R8A7791_CLK_SSI2                13
 138 #define R8A7791_CLK_SSI1                14
 139 #define R8A7791_CLK_SSI0                15
 140 #define R8A7791_CLK_SCU_ALL             17
 141 #define R8A7791_CLK_SCU_DVC1            18
 142 #define R8A7791_CLK_SCU_DVC0            19
 143 #define R8A7791_CLK_SCU_CTU1_MIX1       20
 144 #define R8A7791_CLK_SCU_CTU0_MIX0       21
 145 #define R8A7791_CLK_SCU_SRC9            22
 146 #define R8A7791_CLK_SCU_SRC8            23
 147 #define R8A7791_CLK_SCU_SRC7            24
 148 #define R8A7791_CLK_SCU_SRC6            25
 149 #define R8A7791_CLK_SCU_SRC5            26
 150 #define R8A7791_CLK_SCU_SRC4            27
 151 #define R8A7791_CLK_SCU_SRC3            28
 152 #define R8A7791_CLK_SCU_SRC2            29
 153 #define R8A7791_CLK_SCU_SRC1            30
 154 #define R8A7791_CLK_SCU_SRC0            31
 155
 156 /* MSTP11 */
 157 #define R8A7791_CLK_SCIFA3              6
 158 #define R8A7791_CLK_SCIFA4              7
 159 #define R8A7791_CLK_SCIFA5              8
 160
 161 #endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */