include/configs/tam3517-common.h

   1 /*
   2  * Copyright (C) 2011
   3  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
   4  *
   5  * Copyright (C) 2009 TechNexion Ltd.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __TAM3517_H
  11 #define __TAM3517_H
  12
  13 /*
  14  * High Level Configuration Options
  15  */
  16 #define CONFIG_OMAP             /* in a TI OMAP core */
  17 #define CONFIG_OMAP_GPIO
  18 #define CONFIG_OMAP_COMMON
  19 /* Common ARM Erratas */
  20 #define CONFIG_ARM_ERRATA_454179
  21 #define CONFIG_ARM_ERRATA_430973
  22 #define CONFIG_ARM_ERRATA_621766
  23
  24 #define CONFIG_SYS_TEXT_BASE 0x80008000
  25
  26 #define CONFIG_SYS_CACHELINE_SIZE       64
  27
  28 #define CONFIG_EMIF4    /* The chip has EMIF4 controller */
  29
  30 #include <asm/arch/cpu.h>               /* get chip and board defs */
  31 #include <asm/arch/omap.h>
  32
  33 /*
  34  * Display CPU and Board information
  35  */
  36 #define CONFIG_DISPLAY_CPUINFO
  37 #define CONFIG_DISPLAY_BOARDINFO
  38
  39 /* Clock Defines */
  40 #define V_OSCK                  26000000        /* Clock output from T2 */
  41 #define V_SCLK                  (V_OSCK >> 1)
  42
  43 #define CONFIG_MISC_INIT_R
  44
  45 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  46 #define CONFIG_SETUP_MEMORY_TAGS
  47 #define CONFIG_INITRD_TAG
  48 #define CONFIG_REVISION_TAG
  49
  50 /*
  51  * Size of malloc() pool
  52  */
  53 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB sector */
  54 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10) + \
  55                                         2 * 1024 * 1024)
  56 /*
  57  * DDR related
  58  */
  59 #define CONFIG_OMAP3_MICRON_DDR         /* Micron DDR */
  60 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
  61
  62 /*
  63  * Hardware drivers
  64  */
  65
  66 /*
  67  * NS16550 Configuration
  68  */
  69 #define CONFIG_SYS_NS16550_SERIAL
  70 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  71 #define CONFIG_SYS_NS16550_CLK          48000000        /* 48MHz (APLL96/2) */
  72
  73 /*
  74  * select serial console configuration
  75  */
  76 #define CONFIG_CONS_INDEX               1
  77 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
  78 #define CONFIG_SERIAL1                  /* UART1 */
  79
  80 /* allow to overwrite serial and ethaddr */
  81 #define CONFIG_ENV_OVERWRITE
  82 #define CONFIG_BAUDRATE                 115200
  83 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  84                                         115200}
  85 #define CONFIG_MMC
  86 #define CONFIG_OMAP_HSMMC
  87 #define CONFIG_GENERIC_MMC
  88 #define CONFIG_DOS_PARTITION
  89
  90 /* EHCI */
  91 #define CONFIG_OMAP3_GPIO_5
  92 #define CONFIG_USB_EHCI
  93 #define CONFIG_USB_EHCI_OMAP
  94 #define CONFIG_USB_ULPI
  95 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
  96 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO        25
  97 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
  98 #define CONFIG_USB_STORAGE
  99
 100 /* commands to include */
 101 #define CONFIG_CMD_CACHE
 102 #define CONFIG_CMD_DHCP
 103 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 104 #define CONFIG_CMD_FAT          /* FAT support                  */
 105 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 106 #define CONFIG_CMD_MII
 107 #define CONFIG_CMD_MMC          /* MMC support                  */
 108 #define CONFIG_CMD_NAND         /* NAND support                 */
 109 #define CONFIG_CMD_PING
 110 #define CONFIG_CMD_USB
 111 #define CONFIG_CMD_EEPROM
 112
 113 #define CONFIG_SYS_NO_FLASH
 114 #define CONFIG_SYS_I2C
 115 #define CONFIG_SYS_OMAP24_I2C_SPEED     400000
 116 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 117 #define CONFIG_SYS_I2C_OMAP34XX
 118 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50            /* base address */
 119 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1               /* bytes of address */
 120 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW     0x07
 121
 122 /*
 123  * Board NAND Info.
 124  */
 125 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 126                                                         /* to access */
 127                                                         /* nand at CS0 */
 128
 129 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
 130                                                         /* NAND devices */
 131
 132 #define CONFIG_AUTO_COMPLETE
 133
 134 /*
 135  * Miscellaneous configurable options
 136  */
 137 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 138 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 139 #define CONFIG_CMDLINE_EDITING
 140 #define CONFIG_AUTO_COMPLETE
 141 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 142
 143 /* Print Buffer Size */
 144 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 145                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 146 #define CONFIG_SYS_MAXARGS              32      /* max number of command */
 147                                                 /* args */
 148 /* Boot Argument Buffer Size */
 149 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 150 /* memtest works on */
 151 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 152 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 153                                         0x01F00000) /* 31MB */
 154
 155 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 156                                                                 /* address */
 157
 158 /*
 159  * AM3517 has 12 GP timers, they can be driven by the system clock
 160  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 161  * This rate is divided by a local divisor.
 162  */
 163 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 164 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 165
 166 /*
 167  * Physical Memory Map
 168  */
 169 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 170 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 171 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 172
 173 /*
 174  * FLASH and environment organization
 175  */
 176
 177 /* **** PISMO SUPPORT *** */
 178 #define CONFIG_NAND
 179 #define CONFIG_NAND_OMAP_GPMC
 180 #define CONFIG_ENV_IS_IN_NAND
 181 #define SMNAND_ENV_OFFSET               0x180000 /* environment starts here */
 182
 183 /* Redundant Environment */
 184 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 185 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 186 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 187 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + \
 188                                                 2 * CONFIG_SYS_ENV_SECT_SIZE)
 189 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 190
 191 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 192 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 193 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 194 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 195                                          CONFIG_SYS_INIT_RAM_SIZE - \
 196                                          GENERATED_GBL_DATA_SIZE)
 197
 198 /*
 199  * ethernet support, EMAC
 200  *
 201  */
 202 #define CONFIG_DRIVER_TI_EMAC
 203 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 204 #define CONFIG_MII
 205 #define CONFIG_EMAC_MDIO_PHY_NUM        0
 206 #define CONFIG_BOOTP_DNS
 207 #define CONFIG_BOOTP_DNS2
 208 #define CONFIG_BOOTP_SEND_HOSTNAME
 209 #define CONFIG_NET_RETRY_COUNT 10
 210
 211 /* Defines for SPL */
 212 #define CONFIG_SPL_FRAMEWORK
 213 #define CONFIG_SPL_BOARD_INIT
 214 #define CONFIG_SPL_CONSOLE
 215 #define CONFIG_SPL_NAND_SIMPLE
 216 #define CONFIG_SPL_NAND_SOFTECC
 217 #define CONFIG_SPL_NAND_WORKSPACE       0x8f07f000 /* below BSS */
 218
 219 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 220 #define CONFIG_SPL_LIBDISK_SUPPORT
 221 #define CONFIG_SPL_I2C_SUPPORT
 222 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 223 #define CONFIG_SPL_SERIAL_SUPPORT
 224 #define CONFIG_SPL_GPIO_SUPPORT
 225 #define CONFIG_SPL_POWER_SUPPORT
 226 #define CONFIG_SPL_NAND_SUPPORT
 227 #define CONFIG_SPL_NAND_BASE
 228 #define CONFIG_SPL_NAND_DRIVERS
 229 #define CONFIG_SPL_NAND_ECC
 230 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 231
 232 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
 233 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
 234
 235 #define CONFIG_SYS_SPL_MALLOC_START     0x8f000000
 236 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 237 #define CONFIG_SPL_BSS_START_ADDR       0x8f080000 /* end of RAM */
 238 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 239
 240 /* NAND boot config */
 241 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 242 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 243 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 244 #define CONFIG_SYS_NAND_OOBSIZE         64
 245 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 246 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 247 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 248 #define CONFIG_SYS_NAND_ECCPOS          {40, 41, 42, 43, 44, 45, 46, 47,\
 249                                          48, 49, 50, 51, 52, 53, 54, 55,\
 250                                          56, 57, 58, 59, 60, 61, 62, 63}
 251 #define CONFIG_SYS_NAND_ECCSIZE         256
 252 #define CONFIG_SYS_NAND_ECCBYTES        3
 253 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_SW
 254 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
 255
 256 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 257
 258 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 259 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x80000
 260
 261 #define CONFIG_OF_LIBFDT
 262 #define CONFIG_FIT
 263 #define CONFIG_CMD_UBI
 264 #define CONFIG_CMD_UBIFS
 265 #define CONFIG_RBTREE
 266 #define CONFIG_LZO
 267 #define CONFIG_MTD_PARTITIONS
 268 #define CONFIG_MTD_DEVICE
 269 #define CONFIG_CMD_MTDPARTS
 270
 271 /* Setup MTD for NAND on the SOM */
 272 #define MTDIDS_DEFAULT          "nand0=omap2-nand.0"
 273 #define MTDPARTS_DEFAULT        "mtdparts=omap2-nand.0:512k(MLO)," \
 274                                 "1m(u-boot),256k(env1)," \
 275                                 "256k(env2),6m(kernel),-(rootfs)"
 276
 277 #define CONFIG_TAM3517_SETTINGS                                         \
 278         "netdev=eth0\0"                                                 \
 279         "nandargs=setenv bootargs root=${nandroot} "                    \
 280                 "rootfstype=${nandrootfstype}\0"                        \
 281         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 282                 "nfsroot=${serverip}:${rootpath}\0"                     \
 283         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 284         "addip_sta=setenv bootargs ${bootargs} "                        \
 285                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 286                 ":${hostname}:${netdev}:off panic=1\0"                  \
 287         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
 288         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
 289                 "else run addip_sta;fi\0"                               \
 290         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 291         "addtty=setenv bootargs ${bootargs}"                            \
 292                 " console=ttyO0,${baudrate}\0"                          \
 293         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
 294         "loadaddr=82000000\0"                                           \
 295         "kernel_addr_r=82000000\0"                                      \
 296         "hostname=" __stringify(CONFIG_HOSTNAME) "\0"                   \
 297         "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
 298         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
 299                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 300         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
 301                 "bootm ${kernel_addr}\0"                                \
 302         "nandboot=run nandargs addip addtty addmtd addmisc;"            \
 303                 "nand read ${kernel_addr_r} kernel\0"                   \
 304                 "bootm ${kernel_addr_r}\0"                              \
 305         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
 306                 "run nfsargs addip addtty addmtd addmisc;"              \
 307                 "bootm ${kernel_addr_r}\0"                              \
 308         "net_self=if run net_self_load;then "                           \
 309                 "run ramargs addip addtty addmtd addmisc;"              \
 310                 "bootm ${kernel_addr_r} ${ramdisk_addr_r};"             \
 311                 "else echo Images not loades;fi\0"                      \
 312         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0"          \
 313         "load=tftp ${loadaddr} ${u-boot}\0"                             \
 314         "loadmlo=tftp ${loadaddr} ${mlo}\0"                             \
 315         "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0"                    \
 316         "uboot_addr=0x80000\0"                                          \
 317         "update=nandecc sw;nand erase ${uboot_addr} 100000;"            \
 318                 "nand write ${loadaddr} ${uboot_addr} 80000\0"          \
 319         "updatemlo=nandecc hw;nand erase 0 20000;"                      \
 320                 "nand write ${loadaddr} 0 20000\0"                      \
 321         "upd=if run load;then echo Updating u-boot;if run update;"      \
 322                 "then echo U-Boot updated;"                             \
 323                         "else echo Error updating u-boot !;"            \
 324                         "echo Board without bootloader !!;"             \
 325                 "fi;"                                                   \
 326                 "else echo U-Boot not downloaded..exiting;fi\0"         \
 327
 328
 329 /*
 330  * this is common code for all TAM3517 boards.
 331  * MAC address is stored from manufacturer in
 332  * I2C EEPROM
 333  */
 334 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 335 /*
 336  * The I2C EEPROM on the TAM3517 contains
 337  * mac address and production data
 338  */
 339 struct tam3517_module_info {
 340         char customer[48];
 341         char product[48];
 342
 343         /*
 344          * bit 0~47  : sequence number
 345          * bit 48~55 : week of year, from 0.
 346          * bit 56~63 : year
 347          */
 348         unsigned long long sequence_number;
 349
 350         /*
 351          * bit 0~7   : revision fixed
 352          * bit 8~15  : revision major
 353          * bit 16~31 : TNxxx
 354          */
 355         unsigned int revision;
 356         unsigned char eth_addr[4][8];
 357         unsigned char _rev[100];
 358 };
 359
 360 #define TAM3517_READ_EEPROM(info, ret) \
 361 do {                                                            \
 362         i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
 363         if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,          \
 364                 (void *)info, sizeof(*info)))                   \
 365                 ret = 1;                                        \
 366         else                                                    \
 367                 ret = 0;                                        \
 368 } while (0)
 369
 370 #define TAM3517_READ_MAC_FROM_EEPROM(info)                      \
 371 do {                                                            \
 372         char buf[80], ethname[20];                              \
 373         int i;                                                  \
 374         memset(buf, 0, sizeof(buf));                            \
 375         for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) {   \
 376                 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X",   \
 377                         (info)->eth_addr[i][5],                 \
 378                         (info)->eth_addr[i][4],                 \
 379                         (info)->eth_addr[i][3],                 \
 380                         (info)->eth_addr[i][2],                 \
 381                         (info)->eth_addr[i][1],                 \
 382                         (info)->eth_addr[i][0]);                        \
 383                                                                 \
 384                 if (i)                                          \
 385                         sprintf(ethname, "eth%daddr", i);       \
 386                 else                                            \
 387                         sprintf(ethname, "ethaddr");            \
 388                 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
 389                 setenv(ethname, buf);                           \
 390         }                                                       \
 391 } while (0)
 392
 393 /* The following macros are taken from Technexion's documentation */
 394 #define TAM3517_sequence_number(info) \
 395         ((info)->sequence_number % 0x1000000000000LL)
 396 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
 397 #define TAM3517_year(info) ((info)->sequence_number >> 56)
 398 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
 399 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
 400 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
 401
 402 #define TAM3517_PRINT_SOM_INFO(info)                            \
 403 do {                                                            \
 404         printf("Vendor:%s\n", (info)->customer);                \
 405         printf("SOM:   %s\n", (info)->product);                 \
 406         printf("SeqNr: %02llu%02llu%012llu\n",                  \
 407                 TAM3517_year(info),                             \
 408                 TAM3517_week_of_year(info),                     \
 409                 TAM3517_sequence_number(info));                 \
 410         printf("Rev:   TN%u %u.%u\n",                           \
 411                 TAM3517_revision_tn(info),                      \
 412                 TAM3517_revision_major(info),                   \
 413                 TAM3517_revision_fixed(info));                  \
 414 } while (0)
 415
 416 #endif
 417
 418 #endif /* __TAM3517_H */