doc: rockchip: Adapt Pine64 Rock64 board instructions
[oweals/u-boot.git] / include / configs / socfpga_dbm_soc1.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2018 Marek Vasut <marex@denx.de>
4  */
5 #ifndef __CONFIG_DEVBOARDS_DBM_SOC1_H__
6 #define __CONFIG_DEVBOARDS_DBM_SOC1_H__
7
8 #include <asm/arch/base_addr_ac5.h>
9
10 /* Memory configurations */
11 #define PHYS_SDRAM_1_SIZE               0x40000000      /* 1GiB */
12
13 /* Booting Linux */
14 #define CONFIG_BOOTFILE         "fitImage"
15 #define CONFIG_PREBOOT          "run try_bootscript"
16 #define CONFIG_BOOTCOMMAND      "run mmc_mmc"
17 #define CONFIG_LOADADDR         0x01000000
18 #define CONFIG_SYS_LOAD_ADDR    CONFIG_LOADADDR
19
20 /* Environment is in MMC */
21 #define CONFIG_ENV_OVERWRITE
22
23 /* Extra Environment */
24 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
25         "consdev=ttyS0\0"                                               \
26         "baudrate=115200\0"                                             \
27         "bootscript=boot.scr\0"                                         \
28         "bootdev=/dev/mmcblk0p2\0"                                      \
29         "rootdev=/dev/mmcblk0p3\0"                                      \
30         "netdev=eth0\0"                                                 \
31         "hostname=dbm_soc1\0"                                           \
32         "kernel_addr_r=0x10000000\0"                                    \
33         "dfu_alt_info=mmc raw 0 3867148288\0"                           \
34         "update_filename=u-boot-with-spl.sfp\0"                         \
35         "update_sd_offset=0x800\0"                                      \
36         "update_sd="            /* Update the SD firmware partition */  \
37                 "if mmc rescan ; then "                                 \
38                 "if tftp ${update_filename} ; then "                    \
39                 "setexpr fw_sz ${filesize} / 0x200 ; "  /* SD block size */ \
40                 "setexpr fw_sz ${fw_sz} + 1 ; "                         \
41                 "mmc write ${loadaddr} ${update_sd_offset} ${fw_sz} ; " \
42                 "fi ; "                                                 \
43                 "fi\0"                                                  \
44         "fpga_filename=output_file.rbf\0"                               \
45         "load_fpga="            /* Load FPGA bitstream */               \
46                 "if tftp ${fpga_filename} ; then "                      \
47                 "fpga load 0 $loadaddr $filesize ; "                    \
48                 "bridge enable ; "                                      \
49                 "fi\0"                                                  \
50         "addcons="                                                      \
51                 "setenv bootargs ${bootargs} "                          \
52                 "console=${consdev},${baudrate}\0"                      \
53         "addip="                                                        \
54                 "setenv bootargs ${bootargs} "                          \
55                 "ip=${ipaddr}:${serverip}:${gatewayip}:"                \
56                         "${netmask}:${hostname}:${netdev}:off\0"        \
57         "addmisc="                                                      \
58                 "setenv bootargs ${bootargs} ${miscargs}\0"             \
59         "addargs=run addcons addmisc\0"                                 \
60         "mmcload="                                                      \
61                 "mmc rescan ; "                                         \
62                 "load mmc 0:2 ${kernel_addr_r} ${bootfile}\0"           \
63         "netload="                                                      \
64                 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0"       \
65         "miscargs=nohlt panic=1\0"                                      \
66         "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0"         \
67         "nfsargs="                                                      \
68                 "setenv bootargs root=/dev/nfs rw "                     \
69                         "nfsroot=${serverip}:${rootpath},v3,tcp\0"      \
70         "mmc_mmc="                                                      \
71                 "run mmcload mmcargs addargs ; "                        \
72                 "bootm ${kernel_addr_r}\0"                              \
73         "mmc_nfs="                                                      \
74                 "run mmcload nfsargs addip addargs ; "                  \
75                 "bootm ${kernel_addr_r}\0"                              \
76         "net_mmc="                                                      \
77                 "run netload mmcargs addargs ; "                        \
78                 "bootm ${kernel_addr_r}\0"                              \
79         "net_nfs="                                                      \
80                 "run netload nfsargs addip addargs ; "                  \
81                 "bootm ${kernel_addr_r}\0"                              \
82         "try_bootscript="                                               \
83                 "mmc rescan;"                                           \
84                 "if test -e mmc 0:2 ${bootscript} ; then "              \
85                 "if load mmc 0:2 ${kernel_addr_r} ${bootscript};"       \
86                 "then ; "                                               \
87                         "echo Running bootscript... ; "                 \
88                         "source ${kernel_addr_r} ; "                    \
89                 "fi ; "                                                 \
90                 "fi\0"                                                  \
91         "socfpga_legacy_reset_compat=1\0"
92
93 /* The rest of the configuration is shared */
94 #include <configs/socfpga_common.h>
95
96 #endif  /* __CONFIG_DEVBOARDS_DBM_SOC1_H__ */