include/configs/pcm052.h

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * Configuration settings for the phytec PCM-052 SoM.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include <asm/arch/imx-regs.h>
  13
  14 #define CONFIG_VF610
  15
  16 #define CONFIG_SYS_GENERIC_BOARD
  17 #define CONFIG_DISPLAY_CPUINFO
  18 #define CONFIG_DISPLAY_BOARDINFO
  19 #define CONFIG_SYS_THUMB_BUILD
  20
  21 #define CONFIG_SKIP_LOWLEVEL_INIT
  22
  23 /* Enable passing of ATAGs */
  24 #define CONFIG_CMDLINE_TAG
  25
  26 /* Size of malloc() pool */
  27 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
  28
  29 #define CONFIG_BOARD_EARLY_INIT_F
  30
  31 #define CONFIG_FSL_LPUART
  32 #define LPUART_BASE                     UART1_BASE
  33
  34 /* Allow to overwrite serial and ethaddr */
  35 #define CONFIG_ENV_OVERWRITE
  36 #define CONFIG_SYS_UART_PORT            (1)
  37 #define CONFIG_BAUDRATE                 115200
  38
  39 #undef CONFIG_CMD_IMLS
  40
  41 /* NAND support */
  42 #define CONFIG_CMD_NAND
  43 #define CONFIG_CMD_NAND_TRIMFFS
  44 #define CONFIG_SYS_NAND_ONFI_DETECTION
  45
  46 #ifdef CONFIG_CMD_NAND
  47 #define CONFIG_USE_ARCH_MEMCPY
  48 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  49 #define CONFIG_SYS_NAND_BASE            NFC_BASE_ADDR
  50
  51 #define CONFIG_JFFS2_NAND
  52
  53 /* UBI */
  54 #define CONFIG_CMD_UBI
  55 #define CONFIG_CMD_UBIFS
  56 #define CONFIG_RBTREE
  57 #define CONFIG_LZO
  58
  59 /* Dynamic MTD partition support */
  60 #define CONFIG_CMD_MTDPARTS
  61 #define CONFIG_MTD_PARTITIONS
  62 #define CONFIG_MTD_DEVICE
  63 #define MTDIDS_DEFAULT                  "nand0=NAND"
  64 #define MTDPARTS_DEFAULT                "mtdparts=NAND:256k(spare)"\
  65                                         ",384k(bootloader)"\
  66                                         ",128k(env1)"\
  67                                         ",128k(env2)"\
  68                                         ",128k(dtb)"\
  69                                         ",6144k(kernel)"\
  70                                         ",65536k(ramdisk)"\
  71                                         ",450944k(root)"
  72 #endif
  73
  74 #define CONFIG_MMC
  75 #define CONFIG_FSL_ESDHC
  76 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  77 #define CONFIG_SYS_FSL_ESDHC_NUM        1
  78
  79 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
  80 #define CONFIG_SYS_FSL_ERRATUM_ESDHC135
  81 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
  82 #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
  83
  84 #define CONFIG_CMD_MMC
  85 #define CONFIG_GENERIC_MMC
  86 #define CONFIG_CMD_FAT
  87 #define CONFIG_DOS_PARTITION
  88
  89 #define CONFIG_CMD_PING
  90 #define CONFIG_CMD_DHCP
  91 #define CONFIG_CMD_MII
  92 #define CONFIG_FEC_MXC
  93 #define CONFIG_MII
  94 #define IMX_FEC_BASE                    ENET_BASE_ADDR
  95 #define CONFIG_FEC_XCV_TYPE             RMII
  96 #define CONFIG_FEC_MXC_PHYADDR          0
  97 #define CONFIG_PHYLIB
  98 #define CONFIG_PHY_MICREL
  99
 100 /* QSPI Configs*/
 101 #define CONFIG_FSL_QSPI
 102
 103 #ifdef CONFIG_FSL_QSPI
 104 #define CONFIG_CMD_SF
 105 #define CONFIG_SPI_FLASH
 106 #define CONFIG_SPI_FLASH_STMICRO
 107 #define FSL_QSPI_FLASH_SIZE             (1 << 24)
 108 #define FSL_QSPI_FLASH_NUM              2
 109 #define CONFIG_SYS_FSL_QSPI_LE
 110 #endif
 111
 112 /* I2C Configs */
 113 #define CONFIG_CMD_I2C
 114 #define CONFIG_SYS_I2C
 115 #define CONFIG_SYS_I2C_MXC_I2C3
 116 #define CONFIG_SYS_I2C_MXC
 117
 118 /* RTC (actually an RV-4162 but M41T62-compatible) */
 119 #define CONFIG_CMD_DATE
 120 #define CONFIG_RTC_M41T62
 121 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
 122 #define CONFIG_SYS_RTC_BUS_NUM 2
 123
 124 /* EEPROM (24FC256) */
 125 #define CONFIG_CMD_EEPROM
 126 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
 127 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
 128 #define CONFIG_SYS_I2C_EEPROM_BUS 2
 129
 130 #define CONFIG_BOOTDELAY                3
 131
 132 #define CONFIG_LOADADDR                 0x82000000
 133
 134 /* We boot from the gfxRAM area of the OCRAM. */
 135 #define CONFIG_SYS_TEXT_BASE            0x3f408000
 136 #define CONFIG_BOARD_SIZE_LIMIT         524288
 137
 138 #define CONFIG_BOOTCOMMAND              "run bootcmd_sd"
 139 #define CONFIG_EXTRA_ENV_SETTINGS \
 140         "fdt_high=0xffffffff\0" \
 141         "initrd_high=0xffffffff\0" \
 142         "blimg_file=u-boot.imx\0" \
 143         "blsec_addr=0x81000000\0" \
 144         "blimg_addr=0x81000400\0" \
 145         "kernel_file=zImage\0" \
 146         "kernel_addr=0x82000000\0" \
 147         "fdt_file=vf610-pcm052.dtb\0" \
 148         "fdt_addr=0x81000000\0" \
 149         "ram_file=uRamdisk\0" \
 150         "ram_addr=0x83000000\0" \
 151         "filesys=rootfs.ubifs\0" \
 152         "sys_addr=0x81000000\0" \
 153         "tftploc=/path/to/tftp/directory/\0" \
 154         "nfs_root=/path/to/nfs/root\0" \
 155         "tftptimeout=1000\0" \
 156         "tftptimeoutcountmax=1000000\0" \
 157         "mtdparts=" MTDPARTS_DEFAULT "\0" \
 158         "bootargs_base=setenv bootargs rw mem=256M " \
 159                 "console=ttyLP1,115200n8\0" \
 160         "bootargs_sd=setenv bootargs ${bootargs} " \
 161                 "root=/dev/mmcblk0p2 rootwait\0" \
 162         "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
 163                 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
 164         "bootargs_nand=setenv bootargs ${bootargs} " \
 165                 "ubi.mtd=6 rootfstype=ubifs root=ubi0:rootfs\0" \
 166         "bootargs_ram=setenv bootargs ${bootargs} " \
 167                 "root=/dev/ram rw initrd=${ram_addr}\0" \
 168         "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
 169         "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
 170                 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
 171                 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
 172                 "bootz ${kernel_addr} - ${fdt_addr}\0" \
 173         "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
 174                 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
 175                 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
 176                 "bootz ${kernel_addr} - ${fdt_addr}\0" \
 177         "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
 178                 "nand read ${fdt_addr} dtb; " \
 179                 "nand read ${kernel_addr} kernel; " \
 180                 "bootz ${kernel_addr} - ${fdt_addr}\0" \
 181         "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
 182                 "nand read ${fdt_addr} dtb; " \
 183                 "nand read ${kernel_addr} kernel; " \
 184                 "nand read ${ram_addr} ramdisk; " \
 185                 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
 186         "update_bootloader_from_tftp=mtdparts default; " \
 187                 "nand read ${blsec_addr} bootloader; " \
 188                 "mw.b ${blimg_addr} 0xff 0x5FC00; " \
 189                 "if tftp ${blimg_addr} ${tftpdir}${blimg_file}; then " \
 190                 "nand erase.part bootloader; " \
 191                 "nand write ${blsec_addr} bootloader ${filesize}; fi\0" \
 192         "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
 193                 "${kernel_file}; " \
 194                 "then mtdparts default; " \
 195                 "nand erase.part kernel; " \
 196                 "nand write ${kernel_addr} kernel ${filesize}; " \
 197                 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
 198                 "nand erase.part dtb; " \
 199                 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
 200         "update_kernel_from_tftp=if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
 201                 "then setenv fdtsize ${filesize}; " \
 202                 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
 203                 "mtdparts default; " \
 204                 "nand erase.part dtb; " \
 205                 "nand write ${fdt_addr} dtb ${fdtsize}; " \
 206                 "nand erase.part kernel; " \
 207                 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
 208         "update_rootfs_from_tftp=if tftp ${sys_addr} ${tftpdir}${filesys}; " \
 209                 "then mtdparts default; " \
 210                 "nand erase.part root; " \
 211                 "ubi part root; " \
 212                 "ubi create rootfs; " \
 213                 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
 214         "update_ramdisk_from_tftp=if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
 215                 "then mtdparts default; " \
 216                 "nand erase.part ramdisk; " \
 217                 "nand write ${ram_addr} ramdisk ${filesize}; fi\0"
 218
 219 /* miscellaneous commands */
 220 #define CONFIG_CMD_ELF
 221
 222 /* Miscellaneous configurable options */
 223 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 224 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 225 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 226 #define CONFIG_AUTO_COMPLETE
 227 #define CONFIG_CMDLINE_EDITING
 228 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 229 #define CONFIG_SYS_PBSIZE               \
 230                         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 231 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 232 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 233
 234 #define CONFIG_CMD_MEMTEST
 235 #define CONFIG_SYS_MEMTEST_START        0x80010000
 236 #define CONFIG_SYS_MEMTEST_END          0x87C00000
 237
 238 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 239
 240 /*
 241  * Stack sizes
 242  * The stack sizes are set up in start.S using the settings below
 243  */
 244 #define CONFIG_STACKSIZE                (128 * 1024)    /* regular stack */
 245
 246 /* Physical memory map */
 247 #define CONFIG_NR_DRAM_BANKS            1
 248 #define PHYS_SDRAM                      (0x80000000)
 249 #define PHYS_SDRAM_SIZE                 (256 * 1024 * 1024)
 250
 251 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 252 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 253 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 254
 255 #define CONFIG_SYS_INIT_SP_OFFSET \
 256         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 257 #define CONFIG_SYS_INIT_SP_ADDR \
 258         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 259
 260 /* FLASH and environment organization */
 261 #define CONFIG_SYS_NO_FLASH
 262
 263 #ifdef CONFIG_ENV_IS_IN_MMC
 264 #define CONFIG_ENV_SIZE                 (8 * 1024)
 265
 266 #define CONFIG_ENV_OFFSET               (12 * 64 * 1024)
 267 #define CONFIG_SYS_MMC_ENV_DEV          0
 268 #endif
 269
 270 #ifdef CONFIG_ENV_IS_IN_NAND
 271 #define CONFIG_ENV_SECT_SIZE            (128 * 1024)
 272 #define CONFIG_ENV_SIZE                 (8 * 1024)
 273 #define CONFIG_ENV_OFFSET               0xA0000
 274 #define CONFIG_ENV_SIZE_REDUND          (8 * 1024)
 275 #define CONFIG_ENV_OFFSET_REDUND        0xC0000
 276 #endif
 277
 278 #define CONFIG_OF_LIBFDT
 279 #define CONFIG_CMD_BOOTZ
 280
 281 #endif