include/configs/ls1043a_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2015 Freescale Semiconductor
   4  */
   5
   6 #ifndef __LS1043A_COMMON_H
   7 #define __LS1043A_COMMON_H
   8
   9 /* SPL build */
  10 #ifdef CONFIG_SPL_BUILD
  11 #define SPL_NO_FMAN
  12 #define SPL_NO_DSPI
  13 #define SPL_NO_PCIE
  14 #define SPL_NO_ENV
  15 #define SPL_NO_MISC
  16 #define SPL_NO_USB
  17 #define SPL_NO_SATA
  18 #define SPL_NO_QE
  19 #define SPL_NO_EEPROM
  20 #endif
  21 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
  22 #define SPL_NO_MMC
  23 #endif
  24 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
  25 #define SPL_NO_IFC
  26 #endif
  27
  28 #define CONFIG_REMAKE_ELF
  29 #define CONFIG_GICV2
  30
  31 #include <asm/arch/stream_id_lsch2.h>
  32 #include <asm/arch/config.h>
  33
  34 /* Link Definitions */
  35 #ifdef CONFIG_TFABOOT
  36 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
  37 #else
  38 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
  39 #endif
  40
  41 #define CONFIG_SKIP_LOWLEVEL_INIT
  42
  43 #define CONFIG_VERY_BIG_RAM
  44 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
  45 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  46 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  47 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
  48
  49 #define CPU_RELEASE_ADDR               secondary_boot_func
  50
  51 /* Generic Timer Definitions */
  52 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
  53
  54 /* Size of malloc() pool */
  55 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  56
  57 /* Serial Port */
  58 #define CONFIG_SYS_NS16550_SERIAL
  59 #define CONFIG_SYS_NS16550_REG_SIZE     1
  60 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
  61
  62 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  63
  64 /* SD boot SPL */
  65 #ifdef CONFIG_SD_BOOT
  66
  67 #define CONFIG_SPL_TEXT_BASE            0x10000000
  68 #define CONFIG_SPL_MAX_SIZE             0x17000
  69 #define CONFIG_SPL_STACK                0x1001e000
  70 #define CONFIG_SPL_PAD_TO               0x1d000
  71
  72 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  73                                         CONFIG_SPL_BSS_MAX_SIZE)
  74 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  75 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  76 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  77
  78 #ifdef CONFIG_SECURE_BOOT
  79 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
  80 /*
  81  * HDR would be appended at end of image and copied to DDR along
  82  * with U-Boot image. Here u-boot max. size is 512K. So if binary
  83  * size increases then increase this size in case of secure boot as
  84  * it uses raw u-boot image instead of fit image.
  85  */
  86 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
  87 #else
  88 #define CONFIG_SYS_MONITOR_LEN          0x100000
  89 #endif /* ifdef CONFIG_SECURE_BOOT */
  90 #endif
  91
  92 /* NAND SPL */
  93 #ifdef CONFIG_NAND_BOOT
  94 #define CONFIG_SPL_PBL_PAD
  95 #define CONFIG_SPL_TEXT_BASE            0x10000000
  96 #define CONFIG_SPL_MAX_SIZE             0x1a000
  97 #define CONFIG_SPL_STACK                0x1001d000
  98 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
  99 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 100 #define CONFIG_SYS_SPL_MALLOC_START     0x80200000
 101 #define CONFIG_SPL_BSS_START_ADDR       0x80100000
 102 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 103 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 104
 105 #ifdef CONFIG_SECURE_BOOT
 106 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
 107 #endif /* ifdef CONFIG_SECURE_BOOT */
 108
 109 #ifdef CONFIG_U_BOOT_HDR_SIZE
 110 /*
 111  * HDR would be appended at end of image and copied to DDR along
 112  * with U-Boot image. Here u-boot max. size is 512K. So if binary
 113  * size increases then increase this size in case of secure boot as
 114  * it uses raw u-boot image instead of fit image.
 115  */
 116 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
 117 #else
 118 #define CONFIG_SYS_MONITOR_LEN          0x100000
 119 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
 120
 121 #endif
 122
 123 /* IFC */
 124 #ifndef SPL_NO_IFC
 125 #if defined(CONFIG_TFABOOT) || \
 126         (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
 127 #define CONFIG_FSL_IFC
 128 /*
 129  * CONFIG_SYS_FLASH_BASE has the final address (core view)
 130  * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
 131  * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
 132  * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting
 133  */
 134 #define CONFIG_SYS_FLASH_BASE                   0x60000000
 135 #define CONFIG_SYS_FLASH_BASE_PHYS              CONFIG_SYS_FLASH_BASE
 136 #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY        0x00000000
 137
 138 #ifdef CONFIG_MTD_NOR_FLASH
 139 #define CONFIG_SYS_FLASH_QUIET_TEST
 140 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 141 #endif
 142 #endif
 143 #endif
 144
 145 /* I2C */
 146 #define CONFIG_SYS_I2C
 147
 148 /* PCIe */
 149 #ifndef SPL_NO_PCIE
 150 #define CONFIG_PCIE1            /* PCIE controller 1 */
 151 #define CONFIG_PCIE2            /* PCIE controller 2 */
 152 #define CONFIG_PCIE3            /* PCIE controller 3 */
 153
 154 #ifdef CONFIG_PCI
 155 #define CONFIG_PCI_SCAN_SHOW
 156 #endif
 157 #endif
 158
 159 /* Command line configuration */
 160
 161 /*  MMC  */
 162 #ifndef SPL_NO_MMC
 163 #ifdef CONFIG_MMC
 164 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 165 #endif
 166 #endif
 167
 168 /*  DSPI  */
 169 #ifndef SPL_NO_DSPI
 170 #define CONFIG_FSL_DSPI
 171 #ifdef CONFIG_FSL_DSPI
 172 #define CONFIG_DM_SPI_FLASH
 173 #define CONFIG_SPI_FLASH_STMICRO        /* cs0 */
 174 #define CONFIG_SPI_FLASH_SST            /* cs1 */
 175 #define CONFIG_SPI_FLASH_EON            /* cs2 */
 176 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
 177 #define CONFIG_SF_DEFAULT_BUS           1
 178 #define CONFIG_SF_DEFAULT_CS            0
 179 #endif
 180 #endif
 181 #endif
 182
 183 /* FMan ucode */
 184 #ifndef SPL_NO_FMAN
 185 #define CONFIG_SYS_DPAA_FMAN
 186 #ifdef CONFIG_SYS_DPAA_FMAN
 187 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
 188
 189 #ifdef CONFIG_TFABOOT
 190 #define CONFIG_SYS_FMAN_FW_ADDR         0x900000
 191 #define CONFIG_SYS_QE_FW_ADDR           0x940000
 192
 193 #define CONFIG_ENV_SPI_BUS              0
 194 #define CONFIG_ENV_SPI_CS               0
 195 #define CONFIG_ENV_SPI_MAX_HZ           1000000
 196 #define CONFIG_ENV_SPI_MODE             0x03
 197
 198 #else
 199 #ifdef CONFIG_NAND_BOOT
 200 /* Store Fman ucode at offeset 0x900000(72 blocks). */
 201 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
 202 #define CONFIG_SYS_FMAN_FW_ADDR         (72 * CONFIG_SYS_NAND_BLOCK_SIZE)
 203 #elif defined(CONFIG_SD_BOOT)
 204 /*
 205  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
 206  * about 1MB (2040 blocks), Env is stored after the image, and the env size is
 207  * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 18432(0x4800).
 208  */
 209 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
 210 #define CONFIG_SYS_FMAN_FW_ADDR         (512 * 0x4800)
 211 #define CONFIG_SYS_QE_FW_ADDR           (512 * 0x4A00)
 212 #elif defined(CONFIG_QSPI_BOOT)
 213 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
 214 #define CONFIG_SYS_FMAN_FW_ADDR         0x40900000
 215 #define CONFIG_ENV_SPI_BUS              0
 216 #define CONFIG_ENV_SPI_CS               0
 217 #define CONFIG_ENV_SPI_MAX_HZ           1000000
 218 #define CONFIG_ENV_SPI_MODE             0x03
 219 #else
 220 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 221 /* FMan fireware Pre-load address */
 222 #define CONFIG_SYS_FMAN_FW_ADDR         0x60900000
 223 #define CONFIG_SYS_QE_FW_ADDR           0x60940000
 224 #endif
 225 #endif
 226 #define CONFIG_SYS_QE_FMAN_FW_LENGTH    0x10000
 227 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 228 #endif
 229 #endif
 230
 231 /* Miscellaneous configurable options */
 232 #define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
 233
 234 #define CONFIG_HWCONFIG
 235 #define HWCONFIG_BUFFER_SIZE            128
 236
 237 #ifndef SPL_NO_MISC
 238 #ifndef CONFIG_SPL_BUILD
 239 #define BOOT_TARGET_DEVICES(func) \
 240         func(MMC, mmc, 0) \
 241         func(USB, usb, 0)
 242 #include <config_distro_bootcmd.h>
 243 #endif
 244
 245 /* Initial environment variables */
 246 #define CONFIG_EXTRA_ENV_SETTINGS               \
 247         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 248         "fdt_high=0xffffffffffffffff\0"         \
 249         "initrd_high=0xffffffffffffffff\0"      \
 250         "fdt_addr=0x64f00000\0"                 \
 251         "kernel_addr=0x61000000\0"              \
 252         "scriptaddr=0x80000000\0"               \
 253         "scripthdraddr=0x80080000\0"            \
 254         "fdtheader_addr_r=0x80100000\0"         \
 255         "kernelheader_addr_r=0x80200000\0"      \
 256         "kernel_addr_r=0x81000000\0"            \
 257         "kernel_start=0x1000000\0"              \
 258         "kernelheader_start=0x800000\0"         \
 259         "fdt_addr_r=0x90000000\0"               \
 260         "load_addr=0xa0000000\0"                \
 261         "kernelheader_addr=0x60800000\0"        \
 262         "kernel_size=0x2800000\0"               \
 263         "kernelheader_size=0x40000\0"           \
 264         "kernel_addr_sd=0x8000\0"               \
 265         "kernel_size_sd=0x14000\0"              \
 266         "kernelhdr_addr_sd=0x4000\0"            \
 267         "kernelhdr_size_sd=0x10\0"              \
 268         "console=ttyS0,115200\0"                \
 269         "boot_os=y\0"                           \
 270         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"        \
 271         BOOTENV                                 \
 272         "boot_scripts=ls1043ardb_boot.scr\0"    \
 273         "boot_script_hdr=hdr_ls1043ardb_bs.out\0"       \
 274         "scan_dev_for_boot_part="               \
 275                 "part list ${devtype} ${devnum} devplist; "     \
 276                 "env exists devplist || setenv devplist 1; "    \
 277                 "for distro_bootpart in ${devplist}; do "       \
 278                         "if fstype ${devtype} "                 \
 279                                 "${devnum}:${distro_bootpart} " \
 280                                 "bootfstype; then "             \
 281                                 "run scan_dev_for_boot; "       \
 282                         "fi; "                                  \
 283                 "done\0"                        \
 284         "scan_dev_for_boot="                                    \
 285                 "echo Scanning ${devtype} "                     \
 286                         "${devnum}:${distro_bootpart}...; "     \
 287                 "for prefix in ${boot_prefixes}; do "           \
 288                         "run scan_dev_for_scripts; "            \
 289                 "done;\0"                                       \
 290         "boot_a_script="                                        \
 291                 "load ${devtype} ${devnum}:${distro_bootpart} " \
 292                         "${scriptaddr} ${prefix}${script}; "    \
 293                 "env exists secureboot && load ${devtype} "     \
 294                         "${devnum}:${distro_bootpart} "         \
 295                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
 296                         "&& esbc_validate ${scripthdraddr};"    \
 297                 "source ${scriptaddr}\0"                        \
 298         "qspi_bootcmd=echo Trying load from qspi..;"    \
 299                 "sf probe && sf read $load_addr "       \
 300                 "$kernel_addr $kernel_size; env exists secureboot "     \
 301                 "&& sf read $kernelheader_addr_r $kernelheader_addr "   \
 302                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 303                 "bootm $load_addr#$board\0"     \
 304         "nor_bootcmd=echo Trying load from nor..;"      \
 305                 "cp.b $kernel_addr $load_addr " \
 306                 "$kernel_size; env exists secureboot "  \
 307                 "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
 308                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 309                 "bootm $load_addr#$board\0"         \
 310         "nand_bootcmd=echo Trying load from NAND..;"    \
 311                 "nand info; nand read $load_addr "      \
 312                 "$kernel_start $kernel_size; env exists secureboot "    \
 313                 "&& nand read $kernelheader_addr_r $kernelheader_start "        \
 314                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 315                 "bootm $load_addr#$board\0"     \
 316         "sd_bootcmd=echo Trying load from SD ..;"       \
 317                 "mmcinfo; mmc read $load_addr "         \
 318                 "$kernel_addr_sd $kernel_size_sd && "     \
 319                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
 320                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 321                 " && esbc_validate ${kernelheader_addr_r};"     \
 322                 "bootm $load_addr#$board\0"
 323
 324
 325 #undef CONFIG_BOOTCOMMAND
 326 #ifdef CONFIG_TFABOOT
 327 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "   \
 328                            "env exists secureboot && esbc_halt;"
 329 #define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "  \
 330                            "env exists secureboot && esbc_halt;"
 331 #define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "     \
 332                            "env exists secureboot && esbc_halt;"
 333 #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; "   \
 334                            "env exists secureboot && esbc_halt;"
 335 #else
 336 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 337 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "     \
 338                            "env exists secureboot && esbc_halt;"
 339 #elif defined(CONFIG_SD_BOOT)
 340 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "  \
 341                            "env exists secureboot && esbc_halt;"
 342 #else
 343 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "      \
 344                            "env exists secureboot && esbc_halt;"
 345 #endif
 346 #endif
 347 #endif
 348
 349 /* Monitor Command Prompt */
 350 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 351
 352 #define CONFIG_SYS_MAXARGS              64      /* max command args */
 353
 354 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 355
 356 #include <asm/arch/soc.h>
 357
 358 #endif /* __LS1043A_COMMON_H */